CN217214727U - Silicon carbide schottky diode - Google Patents

Abstract

A silicon carbide schottky diode. Relates to the field of semiconductors. The silicon carbide substrate comprises an epitaxial layer arranged on the front surface of the silicon carbide substrate and an ohmic contact electrode arranged on the back surface of the silicon carbide substrate; a lower metal layer is arranged on the ohmic contact electrode; further comprising: the P-type doped region extends downwards from the top of the epitaxial layer; the first field oxide is arranged on the top of the epitaxial layer; the second field oxide is arranged at the top of the epitaxial layer and positioned on the side part of the first field oxide, and a front metal contact electrode is arranged above the P-type doped region and connected with the side part of the first field oxide; an upper metal layer disposed above the front metal contact electrode; the utility model discloses reduced the influence that the device surface received external electric charge or electric field, can withstand voltage long-term stability and reliability of effectual protection device.

Description

Silicon carbide schottky diode

Technical Field

The utility model relates to a semiconductor field, concretely relates to carborundum schottky diode.

Background

The silicon carbide is used as a third-generation semiconductor material, the critical breakdown field strength of the silicon carbide is 10 times that of a Si material, the forbidden bandwidth and the heat conductivity of the silicon carbide are 3 times that of the Si material, and the concentration of an intrinsic carrier is only one tenth of that of the Si material, so that the silicon carbide becomes an ideal material for manufacturing high-voltage, high-power, high-frequency and high-temperature resistant devices.

Silicon carbide power devices generally include JBS, MPS, MOSFET, JFET, IGBT and other device types, and after the devices are manufactured, CP test (chip probe) is performed in the industry to calibrate the defective products of the chips. It is known that the reliability of power semiconductors is one of the important characteristics of products, and the operational capability under high humidity environment is a key index for testing the reliability of devices

However, for a high-voltage silicon carbide device, the reverse avalanche voltage is usually above 1400V, and in the CP test process, air ionization between the front electrode of the wafer and the scribe line may occur, and then an Arcing (Arcing) phenomenon may occur, which may damage the wafer and the test equipment, so that a certain difficulty may be brought to the wafer test link by the extremely high avalanche voltage. In addition, according to the market demand, a product with higher reliability must be developed to have higher market competitiveness, and particularly, the operation capability of the device in an HV-H3TRB (High-Voltage High-temperature High-humidity Reverse Bias) environment is tested, so that the design and processing of the device are higher in complexity and higher in difficulty.

SUMMERY OF THE UTILITY MODEL

The utility model provides a to above problem, provide a carborundum schottky diode that can avoid the phenomenon of striking sparks in the CP test procedure and strengthen the robustness of device under H3TRB greatly.

The technical scheme of the utility model is that: the silicon carbide Schottky diode comprises an epitaxial layer arranged on the front surface of the silicon carbide substrate and an ohmic contact electrode arranged on the back surface of the silicon carbide substrate; a lower metal layer is arranged on the ohmic contact electrode; further comprising:

the P-type doped region extends downwards from the top of the epitaxial layer;

the first field oxide is arranged on the top of the epitaxial layer;

a second field oxide arranged on the top of the epitaxial layer and positioned at the side part of the first field oxide,

the front metal contact electrode is arranged above the P-type doped region, and the side part of the front metal contact electrode is connected with the first field oxide;

an upper metal layer disposed above the front metal contact electrode;

the passivation layer is arranged above the upper metal layer and the first field oxide; and

the PI glue is positioned at the top of the device and extends downwards to the epitaxial layer through the passivation layer; and a distance is reserved between the PI glue and the side part of the device to form a scribing channel.

Specifically, the passivation layer includes:

the first passivation layer is arranged above the upper metal layer and the first field oxide;

and the second passivation layer is arranged above the second field oxide.

Specifically, the passivation layer I and the passivation layer II sequentially consist of a semi-insulating polycrystalline silicon layer and a silicon nitride layer from bottom to top.

Specifically, the second field oxide layer and the second passivation layer are matched with the scribing channel area.

Specifically, the first field oxide and the second field oxide and the first passivation layer and the second passivation layer are respectively arranged at intervals;

the passivation layer wraps the first field oxide layer;

and the second passivation layer is wrapped on the second field oxide.

The beneficial effects of the utility model reside in that:

1. the utility model discloses a two and two covers of passivation layer are in the regional below of scribing lane, when reverse pressurization, especially when adding the high pressure more than 1000V, the equipotential surface of back electrode will be on scribing lane surface, nevertheless because there are field oxygen (SiO 2) and d passivation layer (silicon nitride) in the scribing lane, its relative dielectric constant is higher, insulating properties is better, can not take place the ionization formation between the last metal level of wafer and the scribing lane surface, so alright in order to avoid the above-mentioned emergence of striking sparks phenomenon.

2. The utility model discloses a wafer is through decomposing into an solitary chip in cutting scribing way region 13, seals to survey and carries out HV-H3TRB examination to the device after accomplishing and verify. The field oxygen has stronger hydroscopicity because its material characteristic, and silicon nitride and PI glue film in the passivation layer have fine water-proof effects, if passivation layer and PI glue film can not fine protection field oxygen, whole passivation layer and PI just can not fine isolated steam, because the device terminal constantly absorbs steam through field oxygen under high humid air spare, the field ring portion that leads to having steam is under high withstand voltage condition, the electric leakage is too big, the water electrolysis takes place easily, lead to the device to become invalid. And a gap interval is reserved between every two of the first field oxide and the second field oxide and the first passivation layer and the second passivation layer through subsection deposition in the edge area of the scribing channel. The peripheral silicon nitride layer of passivation structure of parcel formula can be fine protects field oxygen, and isolated steam passes through field oxygen and gets into the terminal, and the Pi glue at top also has outstanding waterproof performance simultaneously, further promotes the reliability of device under HV-H3 TRB.

3. The resistivity of SiPOS in the passivation layer is greatly lower than that of an organic insulating material, when the temperature is high, movable ions in the outer organic material are respectively transported to two electrodes under the action of an electric field, and because the semi-insulating layer has more current carriers, induced charges are generated in the semi-insulating layer, so that power lines of the charges in the organic material are stopped in the semi-insulating layer and cannot reach the surface of a tube core, the effects of shielding the charges and homogenizing the electric field are achieved to a certain extent, the influence of external charges or the electric field on the surface of a device is reduced, and the long-term stability and the reliability of the voltage resistance of the device can be effectively protected.

Drawings

Figure 1 is a schematic structural view of the present invention,

figure 2 is a schematic structural diagram of an epitaxial layer grown in step S001,

figure 3 is a schematic structural view of the p-type doped region after the ion implantation of step S002,

FIG. 4 is a schematic structural diagram of the first field oxide and the second field oxide deposited in step S003,

fig. 5 is a schematic structural view of forming a front metal contact electrode in step S004,

figure 6 is a schematic diagram of the structure of step S005 for depositing the thickening metal,

FIG. 7 is a schematic structural diagram of fabricating a first passivation layer and a second passivation layer in step S006,

FIG. 8 is a schematic diagram of the PI cement structure prepared in step S007,

fig. 9 is a schematic structural view of the ohmic contact electrode formed in step S008,

FIG. 10 is a schematic structural diagram of the step S009 of depositing a thickening metal;

in the figure, 1 is a silicon carbide substrate, 2 is an epitaxial layer, 3 is a P-type doped region, 4 is a first field oxide, 5 is a second field oxide, 6 is a front metal contact electrode, 7 is an upper metal layer, 8 is a first passivation layer, 9 is a second passivation layer, 10 is PI glue, 11 is an ohmic contact electrode, 12 is a lower metal layer, and 13 is a scribing way.

Detailed Description

Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are exemplary only for the purpose of explaining the present invention, and should not be construed as limiting the present invention.

The utility model is shown in figures 1-10; taking a SiC schottky diode as an example, a typical device manufacturing process includes:

the silicon carbide Schottky diode comprises an epitaxial layer 2 arranged on the front surface of a silicon carbide substrate 1 and an ohmic contact electrode 11 on the back surface; a lower metal layer 12 is arranged on the ohmic contact electrode 11; further comprising:

a P-type doped region 3, wherein the P-type doped region 3 extends downwards from the top of the epitaxial layer 2;

the first field oxide 4 is arranged at the top of the epitaxial layer 2, so that the P-type doped region 3 can be prevented from being damaged in the metal etching process, and a field plate is formed with the front metal contact electrode 6 and the upper metal layer 7 to adjust an electric field;

the second field oxide 5 is arranged at the top of the epitaxial layer 2, is positioned on the side part of the first field oxide 4, covers the whole scribing channel region 13, has high relative dielectric constant and good insulating property, and can effectively avoid the sparking phenomenon;

the front metal contact electrode 6 is arranged above the P-type doped region 3, and the side part of the front metal contact electrode 6 is connected with the field oxide I4;

an upper metal layer 7, wherein the upper metal layer 7 is arranged above the front metal contact electrode 6;

the passivation layer is arranged above the upper metal layer 7 and the field oxide I4; and

a PI glue 10, said PI glue 10 being located on top of the device (or called termination) and extending down through said passivation layer to said epitaxial layer 2; and a distance is reserved between the PI glue 10 and the side part of the device to form a scribing channel 13. The scribing channel 13 is decomposed into individual chips through wafer cutting equipment for packaging and testing devices;

specifically, the passivation layer includes:

a first passivation layer 8, wherein the first passivation layer 8 is disposed above the upper metal layer 7 and the first field oxide 4;

and the second passivation layer 9, wherein the second passivation layer 9 is arranged above the second field oxide 5.

The first passivation layer 8 and the second passivation layer 9 are respectively arranged above the field oxygen (the first field oxygen 4 or the second field oxygen 5), the bottom of the first passivation layer is contacted with the epitaxial layer 2, and the side parts of the first passivation layer and the second passivation layer are respectively contacted with the front metal contact electrode and the upper metal layer. Because the silicon nitride in the passivation layer has good waterproof effect, the passivation layer covers and wraps the field oxygen, so that water vapor can be effectively prevented from entering the field oxygen, and the reliability of the device is improved;

specifically, the passivation layer (including the passivation layer I8 and the passivation layer II 9) sequentially consists of a semi-insulating polycrystalline silicon (SIPOS) layer and a silicon nitride layer from bottom to top.

The resistivity of SiPOS in the passivation layer is greatly lower than that of an organic insulating material, when the temperature is high, movable ions in the outer organic material are respectively transported to two electrodes under the action of an electric field, and because the semi-insulating layer has more current carriers, induced charges are generated in the semi-insulating layer, so that power lines of the charges in the organic material are stopped in the semi-insulating layer and cannot reach the surface of a tube core, the effects of shielding the charges and homogenizing the electric field are achieved to a certain extent, the influence of external charges or the electric field on the surface of a device is reduced, and the long-term stability and the reliability of the voltage resistance of the device can be effectively protected. The upper silicon nitride layer has good waterproof effect, can effectively prevent water vapor from entering and further improves the reliability of the device.

Specifically, the second field oxide 5 and the second passivation layer 9 are matched with the area of the scribe lane 13.

In this case, the second field oxide 5 and the second passivation layer 9 are spread over the entire scribe line 13, and both are high dielectric constant materials.

Specifically, the first field oxide 4 and the second field oxide 5, and the first passivation layer 8 and the second passivation layer 9 are respectively arranged at intervals;

the passivation layer I8 is wrapped on the field oxide I4;

the second passivation layer 9 is wrapped on the second field oxide 5.

Because the silicon nitride in the passivation layer has good waterproof effect, the passivation layer covers and wraps the field oxygen to effectively prevent water vapor from entering the field oxygen, and the interval structure ensures that the outermost layer is the passivation layer with good waterproof effect;

the manufacturing method of the silicon carbide Schottky diode comprises the following steps:

s001, growing an epitaxial layer 2 with the thickness of 5-15um on the silicon carbide substrate 1; as shown with reference to FIG. 2; the conductivity types of the silicon carbide substrate 1 and the silicon carbide epitaxial layer 2 are both generally N type;

s002, forming a P-type doped region 3 in the epitaxial layer 2 through ion implantation; as shown with reference to FIG. 3;

the ion implantation adopted in the step can be single implantation or multiple implantation, the doping impurity is generally Al, the implantation temperature is 400-600 ℃, a P-type doping junction of 0.4-1.0um is generally formed when the implantation is finished, the implantation energy range of the ion implantation covers 30-500 keV, and the implantation dosage range covers 1E12-1E16 cm-2. After the implantation is finished, high-temperature annealing at 1600-1900 ℃ is needed for ion activation.

S003, depositing a layer of SiO2 on the front surface (above the epitaxial layer 2) of the device by a chemical vapor deposition method, and then forming a sectional type first deposited field oxide 4 and a sectional type second deposited field oxide 5 by wet etching; the field oxygen thickness of the field oxygen I4 and the field oxygen II 5 is 0.5-2 um; as shown with reference to FIG. 4;

s004, refer to FIG. 5; forming a metal contact electrode 6 on the front surface of the device;

s005, depositing an upper metal layer 7 with the thickness of 1-6um above the metal contact electrode 6 to be taken as an electrode to be led out; as shown with reference to FIG. 6;

s006, respectively manufacturing a first passivation layer 8 and a second passivation layer 9 at the terminal positions of the device; as shown with reference to FIG. 7;

the passivation layer I8 and the passivation layer II 9 of the utility model are both of a double-layer structure, comprising a semi-insulating polysilicon (SIPOS) layer of one layer and an inorganic passivation layer of one layer of silicon nitride material.

S007 as shown in FIG. 8; a PI glue layer 10 is manufactured at the terminal position of the device, and the PI glue layer is an organic passivation layer mainly made of Polyimide;

s008, as shown in fig. 9; manufacturing an ohmic contact electrode 11 on the back surface of the silicon carbide substrate 1; the manufacturing sequence needs to be adjusted according to whether the wafer is thinned, typically, taking a thinning process as an example, the ohmic electrode 11 on the back side is placed after the thinning process, and the ohmic alloy is completed through laser annealing.

And S009, depositing a lower metal layer 12 of 1-3um on the ohmic contact electrode 11 to finish the manufacture of the device, and referring to FIG. 10.

Specifically, in step S002, a P-type doped region is formed by one-time ion implantation, the doped impurity is Al, the implantation temperature is 400-.

Specifically, step S003 is to form a layer of SiO2 by chemical vapor deposition in advance, and then to form field oxide one 4 and field oxide two 5 by etching.

Specifically, before the passivation layer one 8 and the passivation layer two 9 are formed in step S006, a SIPOS film and a silicon nitride film are sequentially deposited from bottom to top.

In fig. 1, the first field oxide layer 4, the second field oxide layer 5, the first passivation layer 8 and the second passivation layer 9 are typically designed to be a segmented structure formed by deposition and etching, the right side of the first passivation layer 8 completely covers the first field oxide layer 4, the left side of the second passivation layer 9 completely covers the second field oxide layer 5, and a certain distance is maintained between the first passivation layer 8 and the second passivation layer 9. Silicon nitride outside the passivation layer has an excellent waterproof effect, and field oxygen 4 can be effectively prevented from being carried out by water vapor through the interval type passivation structure.

The disclosure of the present application also includes the following points:

(1) the drawings of the embodiments disclosed herein only relate to the structures related to the embodiments disclosed herein, and other structures can refer to general designs;

(2) in case of conflict, the embodiments and features of the embodiments disclosed in this application can be combined with each other to arrive at new embodiments;

the above embodiments are only embodiments disclosed in the present disclosure, but the scope of the disclosure is not limited thereto, and the scope of the disclosure should be determined by the scope of the claims.

Claims (6)

1. The silicon carbide Schottky diode comprises an epitaxial layer (2) arranged on the front surface of a silicon carbide substrate (1) and an ohmic contact electrode (11) on the back surface; a lower metal layer (12) is arranged on the ohmic contact electrode (11); it is characterized by also comprising:

a P-type doped region (3), wherein the P-type doped region (3) extends downwards from the top of the epitaxial layer (2);

a first field oxide (4), wherein the first field oxide (4) is arranged on the top of the epitaxial layer (2);

a second field oxide (5), wherein the second field oxide (5) is arranged at the top of the epitaxial layer (2) and positioned at the side part of the first field oxide (4),

the front metal contact electrode (6) is arranged above the P-type doped region (3), and the side part of the front metal contact electrode (6) is connected with the field oxide I (4);

an upper metal layer (7), the upper metal layer (7) being disposed above the front side metal contact electrode (6);

a passivation layer disposed above the upper metal layer (7) and the field oxide I (4); and

PI glue (10), the PI glue (10) is positioned on the top of the device and extends to the epitaxial layer (2) downwards through the passivation layer; and a distance is reserved between the PI glue (10) and the side part of the device to form a scribing channel (13).

2. The silicon carbide schottky diode of claim 1 wherein the passivation layer comprises:

a first passivation layer (8), wherein the first passivation layer (8) is arranged above the upper metal layer (7) and the first field oxide (4);

and the second passivation layer (9), wherein the second passivation layer (9) is arranged above the second field oxide (5).

3. The SiC Schottky diode of claim 2, wherein the first passivation layer (8) and the second passivation layer (9) are composed of a semi-insulating polysilicon layer and a silicon nitride layer from bottom to top.

4. The silicon carbide schottky diode of claim 1 wherein the second field oxide (5) and the second passivation layer (9) are matched to the scribe lane (13) regions.

5. The silicon carbide schottky diode of claim 1 wherein the first (4) and second (5) field oxides and the first (8) and second (9) passivation layers are spaced apart;

the first passivation layer (8) is wrapped on the first field oxide (4);

the second passivation layer (9) is wrapped on the second field oxide (5).

6. The silicon carbide schottky diode of claim 1 wherein the P-type doped regions have a cross-section in the form of a plurality of spaced apart rectangular structures.

Images