CN216902994U - Upright LED chip - Google Patents
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- CN216902994U CN216902994U CN202220305550.4U CN202220305550U CN216902994U CN 216902994 U CN216902994 U CN 216902994U CN 202220305550 U CN202220305550 U CN 202220305550U CN 216902994 U CN216902994 U CN 216902994U
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- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 9
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Abstract
The utility model discloses a normally-installed LED chip, which comprises a substrate, and an epitaxial layer, a current channel layer, a total reflection layer, a metal pin layer and a bonding pad layer which are sequentially stacked on the substrate, wherein the current channel layer is arranged on one side of the epitaxial layer, which deviates from the substrate; the total reflection layer covers the surfaces of the current channel layer and the epitaxial layer and is used for increasing light reflection; a connecting through hole is formed in the total reflection layer, and the bottom of the connecting through hole is communicated with the current channel layer; the metal pin layer is arranged in the connecting through hole, and the welding disc layer covers the metal pin layer and is electrically connected with the current channel layer. This application increases the inside light reflection of chip through covering the total reflection layer on the surface of epitaxial layer, reduces the internal structure to the absorption of reverberation, increases the light output of chip.
Description
Technical Field
The utility model relates to the technical field of semiconductor devices, in particular to a normally-installed LED chip.
Background
At present, light-emitting diodes (LEDs) are widely used in the semiconductor industry. In the manufacturing process of the LED chip, the LED chip needs to be packaged, and the packaging method can be divided into a forward-mounted LED chip and a flip-chip LED chip, where the forward-mounted chip generally has a smaller driving current after packaging, a smaller heat generation amount, and a higher light-emitting luminance than the flip-chip.
However, the existing forward-mounted LED chip process still adopts the design that the reflective structure is arranged on the same side of the P \ N electrode for light reflection, and firstly, the current in the light emitting process must transversely flow through the N-type gallium nitride layer, which causes current crowding, high local heat generation, and limitation of driving current; secondly, the metal of the electrode structure and the conductive channel still has a light absorption phenomenon, so that the light emitting efficiency of the normally-installed chip is low on the basis of a limited light emitting area. Generally, the existing LED chip is affected by light absorption of the internal structure, and the light output power is insufficient.
Accordingly, the prior art is yet to be improved and developed.
SUMMERY OF THE UTILITY MODEL
In view of the above-mentioned shortcomings of the prior art, the present invention is directed to a front-mounted LED chip, which is intended to solve the problem of insufficient optical output power of the conventional front-mounted LED chip.
The technical scheme of the utility model is as follows:
the normally-installed LED chip comprises a substrate, and an epitaxial layer, a current channel layer, a total reflection layer, a metal pin layer and a bonding pad layer which are sequentially stacked on the substrate, wherein the current channel layer is arranged on one side of the epitaxial layer, which is far away from the substrate; the total reflection layer covers the surfaces of the current channel layer and the epitaxial layer and is used for increasing light reflection; a connecting through hole is formed in the total reflection layer, and the bottom of the connecting through hole is communicated with the current channel layer; the metal pin layer is arranged in the connecting through hole, and the welding disc layer covers the metal pin layer and is electrically connected with the current channel layer.
The normally-installed LED chip is characterized in that the total reflection layer comprises a passivation layer and a metal layer which are sequentially stacked, one side of the passivation layer is in contact with the current channel layer and the epitaxial layer, and the other side of the passivation layer is in contact with the metal layer and is used for isolating current; the metal layer is used for reflecting light.
The normally-installed LED chip is characterized in that the passivation layer is a silicon dioxide passivation layer, and the thickness of the passivation layer is 500-1000 angstroms; and/or the metal layer is an aluminum metal layer or a silver metal layer, and the thickness of the metal layer is 500-2000 angstroms.
The LED chip is positively arranged, wherein the epitaxial layer comprises an N-type gallium nitride layer, a light-emitting layer and a P-type gallium nitride layer, the N-type gallium nitride layer comprises a stacking region and an N-electrode evaporation platform, the light-emitting layer and the P-type gallium nitride layer are sequentially stacked on the stacking region, and an N-type bonding pad is arranged on the N-electrode evaporation platform; the current channel layer is arranged on the P-type gallium nitride layer; the projection of the connecting through hole on the current channel layer is positioned on the surface of the current channel layer, which is far away from the P-type gallium nitride layer.
The LED chip is positively arranged, wherein the substrate is rectangular; the N electrode evaporation platform comprises a bar-shaped block, and the bar-shaped block is positioned on the central line of the substrate; the two current channel layers are symmetrically distributed on two sides of the strip-shaped block; the plurality of connecting through holes are uniformly distributed on the current channel layer; and a plurality of N electrode connecting pore channels are formed on the total reflection layer at intervals, and the projection positions of the N electrode connecting pore channels on the epitaxial layer are positioned on the bar-shaped block.
The forward-mounted LED chip is characterized in that the current channel layer comprises a current blocking layer and a current transmission layer, the current blocking layer is positioned on one side, away from the substrate, of the epitaxial layer, and the current blocking layer is an insulating layer; the current transmission layer is wrapped outside the current barrier layer, one side of the current transmission layer is electrically connected with the epitaxial layer, and the other side of the current transmission layer is electrically connected with the metal pin layer.
The upright LED chip is characterized in that the current blocking layer is a silicon dioxide blocking layer, and the thickness of the current blocking layer is 1000-3000 angstroms; and/or the current transmission layer is an indium tin oxide conductive layer with the thickness of 300-1000 angstroms.
The LED chip is positively arranged, wherein the metal pin layer is one of a transparent aluminum metal layer, a silver metal layer, a gold metal layer, a titanium metal layer, a nickel metal layer or a platinum metal layer; and/or the transmittance of the metal pin layer to light waves with the wavelength of 450 nanometers is greater than or equal to 50%.
The LED chip is positively mounted, wherein the pad layer is at least one of a gold metal layer, a chromium metal layer, an aluminum metal layer, a titanium metal layer and a platinum metal layer; and/or the substrate is a patterned sapphire substrate.
The normally-installed LED chip further comprises a Bragg reflector layer, and the Bragg reflector layer is arranged on one side, away from the epitaxial layer, of the substrate; wherein the Bragg reflector layer comprises at least one silicon dioxide layer and at least one titanium oxide layer which are alternately stacked.
Compared with the prior art, the embodiment of the utility model has the following advantages:
the utility model discloses a just adorn LED chip grows the epitaxial layer on the substrate after, directly deposit P type electrode not, but set up current channel layer and total reflection layer, then set up metal pin layer and pad layer and switch on the epitaxial layer again, make the light that the epitaxial layer sent not shine the pad layer at the luminous in-process of chip just by total reflection layer reflection, can not absorbed by the pad layer, reduce the absorption that chip inner structure was set a light, light can increase the light quantity of outside transmission after being reflected by the total reflection layer, thereby increase the external quantum efficiency of just adorning the LED chip, the optical output power of chip is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments described in the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a cross-sectional view of a front-mounted LED chip of the present invention;
FIG. 2 is a top view of a front mounted LED chip of the present invention;
FIG. 3 is a flow chart of the manufacturing process of the front-mounted LED chip of the present invention.
10, a substrate; 20. an epitaxial layer; 21. an N-type gallium nitride layer; 211. a stacking region; 212. an N electrode evaporation platform; 2121. a bar-shaped block; 22. a light emitting layer; 23. a P-type gallium nitride layer; 30. a current channel layer; 31. a current blocking layer; 32. a current transport layer; 40. a total reflection layer; 41. a connecting through hole; 42. a passivation layer; 43. a metal layer; 44. an N electrode connecting pore channel; 50. a metal pin layer; 60. a pad layer; 70. a Bragg mirror layer; 71. a silicon dioxide layer; 72. a titanium oxide layer.
Detailed Description
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without making any creative effort based on the embodiments in the present invention, belong to the protection scope of the present invention.
Referring to fig. 1 and fig. 2, in an embodiment of the present application, a front-mounted LED chip is disclosed, which includes a substrate 10, and an epitaxial layer 20, a current channel layer 30, an all reflection (ODR) layer 40, a metal pin layer 50, and a pad layer 60 stacked on the substrate 10 in sequence, where the current channel layer 30 is disposed on a side of the epitaxial layer 20 away from the substrate 10; the total reflection layer 40 covers the surfaces of the current channel layer 30 and the epitaxial layer 20 and is used for increasing light reflection; a connecting through hole 41 is formed on the total reflection layer 40, and the bottom of the connecting through hole 41 is communicated with the current channel layer 30; the metal lead layer 50 is disposed in the connection through hole 41, and the pad layer 60 covers the metal lead layer 50 and is electrically connected to the current channel layer 30.
After the epitaxial layer 20 grows on the substrate 10, the P-type electrode is not directly deposited, but the current channel layer 30 and the ODR layer are arranged, and then the metal pin layer 50 and the pad layer 60 are arranged to conduct the epitaxial layer 20, so that light emitted by the epitaxial layer 20 is reflected by the ODR layer without being emitted to the pad layer 60 in the chip light emitting process, and is not absorbed by the pad layer 60, the absorption of light by the internal structure of the chip is reduced, and the quantity of light transmitted outwards can be increased after the light is reflected by the ODR layer, thereby increasing the external quantum efficiency of the normally-installed LED chip, and improving the light output power of the chip.
Specifically, the shape of the connecting through hole 41 disclosed in the present embodiment may be circular, rectangular, or other shapes. Circular holes are preferably adopted, so that etching is easier and operation and processing are convenient.
Specifically, the substrate 10 disclosed in this embodiment is a patterned sapphire substrate 10. The sapphire is used as an insulator, has good stability and high hardness, and can stably grow the epitaxial layer 20 on the sapphire; in addition, sapphire has high mechanical strength and is easy to handle and clean.
As shown in fig. 1, as an implementation manner of this embodiment, it is disclosed that the epitaxial layer 20 includes an N-type gallium nitride layer 21, a light emitting layer 22, and a P-type gallium nitride layer 23, where the N-type gallium nitride layer 21 includes a stacking region 211 and an N-electrode evaporation platform 212, the light emitting layer 22 and the P-type gallium nitride layer 23 are sequentially stacked and disposed on the stacking region 211, and an N-type pad is disposed on the N-electrode evaporation platform 212; the current channel layer 30 is arranged on the P-type gallium nitride layer 23; the projection of the connecting through hole 41 on the current channel layer 30 is located on the surface of the current channel layer 30 facing away from the P-type gallium nitride layer 23. In the manufacturing process of the normally-installed LED chip, firstly, an epitaxial layer 20 with uniform thickness is grown on a substrate 10, then, etching is carried out on the epitaxial layer 20 until an N-type gallium nitride layer 21 is formed, and an N electrode evaporation platform 212 is formed and is used for being directly connected with an N-type bonding pad; a current channel layer 30 is arranged at a position outside the N electrode evaporation platform 212, on the side of the P-type gallium nitride layer 23 away from the light-emitting layer 22, and is used for introducing the current of the P-type electrode to the P-type gallium nitride layer 23; current can then be conducted through the P-type and N-type electrodes to the epitaxial layers 20, causing the light emitting layer 22 to emit light.
As shown in fig. 2, as another embodiment of the present embodiment, it is disclosed that the substrate 10 has a rectangular shape; the N-electrode evaporation platform 212 includes a strip block 2121, and the strip block 2121 is located on a central line of the substrate 10; two current channel layers 30 are symmetrically distributed on two sides of the strip block 2121; a plurality of the connecting through holes 41 are provided, and the plurality of the connecting through holes 41 are uniformly distributed on the current channel layer 30; furthermore, a plurality of N electrode connecting vias 44 are formed at intervals on the total reflection layer 40, and the positions of the projections of the plurality of N electrode connecting vias 44 on the epitaxial layer 20 are located on the strip-shaped block 2121. In the manufacturing process, cover in the time of growing total reflection layer 40 and deviate from one side of substrate 10 at epitaxial layer 20, the area of covering includes extending to the N electrode evaporation plating platform 212 that the etching was come out from P type gallium nitride layer 23 surface promptly, can increase the reflection area as far as possible like this, increase the inside reflection of LED chip, improve luminous efficiency, then, the chip structure will conduct electric current and give epitaxial layer 20, so set up the connecting through hole 41 that the bottom communicates current channel layer 30, set up N electrode connecting pore 44 in this embodiment simultaneously and communicate to N type gallium nitride layer 21, realize circuit connection.
In addition, as shown in fig. 2, in the present embodiment, the strip block 2121 is disposed on the center line of the rectangular substrate 10, the surface of the P-type gallium nitride layer 23 is roughly divided into two blocks symmetric with respect to the center line of the substrate 10 in the etching process, so that the distance between the N-electrode connecting pore 44 formed on the strip block 2121 and the current channel layers 30 on the two sides is equal, the connecting through hole 41 is used for disposing a pin to connect with the P-type electrode, and the N-electrode connecting pore 44 is used for connecting with the N-type electrode, that is, in the present embodiment, the distance between the P-type electrode and the N-type electrode is shortened, so that the current conduction of the LED chip being mounted is faster, the current diffusion is more uniform, and the external quantum efficiency is improved.
As shown in fig. 1, as another embodiment of this embodiment, it is disclosed that the current channel layer 30 includes a current blocking layer 31 and a current transmission layer 32, the current blocking layer 31 is located on a side of the epitaxial layer 20 away from the substrate 10, in this embodiment, a silicon dioxide blocking layer may be used as the current blocking layer 31, and the current blocking layer 31 having a long strip shape protruding from the surface of the epitaxial layer 20 is etched by using insulation performance, stability performance, and the like of silicon dioxide through photolithography and wet etching, so that the current blocking layer 31 is an insulating layer and can prevent charges from passing through the current blocking layer 31, and in addition, the thickness of the current blocking layer 31 in this embodiment is 1000-3000 angstroms (a), preferably 2100 angstroms.
Specifically, the current transmission layer 32 disclosed in this embodiment wraps the current blocking layer 31, and during the preparation, a sputtering process is used to sputter a transparent conductive layer — Indium Tin Oxide (ITO) onto the top surface and the side surface of the current blocking layer 31 to form the current transmission layer 32 with a thickness of 300-1000 angstroms, and preferably, the current transmission layer 32 has a thickness of 600 angstroms; one side of the bottom end of the metal pin layer is electrically connected to the epitaxial layer 20, and the other side of the top end of the metal pin layer is electrically connected to the metal pin layer 50, so that when the metal pin layer 50 conducts current to the current transmission layer 32, the current transmission layer 32 can be used as a current channel to guide the current to the epitaxial layer 20.
As shown in fig. 1 again, as another embodiment of this embodiment, it is disclosed that the ODR layer includes a passivation layer 42 and a metal layer 43 stacked in sequence, where one side of the passivation layer 42 is in contact with the current channel layer 30 and the epitaxial layer 20, and the other side is in contact with the metal layer 43 for isolating current; the metal layer 43 is used to reflect light. The ODR layer covers the outside of the current transport layer 32, as described above, that is, the outside of the current transport layer 32, so in order to prevent the electric charges of the current transport layer 32 from moving to the ODR layer, a passivation layer 42 is provided on the side contacting the epitaxial layer 20 and the current transport layer 32, blocking the current; for example, the passivation layer 42 is a silicon dioxide passivation layer 42, which has good insulation, good stability, large hardness, good light transmittance and capability of maintaining the chip structure and reducing light absorption of the internal structure of the chip; the thickness of the passivation layer 42 is 500-1000 angstroms, preferably 800 angstroms.
In addition, the ODR layer is mainly provided to reflect light and prevent light emitted from the epitaxial layer 20 from being absorbed by the internal metal pins, so that a metal layer 43, such as an aluminum metal layer 43 or a silver metal layer 43, is formed on the passivation layer 42 by evaporation, thereby reflecting light emitted from the epitaxial layer 20 toward the electrode pins, increasing the light output of the LED chip being mounted, and improving the output power; in order to ensure the reflection effect of the ODR layer, the thickness of the metal layer 43 may be set to 500-2000 angstroms, preferably 1000 angstroms.
Specifically, as another implementation manner of this embodiment, it is disclosed that the metal pin layer 50 is one of a transparent aluminum metal layer, a silver metal layer, a gold metal layer, a titanium metal layer, a nickel metal layer, or a platinum metal layer; and/or the transmittance of the metal pin layer 50 to light waves with the wavelength of 450 nanometers is greater than or equal to 50%. The metal pin layer 50 is arranged in the connecting through hole 41 and used for connecting the current channel layer 30 and the pad layer 60, the metal has good conductivity and stable conductivity, is convenient for evaporation, and can play a good effect of conducting current when used as the metal pin layer 50; the metal lead layer 50 has a high light transmittance or is a transparent layer to reduce light absorption and avoid weakening the light extraction efficiency of the chip, and in a preferred embodiment, the metal layer 43 having a transmittance of 80% for light having a wavelength of 450 nm can be selected.
In addition, the pad layer 60 in this embodiment needs to be conducted to the current channel layer 30 through the connecting via 41, and the aperture ratio of the connecting via 41 is small, so that poor contact is likely to occur, so that the structure that the metal pin layer 50 is disposed before the pad layer 60 is evaporated to fill a part of the space in the connecting via 41, and then the pad layer 60 is disposed can have better electrical connectivity, improve the conductive yield of the final product, and maintain a good light emitting state of the normally mounted LED chip.
Specifically, as another embodiment of this embodiment, it is disclosed that the pad layer 60 is at least one of a gold metal layer, a chromium metal layer, an aluminum metal layer, a titanium metal layer, and a platinum metal layer. The pad layer 60 corresponds to a P-type electrode of a chip structure, and thus an alloy layer is provided, which has good electrical and thermal conductivity and is used to form a circuit inside the chip.
As shown in fig. 1, as another implementation manner of this embodiment, it is disclosed that the front-mounted LED chip further includes a bragg reflector layer 70, where the bragg reflector layer 70 is disposed on a side of the substrate 10 away from the epitaxial layer 20; wherein the Bragg reflector layer 70 comprises at least one layer of silicon dioxide (SiO) alternately stacked2) A layer and at least one layer of titanium oxide (Ti)3O5) And (3) a layer. A bragg reflector layer 70 is further disposed on a side of the substrate 10 away from the epitaxial layer 20, so as to further increase light reflection capability inside the chip, improve brightness of the LED chip, and improve light output power. Specifically, in this embodiment, multiple silicon dioxide layers 71 and multiple titanium oxide layers 72 may be alternately disposed as required to meet the thickness requirement and the reflective performance requirement of the normally-mounted LED chip.
As shown in fig. 3 (a) to (f), as another embodiment of this embodiment, a method for manufacturing the front-mounted LED chip is disclosed as follows:
1. growing an epitaxial layer 20 on a sapphire substrate 10, wherein the epitaxial layer 20 at least comprises an N-type gallium nitride layer 21, an MQW light-emitting layer 22 and a P-type gallium nitride layer 23;
2. as shown in fig. 3 (a), the epitaxial layer 20 is etched to the N-type gallium nitride layer 21(N-GaN) to form an N-electrode evaporation platform 212;
3. as shown in fig. 3 (b), a silicon dioxide current blocking layer 31 is grown to a thickness of 2100A, and the long-strip-shaped morphology of the current blocking layer 31 is formed by photolithography and wet etching;
4. as shown in fig. 3 (b), after the current blocking layer 31 is formed, a transparent conductive layer, namely Indium Tin Oxide (ITO), is sputtered to form a current transmission layer 32 with a thickness of 600A, rapid thermal annealing is performed, and the appearance of the current transmission layer 32 wrapped on the outer surface of the current blocking layer 31 is etched by photolithography and wet etching;
5. as shown in (c) of FIG. 3, silicon dioxide (SiO) is grown2) The passivation layer 42 is 800A in thickness, and the silicon dioxide layer can be used as the passivation layer 42 of the chip to protect the chip and is also used as a first oxide layer for forming an ODR structure; etching a round connecting through hole 41 by photoetching and wet method, wherein no silicon dioxide residue exists at the connecting through hole 41;
6. then, as shown in (c) of FIG. 3, performing photolithography to ensure that no aluminum metal remains at the connecting through hole 41, and evaporating a metal aluminum layer with a thickness of 1000A after photolithography, wherein the metal aluminum layer is a metal layer 43 for forming an ODR layer; the metal aluminum layer and the silicon dioxide passivation layer 42 form a total reflection structure; then removing unnecessary metal aluminum by a stripping technology;
7. as shown in fig. 3 (d), a transparent metal pin layer 50 is formed by evaporating a thin metal layer, wherein the metal used in the metal layer can be aluminum, silver, gold, titanium, nickel, platinum, etc., and the transmittance of the metal layer to light with a wavelength of 450 nm is at least 80%, and the structure has two functions, first, the metal pin layer 50 is transparent to light to reduce the absorption of light; secondly, the metal can increase the current conduction and make the current diffusion more uniform, thereby improving the external quantum efficiency of the chip;
8. as shown in fig. 3 (e), a PAD layer 60 is deposited on the ODR layer, and a conductive path is formed by contacting the metal lead layer 50 and the current transport layer 32. The PAD layer may be made of metal: chromium/aluminum/titanium/platinum/gold (Cr/Al/Ti/Pt/Au), Al-free structures can also be used, i.e.: chromium/titanium/platinum/gold;
9. thinning the substrate 10, specifically, reducing the thickness of the substrate 10 from the side of the substrate 10 departing from the epitaxial layer 20 by using the processes of waxing, grinding, rough polishing, fine polishing, waxing, cleaning and the like, so as to reduce the thickness of the whole chip structure;
10. as shown in fig. 3 (f), a DBR structure 70 is evaporated on the bottom of the thinned substrate 10. The structure utilizes SiO2With Ti3O5Stacked and reflects light.
In the present embodiment, the ODR layer 30 is grown on the epitaxial layer 20, so that the influence of metal introduced by the conventional process on the absorption of reflected light is overcome, the light reflection inside the normally-installed LED chip is increased, and the light absorption is reduced, thereby increasing the light output power and improving the external quantum efficiency.
In summary, the present application discloses a front-mounted LED chip, which includes a substrate 10, and an epitaxial layer 20, a current channel layer 30, a total reflection (ODR) layer, a metal pin layer 50, and a pad layer 60 stacked on the substrate 10 in sequence, where the current channel layer 30 is disposed on a side of the epitaxial layer 20 away from the substrate 10; the total reflection layer 40 covers the surfaces of the current channel layer 30 and the epitaxial layer 20 and is used for increasing light reflection; a connecting through hole 41 is formed on the total reflection layer 40, and the bottom of the connecting through hole 41 is communicated with the current channel layer 30; the metal lead layer 50 is disposed in the connection via 41, and the pad layer 60 covers the metal lead layer 50 and is electrically connected to the current channel layer 30. After the epitaxial layer 20 grows on the substrate 10, the P-type electrode is not directly deposited, but the current channel layer 30 and the ODR layer are arranged, and then the metal pin layer 50 and the pad layer 60 are arranged to conduct the epitaxial layer 20, so that light emitted by the epitaxial layer 20 is reflected by the ODR layer without being emitted to the pad layer 60 in the chip light emitting process, and is not absorbed by the pad layer 60, the absorption of light by the internal structure of the chip is reduced, and the quantity of light transmitted outwards can be increased after the light is reflected by the ODR layer, thereby increasing the external quantum efficiency of the normally-installed LED chip, and improving the light output power of the chip.
It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict.
It should be noted that, the present invention takes the normally installed LED chip as an example to describe the specific structure and the operation principle of the present invention, but the application of the present invention is not limited to the normally installed LED chip, and the present invention can also be applied to the production and use of other similar workpieces.
It will be understood that the utility model is not limited to the precise arrangements described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the utility model is limited only by the appended claims.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the utility model, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.
Claims (10)
1. The normally-installed LED chip is characterized by comprising a substrate, and an epitaxial layer, a current channel layer, a total reflection layer, a metal pin layer and a bonding pad layer which are sequentially stacked on the substrate, wherein the current channel layer is arranged on one side of the epitaxial layer, which is far away from the substrate; the total reflection layer covers the surfaces of the current channel layer and the epitaxial layer and is used for increasing light reflection;
the total reflection layer is provided with a total reflection layer, wherein a connecting through hole is formed in the total reflection layer, and the bottom of the connecting through hole is communicated with the current channel layer; the metal pin layer is arranged in the connecting through hole, and the welding disc layer covers the metal pin layer and is electrically connected with the current channel layer.
2. The front-mounted LED chip as claimed in claim 1, wherein the total reflection layer comprises a passivation layer and a metal layer stacked in sequence, one side of the passivation layer is in contact with the current channel layer and the epitaxial layer, and the other side of the passivation layer is in contact with the metal layer for isolating current; the metal layer is used for reflecting light.
3. The front-mounted LED chip as recited in claim 2, wherein the passivation layer is a silicon dioxide passivation layer with a thickness of 500-1000 angstroms; and/or the metal layer is an aluminum metal layer or a silver metal layer, and the thickness of the metal layer is 500-2000 angstroms.
4. The forward LED chip according to claim 1, wherein the epitaxial layer comprises an N-type GaN layer, a light emitting layer and a P-type GaN layer, the N-type GaN layer comprises a stacking region and an N-electrode evaporation platform, the light emitting layer and the P-type GaN layer are sequentially stacked and arranged on the stacking region, and an N-type pad is arranged on the N-electrode evaporation platform; the current channel layer is arranged on the P-type gallium nitride layer; the projection of the connecting through hole on the current channel layer is positioned on the surface of the current channel layer, which is far away from the P-type gallium nitride layer.
5. The front-mounted LED chip of claim 4, wherein the substrate is rectangular in shape; the N electrode evaporation platform comprises a bar-shaped block, and the bar-shaped block is positioned on the central line of the substrate; the two current channel layers are symmetrically distributed on two sides of the strip-shaped block; the plurality of connecting through holes are uniformly distributed on the current channel layer; and a plurality of N electrode connecting pore channels are formed on the total reflection layer at intervals, and the projection positions of the N electrode connecting pore channels on the epitaxial layer are positioned on the bar-shaped block.
6. The front-mounted LED chip as recited in claim 1, wherein the current channel layer comprises a current blocking layer and a current transport layer, the current blocking layer is located on a side of the epitaxial layer facing away from the substrate, and the current blocking layer is an insulating layer; the current transmission layer is wrapped outside the current barrier layer, one side of the current transmission layer is electrically connected with the epitaxial layer, and the other side of the current transmission layer is electrically connected with the metal pin layer.
7. The front-mounted LED chip as recited in claim 6, wherein the current blocking layer is a silicon dioxide blocking layer with a thickness of 1000-3000 angstroms; and/or the current transmission layer is an indium tin oxide conductive layer with the thickness of 300-1000 angstroms.
8. The front-mounted LED chip of claim 1, wherein the metal pin layer is one of a transparent aluminum metal layer, a silver metal layer, a gold metal layer, a titanium metal layer, a nickel metal layer, or a platinum metal layer; and/or the transmittance of the metal pin layer to light waves with the wavelength of 450 nanometers is greater than or equal to 50%.
9. The front-mounted LED chip of claim 1, wherein the pad layer is at least one of a gold metal layer, a chromium metal layer, an aluminum metal layer, a titanium metal layer, and a platinum metal layer; and/or the substrate is a patterned sapphire substrate.
10. The forward-mounted LED chip of claim 1, further comprising a bragg mirror layer disposed on a side of said substrate facing away from said epitaxial layer; wherein the Bragg reflector layer comprises at least one silicon dioxide layer and at least one titanium oxide layer which are alternately stacked.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202220305550.4U CN216902994U (en) | 2022-02-08 | 2022-02-08 | Upright LED chip |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220305550.4U CN216902994U (en) | 2022-02-08 | 2022-02-08 | Upright LED chip |
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| CN216902994U true CN216902994U (en) | 2022-07-05 |
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| CN202220305550.4U Active CN216902994U (en) | 2022-02-08 | 2022-02-08 | Upright LED chip |
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