CN114824000A - Reversed-polarity red light-emitting diode chip and preparation method thereof - Google Patents

Reversed-polarity red light-emitting diode chip and preparation method thereof Download PDF

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Publication number
CN114824000A
CN114824000A CN202210270336.4A CN202210270336A CN114824000A CN 114824000 A CN114824000 A CN 114824000A CN 202210270336 A CN202210270336 A CN 202210270336A CN 114824000 A CN114824000 A CN 114824000A
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layer
ohmic contact
reversed
semiconductor layer
semiconductor
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肖和平
朱迪
王瑞瑞
吕子如
胡根水
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HC Semitek Zhejiang Co Ltd
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HC Semitek Zhejiang Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/10—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40—Materials therefor
    • H01L33/42—Transparent materials

Abstract

The disclosure provides a reversed-polarity red light emitting diode chip and a preparation method thereof, belonging to the technical field of photoelectron manufacturing. The reversed polarity red light emitting diode chip comprises a substrate, a first semiconductor layer, a light emitting layer, a second semiconductor layer, an ohmic contact layer and a transparent conducting layer which are sequentially stacked, ohmic contact is formed between the ohmic contact layer and the transparent conducting layer, the surface of the ohmic contact layer, which is far away from the second semiconductor layer, is subjected to roughening treatment, and the thickness of the transparent conducting layer is not less than the roughening depth of the ohmic contact layer. The embodiment of the disclosure can improve the light extraction effect of the chip and reduce the manufacturing cost.

Description

Reversed-polarity red light-emitting diode chip and preparation method thereof
Technical Field
The disclosure relates to the technical field of photoelectron manufacturing, in particular to a reversed-polarity red light emitting diode chip and a preparation method thereof.
Background
The Light Emitting Diode (LED) is a new product with great influence in the photoelectronic industry, has the characteristics of small volume, long service life, rich and colorful colors, low energy consumption and the like, and is widely applied to the fields of illumination, display screens, signal lamps, backlight sources, toys and the like. The core structure of the LED is a light emitting diode chip, and the manufacturing of the light emitting diode chip has great influence on the photoelectric characteristics of the LED.
An inverse-polarity red light emitting diode chip generally includes a Si substrate, an Omni-Directional Reflector (ODR) layer, a p-type layer, a light emitting layer, and an n-type layer, which are sequentially stacked. An ohmic contact layer is generally provided on the n-type layer in a region where the n-electrode is to be formed, and the n-electrode is formed on the ohmic contact layer so that the n-electrode can be electrically connected to the n-type layer. And the area surrounding the n electrode on the n-type layer is roughened so as to destroy the total reflection on the surface of the n-type layer and improve the light extraction efficiency.
However, the roughening treatment is performed on the n-type layer only in the region surrounding the ohmic contact layer, and the improvement of the light extraction effect is limited; if the ohmic contact layer is also roughened, the electrical connection between the ohmic contact layer and the n-electrode is affected, and the ohmic contact layer needs to have a thickness large enough to satisfy the roughening treatment, which increases the manufacturing cost of the chip.
Disclosure of Invention
The embodiment of the disclosure provides a reversed-polarity red light emitting diode chip and a preparation method thereof, which can improve the light extraction effect of the chip, meet the electrical connection between an ohmic contact layer and an electrode, and reduce the materials used in the ohmic contact layer manufacture so as to reduce the manufacture cost. The technical scheme is as follows:
on one hand, the embodiment of the disclosure provides a reverse polarity red light emitting diode chip, which includes a substrate, a first semiconductor layer, a light emitting layer, a second semiconductor layer, an ohmic contact layer and a transparent conductive layer that are sequentially stacked, wherein ohmic contact is formed between the ohmic contact layer and the transparent conductive layer, the surface of the ohmic contact layer, which is far away from the second semiconductor layer, is subjected to roughening treatment, and the thickness of the transparent conductive layer is not less than the roughening depth of the ohmic contact layer.
Optionally, the ohmic contact layer is an n-type AlGaInP layer, and the transparent conductive layer is an indium tin oxide film layer; in the ohmic contact layer, the content of Al component is 10-30%, and the doping concentration of Si is not less than 8E18/cm 3 。
Optionally, the thickness of the ohmic contact layer is 0.1 μm to 0.2 μm, and the coarsening depth is 0.2 μm to 1 μm; the thickness of the transparent conductive layer is 200nm to 300 nm.
Optionally, the second semiconductor layer includes an n-type AlGaInP current spreading layer and an n-type AlGaInP coarsening layer which are sequentially stacked on the light emitting layer; in the n-type AlGaInP current spreading layer, the content of Al component is 20-40%, and the doping concentration of Si is not less than 5E18/cm 3 (ii) a In the n-type AlGaInP coarsened layer, the content of Al component is 50-65%, and the doping concentration of Si is not less than 5E18/cm 3 。
Optionally, an omnidirectional mirror layer is further disposed between the substrate and the first semiconductor layer, the omnidirectional mirror layer includes an AZO layer and a plurality of MgF2 blocks, the plurality of MgF2 blocks are arranged on the surface of the first semiconductor layer away from the second semiconductor layer in an array, the AZO layer is located on the surface of the first semiconductor layer and covers the plurality of MgF2 blocks, and the thickness of the AZO layer is not less than the thickness of the MgF2 blocks in a direction perpendicular to the substrate.
Optionally, the AZO layer has a roughness Ra <0.7 nm.
Optionally, a film layer connected to the omnidirectional reflector layer in the first semiconductor layer is a p-type GaP ohmic contact layer, and in the p-type GaP ohmic contact layer, the C doping concentration is not less than 6E19/cm 3 。
Optionally, the reversed-polarity red light emitting diode further includes a first bonding layer and a second bonding layer, and the first bonding layer and the second bonding layer are sequentially stacked on the surface of the substrate; the first bonding layer comprises a Ti layer, a Pt layer, an Au layer and an In layer which are sequentially stacked on the surface of the substrate, and the second bonding layer comprises an In layer, an Au layer, a Ti layer, a Pt layer, a Ti layer and an Au layer which are sequentially stacked on the surface of the first bonding layer.
On the other hand, the embodiment of the present disclosure further provides a method for manufacturing a reversed-polarity red light emitting diode chip, where the method includes: providing a substrate; sequentially forming a first semiconductor layer, a light emitting layer and a second semiconductor layer on the substrate; an ohmic contact layer and a transparent conducting layer are sequentially formed on the surface, away from the light emitting layer, of the second semiconductor layer, ohmic contact is formed between the ohmic contact layer and the transparent conducting layer, the surface, away from the second semiconductor layer, of the ohmic contact layer is subjected to roughening treatment, and the thickness of the transparent conducting layer is not smaller than the roughening depth of the ohmic contact layer.
Optionally, the sequentially forming an ohmic contact layer and a transparent conductive layer on the surface of the second semiconductor layer far away from the light emitting layer includes: forming an n-type AlGaInP layer on the surface of the second semiconductor layer; roughening the n-type AlGaInP layer to form the ohmic contact layer; and depositing an indium tin oxide film layer on the ohmic contact layer to form the transparent conducting layer.
The beneficial effects brought by the technical scheme provided by the embodiment of the disclosure at least comprise:
the reversed-polarity red light emitting diode chip provided by the embodiment of the disclosure comprises a first semiconductor layer, a light emitting layer and a second semiconductor layer which are sequentially stacked on a substrate. The surface of the second semiconductor layer is sequentially laminated with an ohmic contact layer and a transparent conducting layer, ohmic contact is formed between the ohmic contact layer and the transparent conducting layer, the surface, far away from the second semiconductor layer, of the ohmic contact layer is subjected to roughening treatment, and the thickness of the transparent conducting layer is not smaller than the roughening depth of the ohmic contact layer so as to coat the ohmic contact layer in the transparent conducting layer.
Compared with the prior art, the whole surface of the ohmic contact layer is covered on the second semiconductor layer, and the whole surface of the ohmic contact layer is directly roughened, so that the total reflection of the ohmic contact layer can be damaged by the roughened surface of the ohmic contact layer, the roughening depth exceeds the thickness of the ohmic contact layer, and the whole surface of the second semiconductor layer is roughened equivalently, and the light extraction effect is effectively improved. And covering the ohmic contact layers with transparent conductive layers, and filling the holes among the ohmic contact layers through the transparent conductive layers so as to connect the ohmic contact layers and ensure that the ohmic contact layers have the function of ohmic contact. Therefore, the electrical connection between the ohmic contact layer and the electrode is met, and the materials adopted in the process of manufacturing the ohmic contact layer can be reduced to the greatest extent, so that the manufacturing cost of the chip is reduced.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present disclosure, and it is obvious for those skilled in the art to obtain other drawings based on the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a reversed-polarity red light emitting diode chip according to an embodiment of the disclosure;
fig. 2 is a top view of a reversed-polarity red light-emitting diode chip provided by an embodiment of the disclosure;
fig. 3 is a flowchart of a method for manufacturing a reversed-polarity red light emitting diode chip according to an embodiment of the disclosure;
fig. 4 is a diagram of a state of manufacturing a reversed-polarity red light emitting diode chip according to an embodiment of the present disclosure;
fig. 5 is a manufacturing state diagram of a reversed-polarity red light emitting diode chip according to an embodiment of the disclosure.
The individual labels in the figure are illustrated below:
11. a substrate; 12. GaAs substrate
21. A first semiconductor layer; 211. a p-type GaP ohmic contact layer; 212. a p-type GaP current spreading layer; 213. a p-type AlInP confinement layer; 22. a light emitting layer; 23. a second semiconductor layer; 231. an n-type AlGaInP current spreading layer; 232. an n-type AlGaInP roughened layer; 233. an n-type AlInP confinement layer; 24. a groove; 25. a first AlGaInP waveguide layer; 26. a second AlGaInP waveguide layer;
31. a transparent conductive layer; 32. an ohmic contact layer;
41. an AZO layer; 42. MgF 2 A block; 43. a first bonding layer; 44. a second bonding layer;
51. a first electrode; 52. a second electrode;
61. a metal layer; 62. and a protective layer.
Detailed Description
To make the objects, technical solutions and advantages of the present disclosure more apparent, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of a reversed-polarity red light emitting diode chip according to an embodiment of the disclosure. As shown in fig. 1, the reversed-polarity red light emitting diode chip includes a substrate 11, a first semiconductor layer 21, a light emitting layer 22, a second semiconductor layer 23, an ohmic contact layer 32 and a transparent conductive layer 31, which are sequentially stacked, wherein ohmic contact is formed between the ohmic contact layer 32 and the transparent conductive layer 31, the surface of the ohmic contact layer 32, which is far away from the second semiconductor layer 23, is subjected to roughening treatment, and the thickness of the transparent conductive layer 31 is not less than the roughening depth of the ohmic contact layer 32.
The reverse-polarity red light emitting diode chip provided by the embodiment of the present disclosure includes a first semiconductor layer 21, a light emitting layer 22, and a second semiconductor layer 23 sequentially stacked on a substrate 11. The ohmic contact layer 32 and the transparent conductive layer 31 are sequentially stacked on the surface of the second semiconductor layer 23, ohmic contact is formed between the ohmic contact layer 32 and the transparent conductive layer 31, the surface, far away from the second semiconductor layer 23, of the ohmic contact layer 32 is subjected to roughening treatment, and the thickness of the transparent conductive layer 31 is not less than the roughening depth of the ohmic contact layer 32, so that the ohmic contact layer 32 is wrapped in the transparent conductive layer 31.
Compared with the related art, the whole surface of the ohmic contact layer is covered on the second semiconductor layer 23, and the whole surface of the ohmic contact layer is directly roughened, so that the total reflection at the position of the ohmic contact layer can be damaged by the roughened surface of the ohmic contact layer 32, the roughening depth exceeds the thickness of the ohmic contact layer 32, and equivalently, the whole surface of the second semiconductor layer 23 is roughened, and the light extraction effect is effectively improved. The ohmic contact layers 32 are covered with transparent conductive layers 31, and the transparent conductive layers 31 fill the gaps between the ohmic contact layers 32 to connect the ohmic contact layers 32, so as to ensure that the ohmic contact layers 32 have the function of ohmic contact. Therefore, the electrical connection between the ohmic contact layer 32 and the electrode is satisfied, and the material used for manufacturing the ohmic contact layer can be reduced to the greatest extent, so that the manufacturing cost of the chip is reduced.
In the embodiment of the present disclosure, one of the first semiconductor layer 21 and the second semiconductor layer 23 may be an n-type layer, and the other of the first semiconductor layer 21 and the second semiconductor layer 23 is a p-type layer.
As an example, the first semiconductor layer 21 is a p-type layer, and the second semiconductor layer 23 is an n-type layer.
Alternatively, the ohmic contact layer 32 is an n-type AlGaInP layer, and the transparent conductive layer 31 is an Indium Tin Oxide (ITO) layer.
Wherein, in the ohmic contact layer 32, the content of Al component is 10% to 30%, and the doping concentration of Si is not less than 8E18/cm 3 。
The indium tin oxide film layer has good transmissivity and low resistivity, is convenient for carrier conduction, and improves the injection efficiency.
In the embodiment of the present disclosure, by setting the material of the ohmic contact layer 32 to be n-type AlGaInP, the content of the Al component is set to be lower, and the Si doping concentration is set to be more than 8E18/cm 3 The concentration of (b) is favorable for forming a good ohmic contact between the indium tin oxide film layer and the ohmic contact layer 32.
As an example, in the ohmic contact layer 32, the content of the Al component was 20%, and the Si doping concentration was 8E18/cm 3 。
Illustratively, the thickness of the ohmic contact layer 32 is 0.1 μm to 0.2 μm, the roughening depth is 0.2 μm to 1 μm, and the thickness of the transparent conductive layer 31 is 200nm to 300 nm.
If the thickness of the ohmic contact layer 32 is too small, it is not favorable for forming a good ohmic contact between the transparent conductive layer 31 and the ohmic contact layer 32, and the effect of the ohmic contact layer 32 on destroying the total reflection at the ohmic contact layer is influenced, which is not favorable for improving the light extraction effect; if the thickness of the ohmic contact layer 32 is set too large, more materials are used in the manufacturing process, which increases the manufacturing cost of the chip.
If the thickness of the transparent conductive layer 31 is too small, the margin is not enough to polish the transparent conductive layer 31 in the subsequent steps; if the thickness of the transparent conductive layer 31 is set too large, a large amount of material is used for manufacturing, and the manufacturing cost of the chip increases.
As an example, in the embodiment of the present disclosure, the thickness of the ohmic contact layer 32 is 0.15 μm, and the thickness of the transparent conductive layer 31 is 250 nm.
Wherein, the coarsening depth refers to a distance from the surface of the ohmic contact layer where the coarsening is started to the surface where the coarsening is finished. That is, when the roughening depth exceeds the thickness of the ohmic contact layer, the second semiconductor layer located below the ohmic contact layer is also roughened.
In the embodiment of the present disclosure, the roughness Ra of the transparent conductive layer 31 is less than 3nm, and the transparent conductive layer 31 is polished to be flat, which is beneficial to forming an electrode on the transparent conductive layer 31 in the subsequent process.
Alternatively, as shown in fig. 1, the second semiconductor layer 23 includes an n-type AlGaInP current spreading layer 231 and an n-type AlGaInP roughening layer 232 stacked in this order on the light-emitting layer 22.
Wherein, in the n-type AlGaInP current spreading layer 231, the content of Al component is 20-40%, and the doping concentration of Si is not less than 5E18/cm 3.
By setting the content of Al component in the n-type AlGaInP current spreading layer 231 to a low content and setting the Si doping concentration to be more than 5E18/cm 3 Can be beneficial to current spreading.
As an example, in the n-type AlGaInP current spreading layer 231, the content of the Al component is 30%, and the Si doping concentration is 5E18/cm 3 。
Illustratively, the thickness of the n-type AlGaInP current spreading layer 231 is 1 μm to 2 μm.
If the thickness of the n-type AlGaInP current expansion layer 231 is set too small, it is not beneficial to enhance the current expansion effect; if the thickness of the n-type AlGaInP current spreading layer 231 is set too large, a large amount of material is used for manufacturing, which increases the manufacturing cost of the chip.
Wherein, in the n-type AlGaInP coarsened layer 232, the content of the Al component is 50% to 65%. By setting the content of the Al component in the n-type AlGaInP coarsening layer 232 to a higher content, so that the content of the Al component increases and then decreases in the direction from the n-type AlGaInP current spreading layer 231 to the ohmic contact layer 32, the variation width of the Al component in the second semiconductor layer 23 can be increased to improve the light emission efficiency.
As an example, in the n-type AlGaInP roughened layer 232, the content of the Al component is 60%.
Illustratively, the thickness of n-type AlGaInP roughened layer 232 is 1 μm to 2 μm.
If the thickness of the n-type AlGaInP coarsened layer 232 is set too small, it is not favorable for forming a case where the variation width of the Al composition is large in the second semiconductor layer 23; if the thickness of the n-type AlGaInP coarsened layer 232 is set too large, more materials are used in the fabrication, and the fabrication cost of the chip is increased.
Optionally, the second semiconductor layer 23 further includes an n-type AlInP confinement layer 233, and the n-type AlInP confinement layer 233, the n-type AlGaInP current spreading layer 231, and the n-type AlGaInP roughening layer 232 are sequentially laminated on the surface of the light emitting layer 22.
Illustratively, the n-type AlInP confinement layer 233 has a thickness of 0.2 μm to 0.5 μm.
Alternatively, the light emitting layer 22 may include 3 to 8 Al x Ga 1-x N quantum well layer and Al y Ga 1-y And the N quantum barrier layers, wherein x is more than 0 and less than y is less than 1. That is, the light emitting layer 22 includes 3 to 8 periods of Al alternately stacked x Ga 1-x N quantum well layer and Al y Ga 1-y And an N quantum barrier layer.
As an example, in the embodiment of the present disclosure, the light emitting layer 22 includes 5 periods of Al alternately stacked x Ga 1-x N quantum well layer and Al y Ga 1-y And an N quantum barrier layer.
Alternatively, the thickness of the light emitting layer 22 may be 150nm to 200 nm.
Waveguide layers are provided on both opposite surfaces of the light-emitting layer 22. The refractive index can be improved by arranging the waveguide layer, so that the light emitting effect of the light emitting diode is improved.
A first AlGaInP waveguide layer 25 is formed on the first semiconductor layer 21, and a second AlGaInP waveguide layer 26 is formed on the light-emitting layer 22.
Illustratively, the thickness of the first AlGaInP waveguide layer 25 may be 50nm to 90 nm. The thickness of the second AlGaInP waveguide layer 26 may be 50nm to 90 nm.
In the embodiment of the present disclosure, the first semiconductor layer 21 includes a p-type GaP ohmic contact layer 211, a p-type GaP current spreading layer 212, and a p-type AlInP confinement layer 213, which are sequentially stacked on the substrate 11.
Illustratively, the thickness of the p-type AlInP confinement layer 213 may be 200nm to 300 nm; the thickness of the p-type GaP ohmic contact layer 211 may be 200nm to 400 nm; the thickness of the p-type GaP current spreading layer 212 is 1 μm to 2 μm.
Optionally, as shown in fig. 1, an omnidirectional mirror layer is further disposed between the substrate 11 and the first semiconductor layer 21, and the omnidirectional mirror layer includes an AZO layer 41 and a plurality of mgfs 2 Block 42, plurality of mgfs 2 The blocks 42 are arranged on the surface of the first semiconductor layer 21 far away from the second semiconductor layer 23 in an array manner, the AZO layer 41 is positioned on the surface of the first semiconductor layer 21 and covers a plurality of MgFs 2 Block 42, the thickness of the AZO layer 41 being not less than MgF in a direction perpendicular to the substrate 11 2 The thickness of the block 42.
By providing an AZO layer 41 and a plurality of MgFs on the surface of the first semiconductor layer 21 2 And a block 42, which forms an omni-directional reflector with a composite refractive index to form a primary total reflection layer, so that the primary reflectivity can be greatly improved, the light emitted by the epitaxial layer is reflected to one side of the second semiconductor layer 23, and the light emitting effect of the chip is improved.
Optionally, the roughness Ra of the AZO layer 41 is less than 0.7nm, so that the formed omnidirectional reflector has high flatness and good reflection effect.
Optionally, the film layer of the first semiconductor layer 21 connected to the omnidirectional reflector layer is a p-type GaP ohmic contact layer 211, and the C doping concentration in the p-type GaP ohmic contact layer 211 is not less than 6E19/cm 3 。
By passingThe C doping concentration of the p-type GaP ohmic contact layer 211 was set to be more than 6E19/cm 3 The first semiconductor layer 21 can be brought into good ohmic contact with the AZO layer.
Optionally, as shown in fig. 1, the reversed-polarity red light emitting diode further includes a first bonding layer 43 and a second bonding layer 44, and the first bonding layer 43 and the second bonding layer 44 are sequentially stacked on the surface of the substrate 11.
The first bonding layer 43 includes a Ti layer, a Pt layer, an Au layer, and an In layer sequentially stacked on the surface of the substrate 11, and the second bonding layer 44 includes an In layer, an Au layer, a Ti layer, a Pt layer, a Ti layer, and an Au layer sequentially stacked on the surface of the first bonding layer 43.
In the embodiment of the present disclosure, the In layer of the first bonding layer 43 and the In layer of the second bonding layer 44 are connected and bonded together, and the bonding stability of the first bonding layer 43 and the second bonding layer 44 can be improved by using the good bonding performance of In.
The Au layer and the Pt layer are further disposed in the first bonding layer 43 and the second bonding layer 44, so that a small amount of light penetrating through the omnidirectional reflector can be reflected, most of the light is reflected back to the light emitting surface, and the light emitting effect of the chip is improved. The Ti layer in the first bonding layer 43 and the second bonding layer 44 can enhance the strength of the bonding layers, so that the substrate 11 and the epitaxial layer are bonded together more stably.
Optionally, as shown in fig. 1, the reversed-polarity red light emitting diode chip further includes a first electrode 51 and a second electrode 52.
As shown in fig. 1, the surface of the transparent conductive layer 31 is further provided with a groove 24 exposing the p-type GaP ohmic contact layer 211 in the first semiconductor layer 21. The first electrode 51 is located in the recess 24 and connected to the p-type GaP ohmic contact layer 211, so that the first electrode 51 is electrically connected to the first semiconductor layer 21.
As shown in fig. 1, the second electrode 52 is disposed on the surface of the transparent conductive layer 31, and the second electrode 52 is connected to the transparent conductive layer 31 of the transparent conductive layer 31 to electrically connect to the second semiconductor layer 23 through the transparent conductive layer 31 and the ohmic contact layer 32.
The first electrode 51 is a p-type electrode, and the second electrode 52 is an n-type electrode.
Illustratively, as shown in fig. 1, the first electrode 51 may be an electrode layer covering the entire surface of the substrate 11, and the current injection efficiency is improved by increasing the area of the electrode.
Fig. 2 is a top view of a reversed-polarity red led chip according to an embodiment of the disclosure. As shown in fig. 1 and 2, the second electrode 52 is in a block shape, the second electrode 52 is located in the middle of the transparent conductive layer 31, and the second electrode 52 is in a circular shape, so as to avoid that the light is blocked by the second electrode 52 due to over-designed size, so as to affect the light emitting effect.
Alternatively, each of the first and second electrodes 52 includes a Ti layer, an Al layer, a Ti layer, a Pt layer, a Ni layer, a Sn layer, and an Au layer, which are sequentially stacked.
Wherein the thickness of the Ti layer is 50nm to 150nm, the thickness of the Al layer is 200nm to 500nm, the thickness of the Ti layer is 50nm to 150nm, the thickness of the Pt layer is 200nm to 500nm, the thickness of the Ni layer is 300nm to 700nm, the thickness of the Sn layer is 5 μm to 10 μm, and the thickness of the Au layer is 5nm to 15nm in the first electrode 51 and the second electrode 52.
As an example, the Ti layer of the first electrode 51 and the second electrode 52 has a thickness of 100nm, the Al layer has a thickness of 300nm, the Ti layer has a thickness of 100nm, the Pt layer has a thickness of 300nm, the Ni layer has a thickness of 500nm, the Sn layer has a thickness of 8 μm, and the Au layer has a thickness of 10 nm.
Optionally, as shown in fig. 1, a metal layer 61 is further deposited on the surface of the substrate 11 away from the first semiconductor layer 21. The metal layer 61 may be a Ti layer or an Au layer to further enhance the reflection effect.
Optionally, as shown in fig. 1, there is a protection layer 62 on the transparent conductive layer 31, the protection layer 62 has a through hole exposing a partial region of the transparent conductive layer 31 and the second electrode 52, and the protection layer 62 extends into the groove 24 and covers the p-type GaP ohmic contact layer 211.
Illustratively, the protective layer 62 may be Si 3 N 4 And (3) a layer.
Fig. 3 is a flowchart of a method for manufacturing a reversed-polarity red light emitting diode chip according to an embodiment of the disclosure. As shown in fig. 3, the preparation method includes:
step 101: a substrate 11 is provided.
Step 102: a first semiconductor layer 21, a light emitting layer 22, and a second semiconductor layer 23 are sequentially formed on the substrate 11.
Step 103: an ohmic contact layer 32 and a transparent conductive layer 31 are sequentially formed on the surface of the second semiconductor layer 23 remote from the light-emitting layer 22.
Ohmic contact is formed between the ohmic contact layer 32 and the transparent conductive layer 31, the surface of the ohmic contact layer 32 far away from the second semiconductor layer 23 is subjected to roughening treatment, and the thickness of the transparent conductive layer 31 is not less than the roughening depth of the ohmic contact layer 32.
The chip prepared by the preparation method provided by the embodiment of the present disclosure includes a first semiconductor layer 21, a light emitting layer 22 and a second semiconductor layer 23 which are sequentially stacked on a substrate 11. The ohmic contact layer 32 and the transparent conductive layer 31 are sequentially stacked on the surface of the second semiconductor layer 23, ohmic contact is formed between the ohmic contact layer 32 and the transparent conductive layer 31, the surface, far away from the second semiconductor layer 23, of the ohmic contact layer 32 is subjected to roughening treatment, and the thickness of the transparent conductive layer 31 is not less than the roughening depth of the ohmic contact layer 32, so that the ohmic contact layer 32 is wrapped in the transparent conductive layer 31.
Compared with the related art, the whole surface of the ohmic contact layer is covered on the second semiconductor layer 23, and the whole surface of the ohmic contact layer is directly roughened, so that the total reflection at the position of the ohmic contact layer can be damaged by the roughened surface of the ohmic contact layer 32, the roughening depth exceeds the thickness of the ohmic contact layer 32, and equivalently, the whole surface of the second semiconductor layer 23 is roughened, and the light extraction effect is effectively improved. The ohmic contact layers 32 are covered with transparent conductive layers 31, and the transparent conductive layers 31 fill the gaps between the ohmic contact layers 32 to connect the ohmic contact layers 32, so as to ensure that the ohmic contact layers 32 have the function of ohmic contact. Therefore, the electrical connection between the ohmic contact layer 32 and the electrode is satisfied, and the material used for manufacturing the ohmic contact layer can be reduced to the greatest extent, so that the manufacturing cost of the chip is reduced.
In step 101, the substrate 11 may be a flat substrate 11 or a patterned substrate 11. Illustratively, the substrate 11 is a GaAs substrate 12.
Fig. 4 is a diagram of a manufacturing state of a reversed-polarity red light emitting diode chip according to an embodiment of the disclosure. As shown in fig. 4, in step 102, the process of forming the first semiconductor layer 21, the light emitting layer 22 and the second semiconductor layer 23 includes: an etching stop layer, an n-type AlGaInP ohmic contact layer, an n-type AlGaInP coarsening layer 232, an n-type AlGaInP current extension layer 231, an n-type AlInP limiting layer 233, a second AlGaInP waveguide layer 26, a light emitting layer 22, a first AlGaInP waveguide layer 25, a p-type AlInP limiting layer 213, a p-type GaP current extension layer 212, and a p-type GaP ohmic contact layer 211 are sequentially grown on the GaAs substrate 12.
Step 103 is preceded by forming an omni-directional mirror layer on the surface of the p-type GaP ohmic contact layer 211.
As shown in fig. 4, the method may specifically include: coating a photoresist layer on the p-type GaP ohmic contact layer 211, etching the photoresist layer to form a hole-shaped arrangement pattern on the photoresist layer, and depositing MgF by electron beam evaporation 2 Forming MgF in an array arrangement 2 Block 42. After the photoresist layer is removed, MgF arranged in an array 2 An AZO layer 41 is deposited on the block 42, and the AZO layer 41 is connected with the p-type GaP ohmic contact layer 211 to form ohmic contact.
After the AZO layer 41 is formed, the surface of the AZO layer 41 may be polished to be flat by using a chemical mechanical polishing method, so that the surface roughness Ra value of the AZO layer 41 is less than 0.7 nm.
In the embodiment of the present disclosure, after forming the omnidirectional mirror layer, bonding the epitaxial structure to the Si substrate 11 may be further included.
As shown in fig. 5, the method may specifically include: an Au layer, a Ti layer, a Pt layer, a Ti layer, an Au layer, and an In layer are sequentially deposited on the surface of the AZO layer 41 as a second bonding layer 44. Then, a Si substrate 11 is provided, a Ti layer, a Pt layer, an Au layer, and an In layer are sequentially deposited on the surface of the Si substrate 11 as a first bonding layer 43, the In layers In the first bonding layer 43 and the second bonding layer 44 are bonded together during bonding, and the GaAs substrate 12 and the etch stop layer are removed by wet chemical etching.
As shown in fig. 1, the formation of the ohmic contact layer 32 and the transparent conductive layer 31 on the second semiconductor layer 23 in step 103 may include the steps of:
in the first step, an n-type AlGaInP layer is formed on the surface of the second semiconductor layer 23.
Wherein the n-type AlGaInP layer entirely covers the surface of the second semiconductor layer 23, and the thickness of the n-type AlGaInP layer may be 0.1 μm to 0.2 μm.
And secondly, roughening the n-type AlGaInP layer to form an ohmic contact layer.
Wherein, the coarsening depth is not less than the thickness of the n-type AlGaInP layer.
Coarsening the n-type AlGaInP layer by using coarsening liquid to form pores on the n-type AlGaInP layer, wherein the coarsening depth can be 0.2 mu m to 1 mu m, and the n-type AlGaInP layer is completely coarsened.
And thirdly, depositing an indium tin oxide film layer on the ohmic contact layer 32 to form a transparent conductive layer.
Wherein the transparent conductive layer 31 extends to the surface of the second semiconductor layer 23.
The ITO layer is deposited by a Plasma Deposition (RPD) method, so that the ohmic contact layer 32 and the ITO layer form ohmic contact, the surface of the ITO layer is polished to be flat by a chemical mechanical polishing mode, and the surface roughness Ra value of the ITO layer is less than 3 nm.
As shown in fig. 1, after forming the transparent conductive layer, the method may further include: forming an electrode bonding wire layer pattern on the ITO layer by using a photoetching technology, and evaporating a Ti layer, an Al layer, a Ti layer, a Pt layer, a Ni layer, a Sn layer and an Au layer to be used as a second electrode 52; defining a light emitting area by using a photoetching technology, etching off an ITO layer by using a wet method, and etching the ITO layer to a p-type GaP ohmic contact layer 211 by using an Inductively Coupled Plasma (ICP) dry method; depositing a protective layer 62 on the surface of the transparent conductive layer 31, forming an electrode hole on the protective layer 62 by using a photolithography technique, and evaporating a Ti layer, an Al layer, a Ti layer, a Pt layer, a Ni layer, a Sn layer, and an Au layer in the electrode hole as a first electrode 51; and finally, thinning the chip, depositing a metal layer 61 on the surface of the Si substrate 11, and carrying out laser cutting separation on the chip to obtain the reversed-polarity red light emitting diode chip with the designed size.
The above description is intended to be exemplary only and not to limit the present disclosure, and any modification, equivalent replacement, or improvement made without departing from the spirit and scope of the present disclosure is to be considered as the same as the present disclosure.

Claims (10)

1. The reversed-polarity red light-emitting diode chip is characterized by comprising a substrate (11), a first semiconductor layer (21), a light-emitting layer (22), a second semiconductor layer (23), an ohmic contact layer (32) and a transparent conductive layer (31) which are sequentially stacked, ohmic contact is formed between the ohmic contact layer (32) and the transparent conductive layer (31), the surface, far away from the second semiconductor layer (23), of the ohmic contact layer (32) is subjected to roughening treatment, and the thickness of the transparent conductive layer (31) is not less than the roughening depth of the ohmic contact layer (32).
2. The reversed-polarity red led chip of claim 1, wherein the ohmic contact layer (32) is an n-type AlGaInP layer, and the transparent conductive layer (31) is an ito film layer;
in the ohmic contact layer (32), the content of Al component is 10-30%, and the doping concentration of Si is not less than 8E18/cm 3 。
3. The reversed polarity red light emitting diode chip of claim 2, wherein the thickness of the ohmic contact layer (32) is 0.1 μm to 0.2 μm, and the roughening depth is 0.2 μm to 1 μm;
the thickness of the transparent conductive layer (31) is 200nm to 300 nm.
4. The reversed-polarity red light-emitting diode chip according to any one of claims 1 to 3, wherein the second semiconductor layer (23) includes an n-type AlGaInP current spreading layer (231) and an n-type AlGaInP coarsening layer (232) which are sequentially stacked on the light-emitting layer (22);
the Al component in the n-type AlGaInP current spreading layer (231)The amount is 20-40%, and the Si doping concentration is not less than 5E18/cm 3 ；
In the n-type AlGaInP coarsened layer (232), the content of Al component is 50-65%, and the doping concentration of Si is not less than 5E18/cm 3 。
5. The reversed-polarity red light-emitting diode chip according to any one of claims 1 to 3, wherein an omnidirectional reflector layer is further provided between the substrate (11) and the first semiconductor layer (21), the omnidirectional reflector layer comprising an AZO layer (41) and a plurality of MgFs 2 A block (42), the plurality of MgFs 2 The blocks (42) are arranged on the surface of the first semiconductor layer (21) far away from the second semiconductor layer (23) in an array mode, the AZO layer (41) is located on the surface of the first semiconductor layer (21) and covers the MgFs 2 A block (42) in which the thickness of the AZO layer (41) is not less than the MgF in a direction perpendicular to the substrate (11) 2 The thickness of the block (42).
6. The reversed-polarity red light-emitting diode chip of claim 5, said AZO layer (41) having a roughness Ra <0.7 nm.
7. The reversed-polarity red LED chip according to claim 5, wherein the film layer of the first semiconductor layer (21) connected to the omnidirectional reflector layer is a p-type GaP ohmic contact layer (211), and the C doping concentration in the p-type GaP ohmic contact layer (211) is not less than 6E19/cm 3 。
8. The reversed-polarity red light-emitting diode chip according to any one of claims 1 to 3, further comprising a first bonding layer (43) and a second bonding layer (44), wherein the first bonding layer (43) and the second bonding layer (44) are sequentially laminated on the surface of the substrate (11);
the first bonding layer (43) comprises a Ti layer, a Pt layer, an Au layer and an In layer which are sequentially stacked on the surface of the substrate (11), and the second bonding layer (44) comprises an In layer, an Au layer, a Ti layer, a Pt layer, a Ti layer and an Au layer which are sequentially stacked on the surface of the first bonding layer (43).
9. A preparation method of a reversed-polarity red light emitting diode chip is characterized by comprising the following steps:
providing a substrate;
sequentially forming a first semiconductor layer, a light emitting layer and a second semiconductor layer on the substrate;
an ohmic contact layer and a transparent conducting layer are sequentially formed on the surface, away from the light emitting layer, of the second semiconductor layer, ohmic contact is formed between the ohmic contact layer and the transparent conducting layer, the surface, away from the second semiconductor layer, of the ohmic contact layer is subjected to roughening treatment, and the thickness of the transparent conducting layer is not smaller than the roughening depth of the ohmic contact layer.
10. A method according to claim 9, wherein the sequentially forming an ohmic contact layer and a transparent conductive layer on the surface of the second semiconductor layer remote from the light-emitting layer comprises:
forming an n-type AlGaInP layer on the surface of the second semiconductor layer;
roughening the n-type AlGaInP layer to form the ohmic contact layer;
and depositing an indium tin oxide film layer on the ohmic contact layer to form the transparent conducting layer.
CN202210270336.4A 2022-03-18 2022-03-18 Reversed-polarity red light-emitting diode chip and preparation method thereof Pending CN114824000A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116544323A (en) * 2023-07-06 2023-08-04 江西兆驰半导体有限公司 Preparation method of LED chip and LED chip

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116544323A (en) * 2023-07-06 2023-08-04 江西兆驰半导体有限公司 Preparation method of LED chip and LED chip
CN116544323B (en) * 2023-07-06 2023-09-01 江西兆驰半导体有限公司 Preparation method of LED chip and LED chip

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