CN216699812U

CN216699812U - Suppression circuit, IGBT driver and system

Info

Publication number: CN216699812U
Application number: CN202122519551.7U
Authority: CN
Inventors: 舒露; 汤俊; 彭俊伟
Original assignee: Huawei Digital Power Technologies Co Ltd
Current assignee: Huawei Digital Power Technologies Co Ltd
Priority date: 2021-10-19
Filing date: 2021-10-19
Publication date: 2022-06-07
Anticipated expiration: 2031-10-19

Abstract

The application relates to a suppression circuit, an IGBT driver and a system. In the technical scheme, the suppression circuit is electrically connected to the IGBT chip. The IGBT chip comprises an IGBT and a current sensor. The suppression circuit comprises an input end, an output end, a grounding end, an inverter circuit and a switch tube. The input end is used for receiving a grid driving signal. The output end is electrically connected to the sampling end of the short-circuit protection circuit. The reference terminal of the short-circuit protection circuit is used for receiving a reference voltage. The grounding end is grounded, one end of the inverter circuit is electrically connected to the input end, and the first end of the switch tube is electrically connected to the other end of the inverter circuit. The second end of the switch tube is electrically connected to the output end, the third end of the switch tube is grounded, and the saturation voltage drop when the switch tube is conducted is lower than the reference voltage. The suppression circuit has simple layout and reliable function, and can effectively realize the function of preventing short circuit false triggering.

Description

Suppression circuit, IGBT driver and system

Technical Field

The application relates to the field of high-voltage power integrated circuits, in particular to a suppression circuit, an IGBT driver and an IGBT system.

Background

With the development of electric vehicles, the performance and safety requirements of vehicle-mounted Insulated Gate Bipolar Transistor (IGBT) devices/chips are higher and higher, and a method for integrating a current sensor inside an IGBT chip is widely applied to the vehicle-mounted field to realize a faster and safer short circuit protection function. However, the short-circuit protection function is limited by the device (i.e., IGBT chip) characteristics, which generate a transfer current at the device turn-off transient. The transfer current can raise the sampling voltage to cause the short-circuit protection function to be triggered by mistake, thereby causing the whole shutdown operation.

SUMMERY OF THE UTILITY MODEL

Accordingly, the present application provides a suppression circuit, an IGBT driver and a system. The suppression circuit has reliable function and simple layout, and can effectively prevent short circuit false triggering.

In a first aspect, embodiments of the present application provide a suppression circuit electrically connected to an IGBT chip. The IGBT chip comprises an IGBT and a current sensor. The gate of the IGBT is configured to receive a gate driving signal. The collector of the IGBT is used for receiving power current. The emitter of the IGBT is grounded, and the first end of the current sensor is electrically connected to the gate of the IGBT. The second terminal of the current sensor is electrically connected to the collector of the IGBT. And the third end of the current sensor is electrically connected to the emitter of the IGBT through a sampling resistor. The third end of the current sensor is also electrically connected to the sampling end of the short-circuit protection circuit. And the third end of the current sensor is used for collecting the current flowing through the IGBT, converting the collected current into sampling voltage and outputting the sampling voltage to the sampling end of the short-circuit protection circuit. The reference terminal of the short-circuit protection circuit is used for receiving a reference voltage. The suppression circuit comprises an input end, an output end, a grounding end, an inverter circuit and a switch tube. The input end is used for receiving a grid driving signal. The output end is electrically connected to the sampling end of the short-circuit protection circuit. The grounding end is grounded, one end of the inverter circuit is electrically connected to the input end, and the first end of the switch tube is electrically connected to the other end of the inverter circuit. The second end of the switch tube is electrically connected to the output end, the third end of the switch tube is grounded, and the saturation voltage drop when the switch tube is conducted is lower than the reference voltage.

Obviously, in the first aspect of the present application, the suppression circuit has a simple layout and reliable functions. The suppression circuit receives a gate drive signal through an input end, and the gate drive signal is consistent with the on-off state of a device (namely an IGBT chip). Therefore, when the IGBT chip is turned off, the suppression circuit starts to work, the switch tube is turned on, and the turned-on switch tube pulls down the sampling voltage at the two ends of the sampling resistor to the saturation voltage drop of the sampling resistor. And because the saturation voltage drop when the switch tube switches on is less than the reference voltage, consequently can make short-circuit protection circuit inoperative, do not trigger short-circuit protection promptly to can effectively restrain IGBT chip and turn off the interference of in-process transfer current to short-circuit detection, avoid short-circuit error protection, effectively realize preventing short-circuit error trigger function promptly. And when the IGBT chip works, the switching tube is cut off, and the switching tube hardly influences the sampling voltage, so that the short-circuit protection circuit can work normally. Moreover, through setting up suppression circuit, need not reduce sampling resistance again, can effectively maintain sampling precision and sensitivity, effectively promote the performance. In addition, by arranging the suppression circuit, the dependence of the short-circuit protection circuit on the consistency of the device can be reduced, namely, the process of the IGBT chip does not need to be controlled, so that the yield of the device is effectively increased, and the cost is reduced.

In one possible design, the suppression circuit further includes a pull-up resistor. One end of the pull-up resistor is electrically connected to the third end of the switch tube, and the other end of the pull-up resistor is electrically connected to the power supply. Obviously, in this design, in order to ensure the control effect of the suppression circuit, a pull-up resistor may be provided, and the resistance value of the pull-up resistor is usually made much larger than that of the sampling resistor.

In one possible design, the inverter circuit includes a first resistor, a second resistor, and a switching element. One end of the first resistor is electrically connected to the input end, and the other end is electrically connected to the first end of the switch element. The second terminal of the switching element is electrically connected to the power supply through a second resistor. The third terminal of the switching element is grounded. Obviously, in this design, the inverter circuit may include simple elements, which have a small area and a small power consumption, and the elements used are suitable for integration.

In one possible design, the inverting circuit is an inverter. In this design, it is obvious that the circuit configuration of the suppression circuit can be further simplified by directly configuring the inverter as an inverter circuit.

In one possible design, the switching element is a triode, and the first terminal of the switching element is a base, the second terminal is a collector, and the third terminal is an emitter. Or the switching element is an MOS tube, the first end of the switching element is a grid electrode, the second end of the switching element is a drain electrode, and the third end of the switching element is a source electrode. Obviously, the type of switching element and/or switching tube is not limited in this design. For example, the switching element and/or the switching tube may be any one of the following: a triode or a Metal oxide semiconductor field Effect Transistor (MOSFET, hereinafter referred to as MOS Transistor), etc. When the switching transistor is an MOS transistor, the switching transistor may be specifically a PMOS transistor or an NMOS transistor, which is not specifically limited in this embodiment of the present application.

In one possible design, the switching tube is a triode, the first end of the switching tube is a base, the second end of the switching tube is a collector, and the third end of the switching tube is an emitter. Or the switching tube is an MOS tube, the first end of the switching tube is a grid electrode, the second end of the switching tube is a drain electrode, and the third end of the switching tube is a source electrode. Obviously, the type of switching element and/or switching tube is not limited in this design. For example, the switching element and/or the switching tube may be any one of the following: a triode or a Metal oxide semiconductor field Effect Transistor (MOSFET, hereinafter referred to as MOS Transistor), etc. When the switching transistor is an MOS transistor, the switching transistor may specifically be a PMOS transistor or an NMOS transistor, which is not specifically limited in this application embodiment.

In one possible design, the suppression circuit is disposed within an IGBT driver, and the IGBT driver is configured to output the gate driving signal. Obviously, in this design, the components used in the suppression circuit are suitable for integration, and therefore can be integrated into the IGBT driver. Namely, the IGBT driver integrated with the suppression circuit can be formed, the protection performance of the IGBT driver is effectively enhanced, and the competitiveness of a chip product is improved.

In a second aspect, an embodiment of the present application provides an IGBT driver, where the IGBT driver includes a Pulse Width Modulation (PWM) module and a short-circuit protection circuit. The PWM module is used for outputting a grid driving signal to the IGBT chip. The short-circuit protection circuit is electrically connected with the IGBT chip and used for providing a short-circuit protection function for the IGBT chip. The IGBT driver further comprises a suppression circuit as in the first aspect and possible designs. The suppression circuit is used for receiving the grid driving signal and is electrically connected to the sampling end of the short-circuit protection circuit and the IGBT chip.

In one possible design, the input terminal of the suppression circuit is electrically connected to the PWM module for receiving the gate driving signal.

In one possible design, the IGBT driver further includes a transformer. The input end of the suppression circuit is electrically connected to the controller through the transformer and used for receiving a control signal of the controller. The control signal passes through the transformer and then outputs a grid driving signal.

In a third aspect, an embodiment of the present application provides an IGBT driving system, where the IGBT driving system includes an IGBT chip. The IGBT drive system further comprises an IGBT driver and a suppression circuit as in the first aspect and possible designs. The suppression circuit is electrically connected to the IGBT chip and the IGBT driver, and the IGBT chip is electrically connected to the IGBT driver.

In a fourth aspect, an embodiment of the present application provides another IGBT driving system, where the IGBT driving system includes an IGBT chip. The IGBT driving system further comprises an IGBT driver as in the second aspect and possible designs, the IGBT driver being electrically connected to the IGBT chip.

In addition, the technical effects brought by any one of the possible design manners in the second aspect to the fourth aspect can be seen in the technical effects brought by different design manners in the related suppression circuit portion, and are not described herein again.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without inventive exercise.

Fig. 1 is a schematic application diagram of a suppression circuit according to an embodiment of the present application;

fig. 2 is a schematic diagram of an internal structure of an IGBT chip provided in an embodiment of the present application;

FIG. 3 is a schematic diagram of the circuit connection between the IGBT chip and the IGBT driver and controller shown in FIG. 2;

fig. 4 is a schematic diagram of an equivalent circuit and a voltage signal of an IGBT chip and a sampling resistor provided in the embodiment of the present application;

FIG. 5 is a schematic diagram of reducing the sampling voltage by increasing the gate turn-on voltage of the current sensor;

fig. 6 is a schematic circuit diagram of the suppression circuit, the IGBT chip, the IGBT driver, and the controller according to the embodiment of the present disclosure;

fig. 7a to 7e are schematic circuit diagrams of suppression circuits according to embodiments of the present disclosure;

fig. 8 is a schematic circuit diagram of an IGBT driver, an IGBT chip, and a controller according to an embodiment of the present disclosure;

fig. 9 is another schematic circuit diagram of the IGBT driver, the IGBT chip, and the controller according to the embodiment of the present disclosure;

fig. 10 is a schematic structural diagram of an IGBT driving system provided in an embodiment of the present application;

fig. 11 is another schematic structural diagram of an IGBT driving system provided in an embodiment of the present application.

Description of the main elements

Suppression circuits

100, 100a, 100b, 100c, 100d, 100e, 35a, 501, 604

IGBT chip

200, 503, 602

IGBT driver

300, 300a, 300b, 502, 601

Controllers

400, 504, 603

IGBT 201

Current sensor 202

Gate lead J1

First emitter lead J2

Second emitter lead J3

Collector terminal pin J4

PWM module 31

Short-circuit protection circuit 33

First input pin 301

Output pin 302

Feedback pin 303

Grounding pin 304

Sampling terminal 331

Reference terminal 332

Reference voltage Vref

Sampling voltage Vsc

Voltage signal Vce

Input terminal 101

Output terminal 102

Ground terminal 103

First resistor R1

Second resistor R2

Switching elements T1, T1a

Switch tubes T2, T2a and T2d

Pull-up resistor R3

Power supply Vcc

Inverter circuit 104

Inverter T3

Transformer 36

Second input pin 305

Resistor Rg

Sampling resistor Rshunt

Gate driving signal VGG

IGBT drive system

500, 600

The following detailed description will further illustrate the present application in conjunction with the above-described figures.

Detailed Description

It is to be understood that in this application, "/" indicates an OR meaning, e.g., A/B may indicate A or B, unless otherwise indicated. In the present application, "and/or" is only an association relationship describing an association object, and means that there may be three relationships, for example, a and/or B, and may mean: a exists alone, A and B exist simultaneously, and B exists alone. "at least one" means one or more, "a plurality" means two or more.

In this application, "exemplary," "in some embodiments," "in other embodiments," and the like are used to mean serving as an example, instance, or illustration. Any embodiment or design described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments or designs. Rather, the term using examples is intended to present concepts in a concrete fashion.

Furthermore, the terms "first," "second," and the like, as used herein, are used for descriptive purposes only and not for purposes of indicating or implying relative importance or implicit indication of a number of technical features being indicated or implied as well as the order in which such is indicated or implied.

In the present application, "electrically connected" is to be understood in a broad sense, for example, "electrically connected" may refer to a direct connection physically, or may refer to an indirect connection via an intermediate medium, such as a connection via a resistor, an inductor, or other electronic devices.

Therefore, the present application provides a suppression circuit, an IGBT driver and a system. The suppression circuit has reliable function and simple layout, and can effectively prevent the short-circuit protection function from being triggered by mistake.

In order to make those skilled in the art better understand the technical solution provided by the embodiment of the present application, an application scenario of the suppression circuit provided by the embodiment of the present application is described first below.

Referring to fig. 1, fig. 1 is a schematic diagram illustrating an application of a suppression circuit 100 according to an embodiment of the present disclosure. The suppression circuit 100 is electrically connected to the IGBT chip 200 and the IGBT driver 300. IGBT chip 200 is also electrically connected to IGBT driver 300.

Referring to fig. 2, fig. 2 is a schematic diagram of an internal structure of an IGBT chip 200. As shown in fig. 2, the IGBT chip 200 includes at least an IGBT201 and a current sensor 202. The current sensor 202 is integrated inside the IGBT chip 200. In some embodiments, the current sensor 202 is also an IGBT. That is, in one embodiment, the IGBT chip 200 may include two IGBTs, wherein one IGBT is a main IGBT, and the turn-off thereof is consistent with the turn-off of the IGBT chip 200. The other IGBT is a detection IGBT for detecting the current flowing through the main IGBT. It is to be understood that, in the embodiments of the present application, for convenience of description, the current sensor 202 is described as an IGBT as an example below. Of course, in the embodiment of the present application, the type of the current sensor 202 is not limited.

The gate of the IGBT201 and the gate of the current sensor 202 are electrically connected together and to the gate pin J1 of the IGBT chip 200 for receiving a gate driving signal. The emitter of the current sensor 202 and the emitter of the IGBT201 are electrically connected to the first emitter pin J2 and the second emitter pin J3 of the IGBT chip 200, respectively. The first emitter pin J2 is used for outputting a sampling current, and the second emitter pin J3 is grounded. The collector of the IGBT201 is electrically connected together with the collector of the current sensor 202 and is electrically connected to the collector pin J4 of the IGBT chip 200 for receiving the main current (i.e., the power supply current).

Referring to fig. 3, fig. 3 is a schematic circuit diagram illustrating the IGBT chip 200, the IGBT driver 300, and the controller 400. As shown in fig. 3, the IGBT driver 300 is electrically connected to the controller 400. The controller 400 may be a Micro Controller Unit (MCU) for outputting a control signal to the IGBT driver 300.

The IGBT driver 300 is illustratively a gate driver chip, and a Pulse Width Modulation (PWM) module 31 and a short-circuit protection circuit 33 are disposed therein. The IGBT driver 300 further includes at least a first input pin 301, an output pin 302, a feedback pin 303, and a ground pin 304. The first input pin 301 is electrically connected to the controller 400 and the input terminal of the PWM module 31, and is configured to receive a control signal from the controller 400 and input the control signal to the PWM module 31. The output pin 302 is electrically connected to the output terminal of the PWM module 31 and is electrically connected to the gate pin J1 of the IGBT chip 200 (i.e., the gate of the IGBT201 and the gate of the current sensor 202 in the IGBT chip 200) through the resistor Rg for outputting the gate driving signal VGG to the IGBT chip 200. The gate driving signal VGG is used to drive the IGBT chip 200 to operate. The feedback pin 303 is electrically connected to the sampling terminal 331 of the short-circuit protection circuit 33 and to the first emitter pin J2 (i.e., the emitter of the current sensor 202) of the IGBT chip 200 for receiving the sampled current or the sampled voltage from the IGBT chip 200. The reference terminal 332 of the short-circuit protection circuit 33 is used for receiving the reference voltage Vref. The ground pin 304 is grounded.

It is understood that in the embodiment of the present application, the current sensor 202 is equivalent to a current mirror for detecting the current flowing through the IGBT201, and the magnitude of the sampled current is proportional to the current of the IGBT201, for example, 1: 10000. In order to convert the current signal sampled by the current sensor 202 into a voltage signal and detect the voltage signal, a sampling resistor Rshunt is usually connected between the emitter (i.e., the first emitter pin J2) of the current sensor 202 and the emitter (i.e., the second emitter pin J3) of the IGBT201, as shown in fig. 3. In this way, the sampling voltage Vsc across the sampling resistor Rshunt can be fed back to the short-circuit protection circuit 33 through the feedback pin 303, and when the sampling voltage Vsc exceeds a protection threshold (e.g., 1V) of the short-circuit protection circuit 33, the sampling voltage Vsc can trigger the short-circuit protection function of the short-circuit protection circuit 33. When the sampled voltage Vsc does not exceed the protection threshold (e.g., 1V) of the short-circuit protection circuit 33, the short-circuit protection circuit 33 does not operate, i.e., the short-circuit protection function of the short-circuit protection circuit 33 is not triggered, because the sampled voltage Vsc is fed back to the short-circuit protection circuit 33 through the feedback pin 303.

Referring to fig. 4, fig. 4 is a schematic diagram of an equivalent circuit of the IGBT chip 200 and the sampling resistor Rshunt shown in fig. 3, and a voltage signal Vce. When the IGBT chip 200 is in the turn-off phase, the voltage signal Vce between the collector and the emitter of the IGBT chip gradually rises, and during the voltage rise, the transfer currents Ice and Igc are generated through the junction capacitances Cgc and Cce of the current sensor 202, respectively. In this case, a part (e.g., Igc 1) of the transfer current Igc flows to the resistor Rg, and another part (e.g., Igc2) flows to the sampling resistor Rshunt through the junction capacitor Cge. Likewise, the transfer current Ice also flows through the sampling resistor Rshunt. The transfer current is proportional to the junction capacitance magnitude and the voltage rise slope. As such, the transition currents Ice, Igc2 will cause the sampled voltage Vsc across the sampled resistor Rshunt to exceed the protection threshold, thereby falsely triggering the short-circuit protection function of the short-circuit protection circuit 33, resulting in an overall shutdown operation.

Referring to fig. 5, fig. 5 is a schematic diagram illustrating that the sampling voltage Vsc is decreased by increasing the gate turn-on voltage of the current sensor 202. Specifically, by raising the gate-on voltage Vth of the current sensor 202, causing the current sensor 202 to turn off before the IGBT201, the sampled current will begin to fall earlier than the IGBT 201. When the sampling current decreases, the sampling voltage Vsc at the two ends of the corresponding sampling resistor Rshunt also decreases, so that the probability that the sampling voltage Vsc triggers the protection threshold can be reduced.

Referring to fig. 6, fig. 6 is a circuit schematic diagram of the suppression circuit 100, the IGBT chip 200, the IGBT driver 300 and the controller 400 according to the embodiment of the present application. As shown in fig. 6, in the embodiment of the present application, the electrical connection relationship between the IGBT chip 200 and the IGBT driver 300 and the controller 400 is similar to that in fig. 3, and reference may be specifically made to fig. 3 and the related description thereof, which is not repeated herein.

As shown in fig. 6, the suppression circuit 100 includes an input terminal 101, an output terminal 102 and a ground terminal 103. Illustratively, the input terminal 101 of the suppression circuit 100 is electrically connected to the output pin 302 of the IGBT driver 300 for receiving the gate driving signal VGG output from the IGBT driver 300.

The output terminal 102 of the suppression circuit 100 is electrically connected to the first emitter pin J2 of the IGBT chip 200 and the feedback pin 303 of the IGBT driver 300. The ground terminal 103 of the suppression circuit 100 is grounded. For example, in some embodiments, the ground terminal 103 of the suppression circuit 100 is electrically connected to the second emitter pin J3 of the IGBT chip 200 and the ground pin 304 of the IGBT driver 300, and is commonly grounded.

In some embodiments, the suppression circuit 100 includes a first resistor R1, a second resistor R2, a switch element T1, a switch transistor T2 and a pull-up resistor R3.

It will be appreciated that the type of switching element and/or switching tube may be any of the following: a triode or a Metal oxide semiconductor field Effect Transistor (MOSFET, hereinafter referred to as MOS Transistor), etc. When the switching transistor is an MOS transistor, the switching transistor may specifically be a PMOS transistor or an NMOS transistor, which is not specifically limited in this application embodiment.

As shown in fig. 6, in the present embodiment, the switching element T1 and the switching tube T2 are both transistors for example. Specifically, a first terminal (e.g., a base) of the switching element T1 is electrically connected to the input terminal 101 through a first resistor R1. A second terminal (e.g., a collector) of the switching element T1 is electrically connected to the power supply Vcc through a second resistor R2. The collector of the switching element T1 is also electrically connected to a first terminal (e.g., base) of the switching tube T2. The third terminal (e.g., emitter) of the switching element T1 and the third terminal (e.g., emitter) of the switching tube T2 are electrically connected together and are electrically connected to the ground terminal 103 (i.e., grounded). A second terminal (e.g., a collector) of the switching tube T2 is electrically connected to the power supply Vcc through a pull-up resistor R3. The collector of the switching tube T2 is also electrically connected to the output terminal 102, i.e., to the feedback pin 303 of the IGBT driver 300 and the first emitter pin J2 of the IGBT chip 200 (i.e., the emitter of the current sensor 202).

It is understood that, as shown in fig. 6, the first resistor R1, the second resistor R2, and the switching element T1 constitute the inverter circuit 104.

The operation of the suppression circuit 100 is described in detail below with reference to fig. 6.

When the IGBT driver 300 outputs the gate driving signal VGG to the IGBT chip 200 through the output pin 302 and the gate driving signal VGG is at a low level, the IGBT chip 200 enters an off state, and the suppression circuit 100 receives the gate driving signal VGG through the input terminal 101 and starts operating. At this time, the switching element T1 is turned off, and the switching tube T2 is turned on. Since the output terminal 102 and the ground terminal 103 of the suppression circuit 100 are electrically connected to the first emitter pin J2 and the second emitter pin J3 of the IGBT chip 200, respectively, and a sampling resistor Rshunt is connected between the first emitter pin J2 and the second emitter pin J3. Thus, when the switch T2 is turned on, the sampling voltage Vsc across the sampling resistor Rshunt is forced to be lowered to the saturation voltage drop of the switch T2, and is output to the sampling terminal 331 of the short-circuit protection circuit 33 through the feedback pin 303.

It is understood that in the embodiment of the present application, the saturation voltage drop of the switching tube T2 may be set to be lower than the protection threshold (i.e., the reference voltage Vref) of the short-circuit protection circuit 33. For example, in some embodiments, the protection threshold of the short-circuit protection circuit 33 is set to 1V, and the saturation voltage drop of the switching tube T2 is set to 0.1V. Therefore, when the sampling voltage Vsc at the two ends of the sampling resistor Rshunt is forced to be lowered to the saturation voltage drop of the switch tube T2, the saturation voltage drop of the switch tube T2 is lower than the protection threshold of the short-circuit protection circuit 33, so that the short-circuit protection circuit 33 does not work, that is, the short-circuit protection is not triggered, thereby eliminating the problem that the short-circuit protection function is triggered by mistake.

When the IGBT driver 300 outputs the gate driving signal VGG to the IGBT chip 200 through the output pin 302, and the gate driving signal VGG is at a high level, the switch element T1 in the suppression circuit 100 is turned on, and the switch transistor T2 is turned off. That is, when the gate driving signal VGG is at a high level, it has little influence on the sampling voltage Vsc, and thus, the short-circuit protection circuit 33 operates normally.

It is understood that in the embodiment of the present application, in order to ensure the control effect of the suppression circuit 100, the resistance of the pull-up resistor R3 is generally made to be much larger than the resistance of the sampling resistor Rshunt. Namely, R3> > Rshunt.

Obviously, in the embodiment of the present application, the gate driving signal output by the PWM module 31 is a PWM signal. In this way, the PWM signal can be used as an enable input of the suppression circuit 100, and the PWM signal is consistent with the on and off states of the device (i.e., the IGBT chip 200). Wherein, when the IGBT chip 200 enters a turn-off mode/state, the PWM signal enables the suppression circuit 100, thereby shielding the short-circuit protection function of the short-circuit protection circuit 33. When the IGBT chip 200 enters the turn-on mode/state, the PWM signal turns off the suppression circuit 100, and the short-circuit protection circuit 33 operates normally.

It is understood that in the embodiment of the present application, the suppression circuit 100 is usually enabled by a negative voltage or 0V. For example, the suppression circuit 100 can be enabled only when the gate driving signal VGG is low, and the second-order soft-off function thereof is not affected.

It is to be understood that, in the embodiment of the present application, the specific structure of the suppression circuit 100 is not limited. For example, please refer to fig. 7a to 7e together for further examples of the suppression circuit. As shown in fig. 7a, the circuit structure of the suppression circuit 100a is similar to that of the suppression circuit 100 shown in fig. 6, except that the switching element T1a and the switching tube T2a in the suppression circuit 100a are MOS tubes.

Illustratively, as shown in fig. 7b, the circuit configuration of the suppression circuit 100b is similar to the circuit configuration of the suppression circuit 100a shown in fig. 7a, except that no pull-up resistor R3 is provided in the suppression circuit 100 b. That is, the pull-up resistor R3 is omitted from the suppression circuit 100b to further simplify the circuit, and the drain of the switch transistor T2a in the suppression circuit 100b is directly connected to the output terminal 102.

As shown in fig. 7c, the circuit structure of the suppression circuit 100c is similar to that of the suppression circuit 100 shown in fig. 6, except that the inverter circuit 104 formed by the switching element T1, the first resistor R1 and the second resistor R2 in the suppression circuit 100 shown in fig. 6 is directly replaced by an inverter T3. That is, as shown in fig. 7c, the suppression circuit 100c includes an inverter T3, a switching tube T2, and a pull-up resistor R3. One end of the inverter T3 is electrically connected to the input terminal 101. The other end of the inverter T3 is electrically connected to the base of the switch transistor T2.

Illustratively, as shown in fig. 7d, the circuit structure of the suppression circuit 100d is similar to that of the suppression circuit 100c shown in fig. 7c, except that the switch transistor T2d in the suppression circuit 100d is a MOS transistor.

Illustratively, as shown in fig. 7e, the circuit structure of the suppression circuit 100e is similar to that of the suppression circuit 100d shown in fig. 7d, except that the pull-up resistor R3 is not provided in the suppression circuit 100 e. That is, the pull-up resistor R3 is omitted from the suppression circuit 100e, and the drain of the switch transistor T2d in the suppression circuit 100e is directly connected to the output terminal 102.

It is understood that, referring to fig. 6 again, as described above, the suppression circuit is provided independently of the IGBT driver, and of course, in other embodiments, the relationship between the suppression circuit and the IGBT driver is not limited. For example, since the suppression circuits all use resistors, triodes/MOS transistors, inverters, and other elements, the area is small, and the power consumption is low, i.e., the elements used are suitable for integration. Thus, in some embodiments, the suppression circuit may also be disposed directly within the IGBT driver, which constitutes a chip with the suppression circuit integrated.

By way of example, referring to fig. 8 together, in one case, the embodiment of the present application further provides an IGBT driver 300 a. The IGBT driver 300a includes a PWM module 31, a short-circuit protection circuit 33, and a suppression circuit 35. The PWM module 31, the short-circuit protection circuit 33, and the suppression circuit 35 are all provided in the IGBT driver 300 a. That is, the IGBT driver 300a is integrated with the suppression circuit 35.

The suppression circuit 35 may be the above-mentioned

suppression circuits

100, 100a to 100e, and refer to fig. 6, fig. 7a to fig. 7e and their related descriptions, which are not repeated herein. The input 101 of the suppression circuit 35 is electrically connected to the output of the PWM module 31. The output terminal of the PWM module 31 is also electrically connected to the output pin 302 of the IGBT driver 300a for outputting the gate driving signal VGG. The output terminal 102 of the suppression circuit 35 is electrically connected to the sampling terminal 331 of the short-circuit protection circuit 33. Sampling terminal 331 of short-circuit protection circuit 33 is also electrically connected to feedback pin 303 of IGBT driver 300 a. The ground terminal 103 of the suppression circuit 35 is electrically connected to the ground pin 304.

It can be understood that when the suppression circuit 35 works, only the first input pin 301 of the IGBT driver 300a needs to be electrically connected to the controller 400, the output pin 302 of the IGBT driver 300a is electrically connected to the gate pin J1 of the IGBT chip 200 through the resistor Rg, the feedback pin 303 of the IGBT driver 300a is electrically connected to the first emitter pin J2 of the IGBT chip 200, and the ground pin 304 of the IGBT driver 300a is grounded.

As another example, as shown in fig. 9, in another case, the embodiment of the present application further provides an IGBT driver 300 b. The IGBT driver 300b includes a PWM module 31, a short-circuit protection circuit 33, and a suppression circuit 35 a. The PWM module 31, the short-circuit protection circuit 33, and the suppression circuit 35a are all provided in the IGBT driver 300 b. That is, the IGBT driver 300b is integrated with the suppression circuit 35 a.

It is understood that IGBT driver 300b further includes a second input pin 305 and a transformer 36. The transformer 36 is disposed in the IGBT driver 300b and electrically connected to the second input pin 305. The second input pin 305 is also used to electrically connect with the controller 400 to receive a control signal of the controller 400.

The suppression circuit 35a may be the

suppression circuits

100, 100a to 100e described above, and specifically refer to fig. 6, fig. 7a to fig. 7e and their related descriptions, which are not repeated herein. The input 101 of the suppression circuit 35a is electrically connected to the second input pin 305 through the transformer 36. The output terminal 102 of the suppression circuit 35b is electrically connected to the sampling terminal 331 of the short-circuit protection circuit 33. Sampling terminal 331 of short-circuit protection circuit 33 is also electrically connected to feedback pin 303 of IGBT driver 300 b. The ground terminal 103 of the suppression circuit 35b is electrically connected to the ground pin 304 of the IGBT driver 300 b.

It can be understood that when the suppression circuit 35a works, it is only necessary to electrically connect the first input pin 301 and the second input pin 305 of the IGBT driver 300b to the controller 400, electrically connect the output pin 302 of the IGBT driver 300b to the gate pin J1 of the IGBT chip 200 through the resistor Rg, electrically connect the feedback pin 303 of the IGBT driver 300b to the first emitter pin J2 of the IGBT chip 200, and ground the ground pin 304 of the IGBT driver 300 b.

It is understood that in the embodiment of the present application, the control signal output by the controller 400 is the same as the gate driving signal VGG, for example, both low level and high level.

Obviously, the suppression circuit is arranged in the embodiment of the application, and the short-circuit protection function in the IGBT driver can be effectively suppressed from being triggered by mistake by combining the IGBT driver and the IGBT chip. Furthermore, by arranging the suppression circuit, the resistance value of the sampling resistor Rshunt does not need to be forced to be reduced in order to prevent the short-circuit protection function from being triggered by mistake, and the system performance, such as the signal sampling precision and sensitivity, can be effectively improved. In addition, the suppression circuit is arranged, so that the process of the IGBT chip is not required to be controlled, the process link is not required to be added, the IGBT chip can be realized on the system application level, the function is reliable, and the cost is low. The suppression circuit can be directly integrated into the IGBT driver, and therefore product competitiveness is effectively improved.

In summary, the suppression circuit has at least the following advantages:

(1) the interference of the transfer current of the IGBT chip to short circuit detection in the turn-off process can be inhibited, short circuit error protection is avoided, and the function of preventing short circuit error triggering is effectively realized.

(2) And the sampling resistance is allowed to be increased so as to improve the short-circuit sampling precision and sensitivity and effectively improve the performance.

(3) The dependence of the short-circuit protection circuit on the consistency of the device is reduced, the yield of the device is increased, and the cost is reduced.

(4) The components used by the suppression circuit are suitable for integration and can be integrated into the IGBT driver. Namely, the IGBT driver integrated with the suppression circuit can be formed, the protection performance of the IGBT driver is effectively enhanced, and the competitiveness of a chip product is improved.

It can be understood that, based on the suppression circuit, the IGBT driver and the IGBT chip provided in the above embodiments, the embodiments of the present application further provide an IGBT driving system, which is specifically described below with reference to the accompanying drawings.

Referring to fig. 10, fig. 10 is a schematic block diagram of an IGBT driving system 500 according to an embodiment of the present disclosure. The IGBT driving system 500 includes a suppression circuit 501, an IGBT driver 502, an IGBT chip 503, and a controller 504. Wherein the controller 504 is electrically connected to the IGBT driver 502. The suppression circuit 501 is provided independently of the IGBT driver 502, and electrically connects the IGBT driver 502 and the IGBT chip 503. The IGBT chip 503 is electrically connected to the IGBT driver 502.

It is to be understood that the suppression circuit 501 may be the above-described

suppression circuits

100, 100a to 100e, and specifically refer to fig. 6, fig. 7a to fig. 7e and their related descriptions, which are not repeated herein. The controller 504, the IGBT driver 502, and the IGBT chip 503 are the controller 400, the IGBT driver 300, and the IGBT chip 200 described above, and reference may be specifically made to fig. 6 and the related description thereof, and the embodiments of the present application are not described herein again.

Referring to fig. 11, fig. 11 is a schematic block diagram of another IGBT driving system 600 according to an embodiment of the present application. The IGBT driving system 600 includes an IGBT driver 601, an IGBT chip 602, and a controller 603. The IGBT driver 601 is electrically connected to the IGBT chip 602 and the controller 603. IGBT driver 601 includes a suppression circuit 604. That is, the IGBT driver 601 is integrated with the suppression circuit 604.

It is to be understood that the suppression circuit 604 may be the above-described

suppression circuits

100, 100a to 100e, and specifically refer to fig. 6, fig. 7a to fig. 7e and their related descriptions, which are not repeated herein. The controller 603, the IGBT driver 601 and the IGBT chip 602 may be the controller 400, the

IGBT drivers

300a, 300b and the IGBT chip 200 described above, and specific reference may be made to fig. 8, fig. 9 and the related description thereof, which is not repeated herein in this embodiment of the application.

It should be understood that the embodiments of the present application may be arbitrarily combined, for example, may be used alone, or may be used in combination with each other to achieve different technical effects, which is not limited thereto.

The above description is only an embodiment of the present application, but the scope of the present application is not limited thereto, and any changes or substitutions within the technical scope of the present disclosure should be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A suppression circuit is electrically connected to a vehicle-mounted Insulated Gate Bipolar Transistor (IGBT) chip, the IGBT chip comprises an IGBT and a current sensor, the grid of the IGBT is used for receiving a grid driving signal, the collector of the IGBT is used for receiving power current, the emitter of the IGBT is grounded, a first end of the current sensor is electrically connected to the grid of the IGBT, a second end of the current sensor is electrically connected to the collector of the IGBT, a third end of the current sensor is electrically connected to the emitter of the IGBT through a sampling resistor, the third end of the current sensor is also electrically connected to a sampling end of a short-circuit protection circuit, the third end of the current sensor is used for collecting current flowing through the IGBT and converting the collected current into sampling voltage to be output to the sampling end of the short-circuit protection circuit, and a reference end of the short-circuit protection circuit is used for receiving reference voltage, wherein the suppression circuit comprises:

an input to receive the gate drive signal;

the output end is electrically connected to the sampling end of the short-circuit protection circuit;

a ground terminal, the ground terminal being grounded;

an inverter circuit having one end electrically connected to the input terminal;

a first end of the switching tube is electrically connected to the other end of the inverter circuit, a second end of the switching tube is electrically connected to the output end, a third end of the switching tube is grounded, and the saturation voltage drop of the switching tube when the switching tube is conducted is lower than the reference voltage.

2. The suppression circuit of claim 1, wherein: the suppression circuit further comprises a pull-up resistor, one end of the pull-up resistor is electrically connected to the third end of the switching tube, and the other end of the pull-up resistor is electrically connected to a power supply.

3. The suppression circuit of claim 1, wherein: the inverting circuit is an inverter.

4. The suppression circuit of claim 1, wherein: the inverter circuit comprises a first resistor, a second resistor and a switch element, wherein one end of the first resistor is electrically connected to the input end, the other end of the first resistor is electrically connected to a first end of the switch element, a second end of the switch element is electrically connected to a power supply through the second resistor, and a third end of the switch element is grounded.

5. The suppression circuit of claim 4, wherein: the switching element is a triode, the first end of the switching element is a base electrode, the second end of the switching element is a collector electrode, and the third end of the switching element is an emitter electrode; or,

the switch element is a metal oxide semiconductor field effect transistor (MOS) transistor, the first end of the switch element is a grid electrode, the second end of the switch element is a drain electrode, and the third end of the switch element is a source electrode.

6. The suppression circuit of claim 1, wherein: the switching tube is a triode, the first end of the switching tube is a base electrode, the second end of the switching tube is a collector electrode, and the third end of the switching tube is an emitter electrode; or,

the switch tube is an MOS tube, the first end of the switch tube is a grid electrode, the second end of the switch tube is a drain electrode, and the third end of the switch tube is a source electrode.

7. The suppression circuit of claim 1, wherein: the suppression circuit is arranged in an IGBT driver, and the IGBT driver is used for outputting the grid driving signal.

8. An IGBT driver comprising a Pulse Width Modulation (PWM) module and a short-circuit protection circuit, wherein the PWM module is configured to output a gate driving signal to an IGBT chip, and the short-circuit protection circuit is electrically connected to the IGBT chip and configured to provide a short-circuit protection function for the IGBT chip, and the IGBT driver further comprises the suppression circuit according to any one of claims 1 to 6, the suppression circuit is configured to receive the gate driving signal, and the suppression circuit is further electrically connected to a sampling terminal of the short-circuit protection circuit and the IGBT chip.

9. The IGBT driver of claim 8, wherein: the input end of the suppression circuit is electrically connected to the PWM module and used for receiving the grid driving signal.

10. The IGBT driver of claim 8, wherein: the IGBT driver further comprises a transformer, wherein the input end of the suppression circuit is electrically connected to the controller through the transformer and used for receiving a control signal of the controller, and the control signal passes through the transformer and then outputs the grid driving signal.

11. An IGBT driving system comprising an IGBT chip, characterized in that the IGBT driving system further comprises an IGBT driver and the suppression circuit according to any one of claims 1 to 6, the suppression circuit being electrically connected to the IGBT chip and the IGBT driver, the IGBT chip being electrically connected to the IGBT driver.

12. An IGBT driving system comprising an IGBT chip, characterized in that the IGBT driving system further comprises an IGBT driver according to any one of claims 8 to 10, the IGBT driver being electrically connected to the IGBT chip.