CN216084905U - CdTe/crystalline silicon laminated cell - Google Patents

CdTe/crystalline silicon laminated cell Download PDF

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CN216084905U
CN216084905U CN202122806866.XU CN202122806866U CN216084905U CN 216084905 U CN216084905 U CN 216084905U CN 202122806866 U CN202122806866 U CN 202122806866U CN 216084905 U CN216084905 U CN 216084905U
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cdte
cell
layer
silicon
crystalline silicon
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李春秀
钱洪强
张静全
张树德
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Sichuan University
Suzhou Talesun Solar Technologies Co Ltd
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Sichuan University
Suzhou Talesun Solar Technologies Co Ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
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    • Y02E10/50Photovoltaic [PV] energy

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Abstract

The application relates to a CdTe/crystalline silicon laminated cell, which comprises a metal back electrode, a silicon-based sub-cell, a first transparent conductive film, a cell back contact layer, a CdTe absorption layer, a third passivation layer, a window layer, a second transparent conductive film and a metal front electrode which are sequentially connected from bottom to top. According to the CdTe solar cell, the CdTe absorption layer is used as the absorption layer of the silicon-based sub-cell, the solar spectrum utilization range of the absorption layer is widened, the conversion efficiency of the silicon-based sub-cell is improved, meanwhile, the stability of the CdTe/crystalline silicon laminated cell is higher, and the service life of the cell is longer.

Description

CdTe/crystalline silicon laminated cell
[ technical field ] A method for producing a semiconductor device
The application relates to a CdTe/crystalline silicon tandem cell, belonging to the technical field of photovoltaic cells.
[ background of the invention ]
Silicon cell technology is the most prominent photovoltaic technology in the market, and accounts for over 90% of the market share. Silicon single junction cells are the most commonly used silicon cell technology in the market, and their industrial efficiency is close to their theoretical maximum conversion efficiency, so that the cost is difficult to continue to decrease.
Limited by the Shockley-Queisser limit, the highest theoretical efficiency of the silicon single-junction cell is low, the utilization rate of solar spectrum is low, the cell conversion efficiency is low, the cell stability is poor, and the service life is short.
Accordingly, there is a need for improvements in the art that overcome the deficiencies in the prior art.
[ Utility model ] content
The application aims to provide a crystalline silicon tandem cell adopting a CdTe material as an absorption layer.
The purpose of the application is realized by the following technical scheme: a CdTe/crystalline silicon laminated cell comprises a metal back electrode, a silicon-based sub-cell, a first transparent conductive film, a cell back contact layer, a CdTe absorption layer, a third passivation layer, a window layer, a second transparent conductive film and a metal front electrode which are sequentially connected from bottom to top.
Further, the silicon-based sub-battery comprises a first passivation layer, P + type silicon, a second passivation layer, a P-type crystalline silicon layer and N + type silicon which are sequentially connected from bottom to top.
Further, the metal front electrode and the P + -type silicon have an ohmic contact region.
Further, the second passivation layer is ultra-thin silicon oxide.
Furthermore, the N + type silicon is used as an emitter of the silicon-based sub-cell and forms a PN junction together with the P-type crystalline silicon layer so as to separate photon-generated carriers.
Furthermore, the battery back contact layer is ZnTe: Cu.
Further, the CdTe absorption layer is P-type CdTe.
Further, the third passivation layer is one of a CdSe or CdSeTe ternary thin film.
Further, the window layer is one of a CdS layer, a ZMO layer or a ZMO and CdS stack.
Compared with the prior art, the method has the following beneficial effects: according to the solar cell, the absorption capacity of the CdTe material is increased as the absorption layer of the silicon substrate laminated cell, the defect that the conversion efficiency of a traditional silicon unijunction cell is low is overcome, the effective utilization rate of the cell to solar spectrum is improved, and the conversion efficiency and the stability of the cell are improved.
[ description of the drawings ]
FIG. 1 is a schematic structural diagram of a CdTe/crystalline silicon tandem cell in an embodiment of the application;
FIG. 2 is a flow chart of a method for preparing a CdTe/crystalline silicon tandem cell according to the embodiment of the application.
[ detailed description ] embodiments
In order to make the aforementioned objects, features and advantages of the present application more comprehensible, embodiments accompanying the present application are described in detail below with reference to the accompanying drawings. It is to be understood that the specific embodiments described herein are merely illustrative of the application and are not limiting of the application. It should be further noted that, for the convenience of description, only some of the structures related to the present application are shown in the drawings, not all of the structures. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The terms "comprising" and "having," as well as any variations thereof, in this application are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.
Referring to fig. 1, a CdTe/crystalline silicon stacked cell according to an embodiment of the present invention includes a metal back electrode 1, a silicon-based sub-cell, a first transparent conductive film 7, a cell back contact layer 8, a CdTe absorption layer 9, a third passivation layer 10, a window layer 11, a second transparent conductive film 12, and a metal front electrode 13, which are sequentially connected from bottom to top.
Wherein, the silicon-based sub-battery comprises a first passivation layer 2 and a first P sequentially connected from bottom to top+Type silicon 3, second passivation layer 4, P-type crystalline silicon layer 5, and N+Type 6 silicon.
In this embodiment, the first passivation layer 2 may be made of one of aluminum oxide or silicon oxide for improving the stability and the service life of the battery, and has an opening therein, and the metal back electrode 1 is disposed in the opening, so that the metal front electrode 13 and the metal back electrode P are connected to each other+The type silicon 3 is formed with an ohmic contact region. P+The type silicon 3 and the P-type crystalline silicon layer 5 together form the cell local back surface field. The second passivation layer 4 is ultra-thin silicon oxide, and in the present embodiment, the thickness of the second passivation layer 4 is 1 to 2 nm.
N+The type silicon 6 is used as an emitter of the silicon-based subcell in this embodiment, and forms a PN junction together with the P-type crystalline silicon layer 5 to separate photo-generated carriers, wherein the thickness of the P-type crystalline silicon layer 5 is between 120 μm and 160 μm.
The first transparent conductive film 7 and the second transparent conductive film 12 may be one of FTO, ITO, or CTO, and are not particularly limited as long as they have good conductive and light-transmitting properties.
The battery back contact layer 8 has important influence on the performance and reliability of the photovoltaic battery, in this embodiment, the material of the battery back contact layer 8 is ZnTe: Cu, the Cu concentration is 6-7% (atomic percent), and the total thickness of the battery back contact layer 8 is 70-120 nm. The cell back contact layer 8 made of ZnTe Cu has high-efficiency light-capturing capacity and can capture more weak absorption light, and on the other hand, the effective light-reflecting characteristic can directly reflect light which cannot be absorbed back. The reflected light may be scattered directly into the absorption layer to form a photocurrent.
The passivation layer can reduce defect recombination on the surface of the battery, so that the open-circuit voltage of the battery is improved, the efficiency of the battery is further improved, and the effective service life of the passivated battery can be obviously prolonged. In this embodiment, the material of the third passivation layer 10 may be one of CdSe or CdSeTe ternary thin films, and the thickness is between 30 nm and 120nm, which has more excellent optical properties and stability compared with the common aluminum oxide and silicon oxide films, and can further improve the service life of the battery.
The absorption layer is used for absorbing solar energy in sunlight, and in the embodiment, the material of the CdTe absorption layer 9 is a P-type CdTe thin film, and the thickness is 1-2 μm. In this embodiment, the third passivation layer 10, besides playing a role of passivation to improve the stability and the service life of the cell, can also provide Se element for the absorption layer to form a CdSeTe absorption layer, the forbidden bandwidth of the CdSeTe absorption layer is between 1.35-1.72 eV, and is greater than the forbidden bandwidth of the silicon-based sub-cell absorption layer by 1.2eV, so that more solar energy can be absorbed, the defect of low conversion efficiency of the conventional silicon-based sub-cell is further improved, the effective utilization rate of the cell to the solar spectrum is improved, and the conversion efficiency of the cell is further improved.
The window layer 11 can be made of a CdS layer, a ZMO layer or a ZMO and CdS laminated layer, the thickness of the window layer is 30-120 nm, the window layer has a large forbidden bandwidth, a wide light transmission range and an absorption coefficient of a crossed bottom, more light can penetrate through the window layer 11 and is not absorbed, and therefore the conversion efficiency of the cell is improved.
In the embodiment, the metal back electrode 1 and the metal front electrode 13 are made of one of Au or Ag, and the thickness is between 100 nm and 300 nm. In other embodiments, other materials may be selected according to practical situations, and are not limited specifically herein as long as the requirement of conductivity is met.
Referring to fig. 2, the present application also provides a method for preparing a CdTe/crystalline silicon tandem cell, which is used for preparing the CdTe/crystalline silicon tandem cell, and includes:
s1: preparing a silicon-based sub-battery;
specifically, a P-type silicon wafer is cleaned, and N with higher phosphorus doping concentration is deposited on the front surface of the silicon wafer+The thickness of the type polysilicon is 10-200 nm, and the method can be LPCVD in-situ doping, or firstly depositing the polysilicon layer by LPCVD and then doping by diffusion or ion implantation. Wherein, if a diffusion method is adopted, the phosphorosilicate glass generated by diffusion needs to be removed by hydrofluoric acid. And then growing a silicon oxide thin layer on the back surface of the P-type silicon wafer by a thermal oxidation or wet chemical oxidation method. Then depositing P with higher boron doping concentration on the back of the silicon oxide thin layer+The method of the polysilicon can be LPCVD in-situ doping, or LPCVD is adopted to deposit a polysilicon layer firstly, and then diffusion or ion implantation is adopted to carry out doping. Wherein if a diffusion method is used, borosilicate glass produced by diffusion needs to be removed with hydrofluoric acid. Then at P+And depositing a passivation layer on the back surface of the type polysilicon by adopting a PECVD method. Then, laser opening is carried out on the passivation layer on the back of the P-type silicon wafer to expose P+And (4) forming polycrystalline silicon. And finally, screen printing metallization slurry on the back of the P-type silicon wafer, and sintering to finish metallization.
S2: preparing a first transparent conductive film 7 on the front surface of the prepared silicon-based sub-battery by adopting a magnetron sputtering method;
s3, preparing a battery back contact layer 8 on the first transparent conductive film 7 by adopting a co-evaporation method;
s4, preparing a CdTe absorption layer 9 on the battery back contact layer 8 by a near space sublimation method or a vapor transportation method;
s5, preparing a third passivation layer 10 on the CdTe absorption layer 9 by a near space sublimation method or a vapor transportation method;
s6, preparing a window layer 11 on the third passivation layer 10 by adopting a radio frequency magnetron sputtering method;
s7, preparing a second transparent conductive film 12 on the window layer 11 by a radio frequency magnetron sputtering method;
s8, a metal front electrode 13 is formed on the second transparent conductive film 12 by a screen printing method or an evaporation method.
To sum up, this application is through adopting the CdTe material as the absorbed layer of silicon-based sub-tandem cell, and the increase is to the absorptive capacity of solar energy, and then improves the shortcoming that traditional silicon unijunction cell conversion efficiency is low, improves the effective utilization ratio of battery to the solar spectrum, promotes battery conversion efficiency and stability.
The above is only one specific embodiment of the present application, and any other modifications based on the concept of the present application are considered as the protection scope of the present application.

Claims (9)

1. A CdTe/crystalline silicon laminated cell is characterized by comprising a metal back electrode, a silicon-based sub-cell, a first transparent conductive film, a cell back contact layer, a CdTe absorption layer, a third passivation layer, a window layer, a second transparent conductive film and a metal front electrode which are sequentially connected from bottom to top.
2. The CdTe/crystalline silicon tandem cell of claim 1, wherein said silicon-based subcell comprises a first passivation layer, P, sequentially connected from bottom to top+Type silicon, second passivation layer, P-type crystalline silicon layer, and N+And (4) type silicon.
3. The CdTe/crystalline silicon tandem cell of claim 2, wherein said metal front electrode and said P+Type silicon has ohmic contact regions.
4. The CdTe/crystalline silicon tandem cell of claim 2, wherein the second passivation layer is ultra-thin silicon oxide.
5. The CdTe/crystalline silicon tandem cell of claim 2, wherein said N+And the type silicon is used as an emitter of the silicon-based sub-cell and forms a PN junction together with the P-type crystalline silicon layer so as to separate photon-generated carriers.
6. The CdTe/crystalline silicon tandem cell of claim 1, wherein said cell back contact layer is ZnTe: Cu.
7. The CdTe/crystalline silicon tandem cell of claim 1, wherein said CdTe absorber layer is a P-type CdTe.
8. The CdTe/crystalline silicon tandem cell of claim 1, wherein the third passivation layer is one of CdSe or CdSeTe ternary system thin film.
9. The CdTe/crystalline silicon laminate cell of claim 1, wherein the window layer is one of a CdS layer, a ZMO layer, or a ZMO and CdS laminate.
CN202122806866.XU 2021-11-12 2021-11-12 CdTe/crystalline silicon laminated cell Active CN216084905U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202122806866.XU CN216084905U (en) 2021-11-12 2021-11-12 CdTe/crystalline silicon laminated cell

Publications (1)

Publication Number Publication Date
CN216084905U true CN216084905U (en) 2022-03-18

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