CN215987227U

CN215987227U - Computer and mainboard and wake-up circuit thereof

Info

Publication number: CN215987227U
Application number: CN202121800503.9U
Authority: CN
Inventors: 孙成思; 孙日欣; 谢志响
Original assignee: Biwin Storage Technology Co Ltd
Current assignee: Biwin Storage Technology Co Ltd
Priority date: 2021-08-03
Filing date: 2021-08-03
Publication date: 2022-03-08
Anticipated expiration: 2031-08-03

Abstract

The utility model discloses a wake-up circuit which comprises a voltage stabilizing module and a one-way conduction module electrically connected with the voltage stabilizing module, wherein the input end of the voltage stabilizing module is electrically connected with a power supply, and the output end of the one-way conduction module is electrically connected with a solid state disk interface. According to the utility model, the PEREST at the host terminal is at a high level by utilizing the unidirectional conduction performance of the unidirectional conduction module when the solid state disk is in a standby state, so that the solid state disk can be awakened at any time through a mouse or a keyboard. In addition, the utility model also discloses a computer and a mainboard.

Description

Computer and mainboard and wake-up circuit thereof

Technical Field

The utility model relates to the technical field of computer mainboards, in particular to a computer, a mainboard and a wake-up circuit thereof.

Background

The solid state disk is composed of a control unit and a storage unit (a FLASH chip and a DRAM chip) and used for storing data.

After the existing solid state disk is installed on some mainboards, as GPIO Power of the solid state disk reversely flows current to an input end Power supply of the solid state disk, high level on PEREST of the mainboards is pulled down, when a keyboard or a mouse acts, the PEREST cannot provide a level signal pulled down by the high level to the mainboards, and therefore the mainboards cannot wake up the solid state disk after not receiving the signal.

SUMMERY OF THE UTILITY MODEL

The utility model mainly aims to provide a wake-up circuit to solve the technical problem that the existing solid state disk cannot be woken up by a mouse or a keyboard in a standby state.

In order to achieve the above object, the present invention provides a wake-up circuit, which includes a voltage stabilizing module and a unidirectional conducting module electrically connected to the voltage stabilizing module, wherein the voltage stabilizing module has an input end, and the unidirectional conducting module has an output end.

Preferably, the voltage stabilizing module is a voltage stabilizing chip.

Preferably, the voltage stabilizing chip has five pins, a first pin of the five pins is electrically connected with the unidirectional conducting module, a second pin and a fifth pin of the five pins are grounded, and a third pin and a fourth pin of the five pins are electrically connected to serve as input terminals of the voltage stabilizing module.

Preferably, a third pin of the five pins is electrically connected with a fourth pin of the five pins through a pull-up resistor.

Preferably, the unidirectional conduction module is a zener diode, an anode of the zener diode is electrically connected to the zener module, and a cathode of the zener diode is used as an output end of the unidirectional conduction module.

Preferably, the wake-up circuit further includes a first filter capacitor, one end of the first filter capacitor is electrically connected to the output end of the unidirectional conducting module, and the other end of the first filter capacitor is grounded.

Preferably, the wake-up circuit further includes a second filter capacitor, one end of the second filter capacitor is electrically connected to the input end of the voltage stabilizing module, and the other end of the second filter capacitor is grounded.

Preferably, the voltage stabilizing chip is an LD0 chip.

The utility model further provides a mainboard, which comprises the wake-up circuit, wherein the wake-up circuit comprises a voltage stabilizing module and a one-way conduction module electrically connected with the voltage stabilizing module, the input end of the voltage stabilizing module is electrically connected with a power supply, and the output end of the one-way conduction module is electrically connected with a solid state disk interface.

The utility model further provides a computer, which comprises the mainboard, wherein the mainboard comprises the wake-up circuit, the wake-up circuit comprises a voltage stabilizing module and a one-way conduction module electrically connected with the voltage stabilizing module, the input end of the voltage stabilizing module is used for being electrically connected with a power supply, and the output end of the one-way conduction module is used for being electrically connected with a solid state disk interface.

The wake-up circuit provided by the embodiment of the utility model utilizes the unidirectional conduction performance of the unidirectional conduction module when the solid state disk is in a standby state, so that the PEREST at the host end is at a high level, and the solid state disk can be woken up at any time through a mouse or a keyboard.

Drawings

FIG. 1 is a block diagram of a wake-up circuit according to an embodiment of the present invention;

fig. 2 is a circuit diagram of a wake-up circuit according to an embodiment of the utility model.

Detailed Description

Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are exemplary and intended to be illustrative of the present invention and should not be construed as limiting the present invention, and all other embodiments that can be obtained by one skilled in the art based on the embodiments of the present invention without inventive efforts shall fall within the scope of protection of the present invention.

The utility model provides a wake-up circuit, as shown in fig. 1, the wake-up circuit includes a voltage stabilizing module 10 and a unidirectional conducting module 20 electrically connected to the voltage stabilizing module 10, an input end of the voltage stabilizing module 10 is used for electrically connecting to a power supply, and an output end of the unidirectional conducting module 20 is used for electrically connecting to a solid state disk interface.

In this embodiment, the voltage regulation module 10 may adopt a corresponding voltage regulation chip U1, and the unidirectional conducting module 20 may be a unidirectional conducting circuit directly serving as a diode or using a plurality of MOS transistors. The input terminal of the voltage stabilizing module 10 is used to electrically connect to a 3.3V power supply, and the output terminal of the unidirectional conducting module 20 is used to electrically connect to a VCCGQ (i.e., a solid state disk interface on a motherboard). Under the normal state, the output voltage is stabilized at 3.3V by the voltage stabilizing module 10 and is supplied to VCCGQ; in the standby state, the external power source no longer supplies power, and the threshold at the host end is at a high level, and since the unidirectional conductive module 20 is in unidirectional conduction, the high level of the threshold does not flow backward to V3.3V through VCCGQ, so that the threshold level becomes low. The PERREST can still be kept at a high level, and when a peripheral keyboard and mouse signal is input, the host can inform the solid state disk to wake up through the PERREST. In this embodiment, the unidirectional conducting performance of the unidirectional conducting module 20 is utilized in the standby state of the solid state disk, so that the term at the host end is at a high level, thereby facilitating to wake up the solid state disk at any time through a mouse or a keyboard.

In a preferred embodiment, as shown in fig. 2, the voltage regulator chip U1 preferably has five pins, a first pin of the five pins is electrically connected to the unidirectional conductive module 20, a second pin of the five pins is electrically connected to the fifth pin, and a third pin of the five pins is electrically connected to the fourth pin to serve as an input terminal of the voltage regulator module 10. Wherein, preferred steady voltage chip U1 is LD0 steady voltage chip U1, and first stitch is the OUT stitch, and the second stitch is the GND stitch, and the third stitch is the EN stitch, and the fourth stitch is the IN stitch, and the fifth stitch is the SGND stitch.

In a preferred embodiment, as shown in FIG. 2, a third pin of the five pins is preferably electrically connected to a fourth pin of the five pins through a pull-up resistor R1. The value of the pull-up resistor R1 is preferably 51K Ω, so as to avoid providing a high level to the third pin and limit the current to protect the third pin from breakdown.

In a preferred embodiment, as shown in fig. 2, the unidirectional conducting module 20 is preferably a zener diode D1, the anode of the zener diode D1 is electrically connected to the zener module 10, and the cathode of the zener diode D1 serves as the output terminal of the unidirectional conducting module 20. The zener diode D1 is preferably a diode with a small reverse current, so that the PERSET pin can maintain a high level state after the solid state disk enters a standby state.

In a preferred embodiment, as shown in fig. 2, the wake-up circuit further preferably includes a first filter capacitor C2, one end of the first filter capacitor C2 is electrically connected to the output terminal of the unidirectional conducting module 20, and the other end is grounded. Among them, the first filter capacitor C2 preferably has a capacitance of 4.7 μ F, so as to facilitate filtering of the input current.

In a preferred embodiment, as shown in fig. 2, the wake-up circuit further comprises a second filter capacitor C1, one end of the second filter capacitor C1 is electrically connected to the input terminal of the voltage regulator module 10, and the other end is grounded, wherein the second filter capacitor C1 preferably has a capacitance of 4.7 μ F, so as to facilitate filtering of the output current.

The present invention further provides a motherboard and a computer, both of which include the wake-up circuit in the above embodiments, and the specific structure of the wake-up circuit refers to the above embodiments.

The above is only a part or preferred embodiment of the present invention, and neither the text nor the drawings should limit the scope of the present invention, and all equivalent structural changes made by the present specification and the contents of the drawings or the related technical fields directly/indirectly using the present specification and the drawings are included in the scope of the present invention.

Claims

1. The wake-up circuit is characterized by comprising a voltage stabilizing module and a one-way conduction module electrically connected with the voltage stabilizing module, wherein the input end of the voltage stabilizing module is electrically connected with a power supply, and the output end of the one-way conduction module is electrically connected with a solid state disk interface.

2. The wake-up circuit of claim 1, wherein the voltage regulation module is a voltage regulation chip.

3. The wake-up circuit of claim 2, wherein the voltage regulator chip has five pins, a first pin of the five pins is electrically connected to the unidirectional conducting module, a second pin and a fifth pin of the five pins are grounded, and a third pin and a fourth pin of the five pins are electrically connected to serve as input terminals of the voltage regulator module.

4. The wake-up circuit of claim 3, wherein a third pin of the five pins is electrically connected to a fourth pin of the five pins through a pull-up resistor.

5. The wake-up circuit according to claim 1, wherein the unidirectional conducting module is a zener diode, an anode of the zener diode is electrically connected to the zener module, and a cathode of the zener diode is used as an output terminal of the unidirectional conducting module.

6. The wake-up circuit according to claim 1, further comprising a first filter capacitor, wherein one end of the first filter capacitor is electrically connected to the output terminal of the unidirectional conducting module, and the other end of the first filter capacitor is grounded.

7. The wake-up circuit according to claim 1, further comprising a second filter capacitor, wherein one end of the second filter capacitor is electrically connected to the input terminal of the voltage regulator module, and the other end of the second filter capacitor is grounded.

8. The wake-up circuit according to claim 2, wherein the voltage regulator chip is an LD0 chip.

9. A motherboard comprising a wake-up circuit as claimed in any one of claims 1 to 8.

10. A computer comprising the motherboard of claim 9.