CN211479110U - Data interface multiplexing control circuit - Google Patents
Data interface multiplexing control circuit Download PDFInfo
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- CN211479110U CN211479110U CN201922015694.7U CN201922015694U CN211479110U CN 211479110 U CN211479110 U CN 211479110U CN 201922015694 U CN201922015694 U CN 201922015694U CN 211479110 U CN211479110 U CN 211479110U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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Abstract
The utility model provides a data interface multiplexing control circuit, which comprises a data interface signal input end used for being connected with an external data interface pin; the level output end is used for being connected with a switch pin of the module; the feedback input end is used for being connected with a working signal end of the module; the signal rectification unit is connected with the data interface signal input end and rectifies the level jump signal at the data interface signal input end into a constant high level signal; the feedback control unit is connected with the feedback input end and the signal rectifying unit and can convert a constant high-level signal into a constant low-level signal through bypass grounding; and the output control unit is connected with the level output end and is also connected with the signal rectification unit and the feedback control unit. The utility model has the advantages that: the control of power-on or reset of the peripheral module is realized, a mainboard does not need to be redesigned, and the design space is saved; the utility model discloses under the inoperative condition, can not produce extra consumption.
Description
Technical Field
The utility model relates to a computer control circuit technical field specifically relates to a data interface multiplexing control circuit.
Background
With the continuous improvement of the integration level of various embedded electronic products and the increasing increase of functions, the IO (input/output) resources of the main control chip are limited by packaging and cost, and the quantity is relatively fixed, such as a data interface; many peripheral modules need to do power control or reset requirements, when designing with insufficient IO at present, a mainboard can only be designed again or a scheme can only be replaced by replacing an IO expansion chip or an MCU with more tube pins, so that the design difficulty and the cost are increased, and particularly under the condition that the peripheral modules need to be expanded by connectors and connecting wires, the cost is increased more, and the whole machine space is wasted.
SUMMERY OF THE UTILITY MODEL
The to-be-solved technical problem of the utility model lies in providing a multiplexing control circuit of data interface, is based on the multiplexing power time sequence control circuit of data interface for the setting is at the peripheral hardware module, realizes peripheral hardware module from control.
The utility model discloses a realize like this: a data interface multiplexing control circuit, comprising:
the data interface signal input end is used for being connected with an external data interface pin;
the level output end is used for being connected with a switch pin of the module;
the feedback input end is used for being connected with a working signal end of the module;
the signal rectifying unit is connected with the data interface signal input end and rectifies the level jump signal of the data interface signal input end into a constant high level signal;
the feedback control unit is connected with the feedback input end and the signal rectifying unit and can convert the constant high-level signal into a constant low-level signal through bypass grounding;
the output control unit is connected with the level output end and is also connected with the signal rectification unit and the feedback control unit; the output control unit changes the output level of the level output end from high to low when receiving the constant high level signal, and the output control unit changes the output level of the level output end from low to high when receiving the constant low level signal.
Further, the signal rectification unit comprises a capacitor C1, a capacitor C2, a diode D1 and a diode D2, the output control unit comprises a resistor R1, a transistor Q1, a resistor R2 and a resistor R3, and the feedback control unit comprises a resistor R4, a capacitor C3, a resistor R5 and a transistor Q2;
the data interface signal input end is connected with one end of a capacitor C1, the other end of the capacitor C1 is connected with the positive electrode end of a diode D1 and the negative electrode end of a diode D2, the negative electrode end of a diode D1 is connected with one end of a capacitor C2, one end of a resistor R2 and the collector end of a triode Q2, the positive electrode end of a diode D2 is connected with the other end of a capacitor C2 and the ground end, one end of a resistor R1 is connected with the power supply end, the other end of a resistor R1 is connected with the collector end of a triode Q1 and the level output end, the base end of a triode Q1 is connected with one end of a resistor R3 and the other end of a resistor R2, the emitter end of a triode Q1 and the other end of a resistor R3 are both connected with the ground end, one end of a resistor R4 is connected with the feedback input end, the other end of a resistor R9 is connected with one end of a capacitor C3, one end, The other end of the resistor R5 and the emitter terminal of the triode Q2 are both connected with the ground terminal.
Further, the data interface signal input is connected with the CLK pin of I2C or I2S or SPI interface.
Further, the signal input end of the data interface is connected with a TXD pin of a serial port.
Further, the level output end is connected with a reset pin of the module.
The utility model has the advantages of as follows: the power supply time sequence control circuit based on data interface multiplexing rectifies the power supply time sequence control circuit into a constant high-level control signal by collecting level jump on a data line interface, and controls a time sequence pin of a module, such as a switch pin or a reset pin; after the module is started, the output control unit is closed through the feedback control unit, so that the control of power-on or reset of the peripheral module is realized, a mainboard does not need to be redesigned, the design space is saved, and the control cost is reduced; support but not limited to the communication interface that IO such as I2C, UART, SPI, I2S were used commonly constitutes, the utility model discloses under the inoperative condition, can not produce extra consumption, be particularly suitable for on the module circuit that has the requirement to the consumption.
Drawings
The invention will be further described with reference to the following examples with reference to the accompanying drawings.
Fig. 1 is a schematic diagram of the data interface multiplexing control circuit of the present invention.
Fig. 2 is a schematic diagram of the circuit connection for the peripheral module according to the present invention.
Detailed Description
Referring to fig. 1 to fig. 2, a first embodiment of the data interface multiplexing control circuit 10 of the present invention; the data interface comprises a data interface signal INPUT end which is an INPUT in the figure and is connected with a CLK pin 30 of I2C or I2S or an SPI interface; a level output terminal, which is PWR _ KEY in the figure, connected to the switch pin 201 of the module 20; a feedback input terminal, which is a mouse _ CTRL in the figure, connected to the operation signal terminal 202 of the module 20; the module 20 is specifically a controller, a control board, a communication module, an adjustable power module, or the like.
A signal rectifying unit 101, connected to the data interface signal INPUT terminal INPUT, for rectifying a level jump signal of the data interface signal INPUT terminal INPUT into a constant high level signal; a feedback control unit 103, connected to the feedback input terminal moudlectrl and also connected to the signal rectification unit 101, capable of converting the constant high level signal into a constant low level signal through a bypass ground; an output control unit 102, connected to the level output terminal PWR _ KEY, the signal rectification unit 101 and the feedback control unit 103; the output control unit 102 changes the output level of the level output terminal PWR _ KEY from high to low when receiving the constant high level signal, and the output control unit 102 changes the output level of the level output terminal PWR _ KEY from low to high when receiving the constant low level signal.
The signal rectifying unit 101 comprises a capacitor C1, a capacitor C2, a diode D1 and a diode D2, the output control unit 102 comprises a resistor R1, a transistor Q1, a resistor R2 and a resistor R3, and the feedback control unit 103 comprises a resistor R4, a capacitor C3, a resistor R5 and a transistor Q2;
the data interface signal INPUT end INPUT is connected with one end of a capacitor C1, the other end of the capacitor C1 is connected with the positive electrode end of a diode D1 and the negative electrode end of a diode D2, the negative electrode end of a diode D1 is connected with one end of a capacitor C2, one end of a resistor R2 and the collector end of a triode Q2, the positive electrode end of a diode D2 is connected with the other end of a capacitor C2 and the grounding end, one end of a resistor R1 is connected with the power supply end, the power supply end is VCC in the figure, the other end of a resistor R1 is connected with the collector end of a triode Q1 and the level output end PWR KEY, the base end of a triode Q1 is connected with one end of a resistor R3 and the other end of a resistor R2, the emitter end of a triode Q1 and the other end of a resistor R3 are both connected with the grounding ends, one end of a resistor R4 is connected with the feedback INPUT end MOUDLE, the other end of a resistor R4 is connected with one end of, the other end of the capacitor C3, the other end of the resistor R5, and the emitter terminal of the transistor Q2 are all connected to ground.
The utility model discloses a theory of operation: the INPUT end of the data interface signal is a master control INPUT signal, the signal is a square wave with a certain frequency, the square wave signal enters the signal rectification unit 101, namely, the square wave signal is coupled through a capacitor C1, and then is transmitted in a unidirectional mode through a diode D1, a diode D2 performs freewheeling, and then a stable voltage VA is formed at the connection point of the diode D1 and a resistor R2 through energy storage filtering of a capacitor C2. The voltage VA enters the output control unit 102, i.e. after being divided by the resistor R2 and the resistor R3, the voltage VA acts on the base terminal of the transistor Q1 to control the transistor Q1 to be turned on, and at this time, the output level of the level output terminal PWR _ KEY changes from high to low to form a falling edge acting on the switch pin 201 of the module 20, so as to control the module 20 to be turned on. After the module 20 is turned on to work, the working signal terminal 202 continuously outputs a high level to the feedback input terminal moudley _ CTRL, that is, the high level enters the feedback control unit 103, the high level is divided by the resistor R4 and the resistor R5 to obtain a stable feedback voltage VC, the capacitor C3 controls the stabilization time of the feedback voltage VC, the feedback voltage VC acts on the base terminal of the triode Q2 to control the conduction of the triode Q2, at this time, the voltage VA is grounded by a bypass and is close to 0, so that the triode Q1 is turned off, and thus the output level of the level output terminal PWR _ KEY is changed from low to high; since the switch pin 201 of the module 20 does not receive the falling edge signal within a predetermined time, the module 20 operates normally after being turned on. In conjunction with the above description, since the module 20 operates normally, the feedback INPUT terminal moudley _ CTRL continues to have a high level, so that the transistor Q2 is continuously in a conducting state, the voltage VA is close to 0 because the voltage VA is bypassed and grounded, even though the data interface signal INPUT terminal INPUT has a square wave signal INPUT, the transistor Q1 is still in a closed state, the level output terminal PWR _ KEY continues to be a high level, and the module 20 operates normally.
The parameters of the capacitance, the resistance value of the resistor, and the like in this embodiment are shown in fig. 1.
The utility model discloses a data interface multiplexing control circuit 10 is used for setting up at peripheral module 20, realizes peripheral module 20 from control; the mainboard does not need to be redesigned, so that the design space is saved; the utility model discloses under the inoperative condition, can not produce extra consumption, be particularly suitable for on having the module 20 circuit of requirement to the consumption.
Embodiment two of the data interface multiplexing control circuit 10 of the present invention; the signal INPUT end INPUT of the data interface is connected with a TXD pin of a serial port; the TXD pin of the serial port also outputs a square wave with a certain frequency, and the square wave enters the output control unit 102 through the signal rectification unit 101. The level output terminal PWR _ KEY is connected to a reset pin of the module 20. Thus, when the diode Q1 is turned on and the output level of the level output terminal PWR _ KEY changes from high to low, the module 20 performs reset and restart; then, the module 20 operates normally, and during the normal operation of the module 20, the feedback input terminal moudley _ CTRL continuously outputs a high level, so that the feedback control unit 103 bypasses the voltage VA to ground and approaches 0, the diode Q1 is turned off, and the level output terminal PWR _ KEY continuously outputs a high level. Please refer to the first embodiment of the present invention for other parts not described.
Although specific embodiments of the present invention have been described, it will be understood by those skilled in the art that the specific embodiments described are illustrative only and are not limiting upon the scope of the invention, and that equivalent modifications and variations can be made by those skilled in the art without departing from the spirit of the invention, which is to be limited only by the claims appended hereto.
Claims (5)
1. A data interface multiplexing control circuit, characterized by: the method comprises the following steps:
the data interface signal input end is used for being connected with an external data interface pin;
the level output end is used for being connected with a switch pin of the module;
the feedback input end is used for being connected with a working signal end of the module;
the signal rectifying unit is connected with the data interface signal input end and rectifies the level jump signal of the data interface signal input end into a constant high level signal;
the feedback control unit is connected with the feedback input end and the signal rectifying unit and can convert the constant high-level signal into a constant low-level signal through bypass grounding;
the output control unit is connected with the level output end and is also connected with the signal rectification unit and the feedback control unit; the output control unit changes the output level of the level output end from high to low when receiving the constant high level signal, and the output control unit changes the output level of the level output end from low to high when receiving the constant low level signal.
2. The data interface multiplexing control circuit of claim 1, wherein: the signal rectifying unit comprises a capacitor C1, a capacitor C2, a diode D1 and a diode D2, the output control unit comprises a resistor R1, a triode Q1, a resistor R2 and a resistor R3, and the feedback control unit comprises a resistor R4, a capacitor C3, a resistor R5 and a triode Q2;
the data interface signal input end is connected with one end of a capacitor C1, the other end of the capacitor C1 is connected with the positive electrode end of a diode D1 and the negative electrode end of a diode D2, the negative electrode end of a diode D1 is connected with one end of a capacitor C2, one end of a resistor R2 and the collector end of a triode Q2, the positive electrode end of a diode D2 is connected with the other end of a capacitor C2 and the ground end, one end of a resistor R1 is connected with the power supply end, the other end of a resistor R1 is connected with the collector end of a triode Q1 and the level output end, the base end of a triode Q1 is connected with one end of a resistor R3 and the other end of a resistor R2, the emitter end of a triode Q1 and the other end of a resistor R3 are both connected with the ground end, one end of a resistor R4 is connected with the feedback input end, the other end of a resistor R9 is connected with one end of a capacitor C3, one end, The other end of the resistor R5 and the emitter terminal of the triode Q2 are both connected with the ground terminal.
3. A data interface multiplexing control circuit according to claim 1, wherein: the data interface signal input is connected with the CLK pin of I2C or I2S or SPI interface.
4. A data interface multiplexing control circuit according to claim 1, wherein: and the signal input end of the data interface is connected with a TXD pin of the serial port.
5. A data interface multiplexing control circuit according to claim 1, wherein: and the level output end is connected with a reset pin of the module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922015694.7U CN211479110U (en) | 2019-11-20 | 2019-11-20 | Data interface multiplexing control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922015694.7U CN211479110U (en) | 2019-11-20 | 2019-11-20 | Data interface multiplexing control circuit |
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| Publication Number | Publication Date |
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| CN211479110U true CN211479110U (en) | 2020-09-11 |
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| CN201922015694.7U Active CN211479110U (en) | 2019-11-20 | 2019-11-20 | Data interface multiplexing control circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117076360A (en) * | 2023-08-15 | 2023-11-17 | 杭州凡诺电子有限公司 | Circuit compatible with integrated circuit bus interface and serial peripheral interface |
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2019
- 2019-11-20 CN CN201922015694.7U patent/CN211479110U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117076360A (en) * | 2023-08-15 | 2023-11-17 | 杭州凡诺电子有限公司 | Circuit compatible with integrated circuit bus interface and serial peripheral interface |
| CN117076360B (en) * | 2023-08-15 | 2024-04-23 | 杭州凡诺电子有限公司 | Circuit compatible with integrated circuit bus interface and serial peripheral interface |
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