CN215894749U - High-precision frequency counter device - Google Patents

Abstract

The utility model provides a high-precision frequency counter device, relates to the field of time frequency measurement, and aims to measure frequency signals and perform a corresponding analysis function. The device comprises an interface circuit, a clock module, a liquid crystal display module, an FPGA (field programmable gate array) and a microprocessor, wherein the interface circuit and the clock module are respectively connected to an I/O (input/output) port of the FPGA, the FPGA is connected with the microprocessor, the microprocessor is also connected with the liquid crystal display module, the sensitivity can reach 10mvRMS (maximum variation of square root mean square root) through the optimization of the interface circuit, the frequency measurement resolution can reach 12 bits/second through the mode of measuring frequency signals with high precision and wide range, the measurement frequency can reach 24GHz, the day difference and standard deviation required in the time frequency signal test are analyzed and analyzed automatically by the microprocessor, the data are sent to a computer terminal through network control, and the manual calculation cost is reduced. The efficiency and the universality of the clock measurement of the equipment needing the clock frequency can be improved, and the cost is reduced.

Description

High-precision frequency counter device

Technical Field

The utility model relates to the field of time frequency measurement, in particular to a high-precision frequency counter device.

Background

The unit second(s) of time is one of 7 basic units in the current international unit system, and the time measurement has long history and complex condition and is the unit with the highest measurement precision at present.

The most basic working principle of the frequency meter is as follows: when the number of cycles of the signal to be measured in the specific time period T is N, the frequency f of the signal to be measured is N/T.

During a measuring period, the measured periodic signal forms a narrow pulse with a specific period after being amplified, shaped and differentiated in an input circuit, and the narrow pulse is sent to one input end of the main gate. The other input end of the main gate is a gate pulse generated by the time-base circuit generating circuit. During the period that the gate pulse opens the main gate, the narrow pulse of a specific period can pass through the main gate, so as to enter the counter for counting, the display circuit of the counter is used for displaying the frequency value of the measured signal, and the internal control circuit is used for completing the switching among various measurement functions and realizing the measurement setting.

In a traditional electronic measuring instrument, an oscilloscope is low in measuring precision and large in error when frequency measurement is carried out. The frequency spectrograph can accurately measure the frequency and display the frequency spectrum of the measured signal, but the measuring speed is slow, and the change of the frequency of the measured signal cannot be tracked and captured quickly in real time. The frequency meter can quickly and accurately capture the change of the frequency of the measured signal, so the frequency meter has a very wide application range.

In a conventional manufacturing enterprise, a frequency meter is widely used in a production test of a production line. The frequency meter can quickly capture the change of the output frequency of the crystal oscillator, and a user can quickly find out a faulty crystal oscillator product by using the frequency meter, so that the product quality is ensured. In metrology laboratories, frequency meters are used to calibrate local oscillators of various electronic measurement devices. In wireless communication testing, a frequency meter may be used to calibrate the master clock of a wireless communication base station, and may also be used to analyze the frequency hopping signal and the frequency modulation signal of a radio station.

Inside the FPGA there is a second counter and a nanosecond counter, both of which constitute a time stamp counter. And the driver acquires the current time value from the upper-layer system, and then sets the value into an FPGA initial value register, and the FPGA loads the value onto the two counters as the counting initial values of the counters to start counting. For example, the driver takes out the second bit written in the FGPA initial value register at 1970, month 1, day 00 as the initial value from the upper system. When the nanosecond counter reaches the second, the nanosecond counter is cleared and the second counter is set. And after the data packet is acquired by the board card, adding a timestamp domain generated by the two counters in real time at the head of the data packet, and then sending the data packet to an upper layer system for further processing. The whole system has master-slave setting under the condition of multiple board cards: the second counter of the master card counts by the second carry pulse of the nanosecond counter, and the second counter of the slave card counts by the second carry pulse of the master card, so that the purpose of time stamp synchronization among the multiple board cards is achieved.

However, with the rapid development of modern society, higher requirements are put forward on high-precision time frequency, and especially the development of modern digital communication networks and the construction of information highways, and the coordination of various politics, culture, science and technology and social information is established on the basis of strict time synchronization. The stability of the time-frequency output of the clock source is a focus of much concern.

SUMMERY OF THE UTILITY MODEL

To this end, the technical problem to be solved by the present invention is to overcome the disadvantages of the prior art, and to provide a high-precision frequency counter device.

In order to achieve the above object, the present invention provides a high-precision frequency counter device.

Further, the high-precision frequency counter device is characterized by comprising an interface circuit, a clock module, a liquid crystal display module, an FPGA and a microprocessor; the interface circuit is connected to an I/O port of the FPGA, the clock module is connected to a clock signal input end of the FPGA, the FPGA is connected with the microprocessor, and the microprocessor is further connected with the liquid crystal display module.

Furthermore, the FPGA and the microprocessor are connected by an SPI bus; the liquid crystal display module and the microprocessor are connected by an SPI bus.

Furthermore, the interface circuit comprises a sine wave sorting conversion circuit and a shielding box, and the interface circuit is installed in an aluminum alloy box inside the equipment.

Further, the microprocessor adopts an ARM processor.

Further, the model selected by the ARM processor is STM32F407VET 6.

Further, the clock module adopts a high-precision constant-temperature crystal oscillator packaged by 3627.

Furthermore, the liquid crystal display module comprises a 7-inch liquid crystal display screen and an encoder knob key.

Further, the model of the FPGA is selected as EP4CE6E22C 8.

According to the high-precision frequency counter device provided by the utility model, the day difference, the standard deviation and the alendron variance data required in the time frequency signal test are analyzed automatically through the analysis of the microprocessor on the measurement data, so that the manual calculation cost is reduced.

Drawings

To more clearly illustrate the technical solutions of the embodiments of the present invention, the following provides a detailed description of the present invention with reference to the accompanying drawings.

FIG. 1 is a schematic view of the present invention;

FIG. 2 is a flow chart of the present invention;

Detailed Description

The technical solutions of the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

In the description of the present invention, it should be noted that the terms "front", "upper", "lower", "left", "right", "vertical", "horizontal", and the like indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience of description and simplification of description, but do not indicate or imply that the referred device or element must have a specific orientation, be configured in a specific orientation, and operate, and thus, should not be construed as limiting the present invention.

In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.

The first embodiment of the utility model discloses a high-precision frequency counter device, which is structurally shown in fig. 1 and comprises an interface circuit, a clock module, a liquid crystal display module, an FPGA (field programmable gate array) and a microprocessor; the non-contact sensor is connected to the I/O port of FPGA, and clock module is connected to FPGA's clock signal input, and FPGA links to each other with microprocessor, and SPI bus can be selected to the connected mode, and microprocessor still links to each other with the liquid crystal display module, and its connected mode can select to be the SPI bus equally.

The microprocessor preferably adopts an ARM processor, and the model selected by the ARM processor is STM32F407VET 6; the clock module adopts a 3627 packaged high-precision constant-temperature crystal oscillator, has high short-term stability, small volume and low power consumption, and can realize high-precision low-jitter measurement by matching with an FPGA (field programmable gate array); the non-contact sensor comprises an aluminum-gold box and a radio receiving circuit, the radio receiving circuit is arranged in the aluminum-gold box, the aluminum-gold box plays a role in shielding, and the interference resistance of the device is improved. The radio receiving circuit can realize non-contact induction and amplify the detected signal; the liquid crystal display module comprises a 7-inch liquid crystal display screen and a key, and a user can directly observe a measurement result and can also perform operation control through the key; the model of the FPGA was chosen as EP4CE6E22C 8.

The working principle of the application is as follows:

the interface circuit adopts an ultra-low sensitive design, can measure a 10uv frequency sine wave signal, then converts the sine wave signal into a square wave and amplifies the square wave, and then outputs an electric signal to the FPGA; the FPGA module is mainly used for conducting PLL frequency multiplication on an input clock signal of the high-precision constant-temperature crystal oscillator, the frequency of the high-precision constant-temperature crystal oscillator which is generally selected as the clock module is 10mhz, and the FPGA needs to multiply the frequency of the clock signal to 200mhz so that the period is shortened to 5 ns. The ARM processor as a microprocessor is a data processing and control center of the measurement system, and is mainly responsible for the configuration of the FPGA, completing the data reading of the FPGA, and displaying the measurement result on the liquid crystal display module after calculation processing, as shown in fig. 1.

The working process of the ARM processor is as follows:

the ARM processor firstly initializes itself, and performs operations such as clock configuration, GPIO port mode configuration, external interrupt configuration, SPI configuration and the like; the ARM processor waits for the liquid crystal display module to send a measurement starting command, and once the measurement starting command is received, the system configures the FPGA and the liquid crystal display module through the SPI bus; then the main program enters a main loop to perform data processing, an end command is checked in the main loop, and once the liquid crystal display module sends the end command to the ARM processor, the measurement is immediately ended;

measuring the frequency value f tested by the FPGA, recording each count n, and calculating the average value f/n, the maximum value f/n, the minimum value f/n and the absolute value of the peak value f minus the minimum value according to a mathematical calculation mode. The period is 1/f, and the nominal value is the nominal value which can be automatically calculated for the current frequency value. The instantaneous day-to-frequency deviation is multiplied by 86400.

In the data processing, the common knowledge frequency accuracy, the daily difference, the Allen variance and other formulas are combined for calculation, and finally, the module display is carried out through the liquid crystal, and the data are output to a connected terminal computer through network control. As shown in fig. 2.

It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications therefrom are within the scope of the utility model.

Claims (8)

1. A high-precision frequency counter device is characterized by comprising an interface circuit, a clock module, a liquid crystal display module, an FPGA and a microprocessor; the interface circuit is connected to an I/O port of the FPGA, the clock module is connected to a clock signal input end of the FPGA, the FPGA is connected with the microprocessor, and the microprocessor is further connected with the liquid crystal display module.

2. A high precision frequency counter device according to claim 1, wherein the connection between the FPGA and the microprocessor is an SPI bus; the liquid crystal display module and the microprocessor are connected by an SPI bus.

3. A high accuracy frequency counter device according to claim 1, wherein said interface circuit comprises sine wave arrangement conversion circuit, shielding box, and said interface circuit is installed in the aluminum alloy box inside the device.

4. A high accuracy frequency counter apparatus as in claim 1, wherein said microprocessor is an ARM processor.

5. A high precision frequency counter apparatus as claimed in claim 4, wherein said ARM processor is selected from the model STM32F407VET 6.

6. A high precision frequency counter apparatus according to claim 1, wherein said clock module employs a 3627 packaged high precision constant temperature crystal oscillator.

7. A high accuracy frequency counter device as in claim 1 wherein said lcd module comprises a 7 "lcd and encoder knob buttons.

8. A high accuracy frequency counter device according to claim 1, wherein the model of said FPGA is selected from EP4CE6E22C 8.

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