CN214795702U

CN214795702U - Improved missile rig testing device

Info

Publication number: CN214795702U
Application number: CN202121273401.6U
Authority: CN
Inventors: 孔子华; 郭希维; 翟优; 何鹏; 谢建华; 王成; 赵慎; 魏保华; 范书义; 王红云; 成悦; 李青
Original assignee: Army Engineering University of PLA
Current assignee: Army Engineering University of PLA
Priority date: 2021-06-08
Filing date: 2021-06-08
Publication date: 2021-11-19
Anticipated expiration: 2031-06-08

Abstract

The utility model discloses an improved missile rig testing device, which comprises a PXI bus I/O card, a missile control box in communication connection with the PXI bus I/O card and a missile; the PXI bus I/O card is in communication connection with the missile control box and the missile through the simplified test module; the simplified test module comprises a singlechip minimum system consisting of an embedded 89S2051 singlechip and peripheral circuits thereof; the 5I/O ports of the single chip microcomputer are in communication connection with the I/O card output end of the PXI bus, and the I/O ports of the two single chip microcomputers are connected with the information signal input end of the power amplification module; the utility model discloses a testing arrangement is equipped to modified guided missile, peripheral component is little, and whole small through ingenious assembly programming, has accomplished PXI serial port card function.

Description

Improved missile rig testing device

Technical Field

The utility model relates to a test module is equipped to the guided missile, concretely relates to test device is equipped to modified guided missile belongs to the guided missile and equips test module technical field.

Background

As shown in fig. 1, the existing missile launching control device test system adopts a system which takes a PXI bus virtual instrument as a core, conditions signals of a launching control device control box, a missile and the like through an adapter, and then tests launching control devices to be tested; as shown in fig. 2, in the test system of the missile control box, in the AFT07C launch control equipment test, the PXI bus I/O card outputs information signals and tracking signals GZA and GZB to the missile control box while transmitting angular deviation data to the missile control box through the PXI serial port card; meanwhile, alternating 110V signals generated during missile testing also need to be generated by a PXI bus I/O card; because serial communication and information signal synchronous work need to be provided at the same time, a PXI serial communication card and an I/O card must be configured at the same time; the PXI serial port communication card is expensive, the generation of the information signal and the alternating 110V signal is realized by the programming of the I/O card of the PXI bus, and the signal time sequence matching between the PXI serial port card and the PXI I I/O card is complex; the need for synchronization between signals results in a large amount of programming and debugging effort.

SUMMERY OF THE UTILITY MODEL

In order to solve the problem, the utility model provides a testing arrangement is equipped to modified guided missile, peripheral component is little, and whole small through ingenious assembler design, has accomplished PXI serial port card function.

The utility model discloses an improved guided missile equips testing arrangement, through adopting the simplified test module, can save expensive PXI serial ports communication card, and the software programming complexity greatly reduced moreover, program efficiency improves greatly; the simplified test module can be applied to the updating and the reconstruction of products and the production of subsequent products; a test module is simplified to replace a PXI serial port card, and simultaneously a newly generated serial port signal is also synchronous with information signals and tracking signals GZA and GZB generated by a PXI bus I/O, and the specific structure of the test module is as follows: the missile control box comprises a PXI bus I/O card, and a missile control box and a missile which are in communication connection with the PXI bus I/O card; the PXI bus I/O card is in communication connection with the missile control box and the missile through the simplified test module; the simplified test module comprises a singlechip minimum system consisting of an embedded 89S2051 singlechip and peripheral circuits thereof; the 5I/O ports of the single chip microcomputer are in communication connection with the I/O card output end of the PXI bus, and the I/O ports of the two single chip microcomputers are connected with the information signal input end of the power amplification module; the output end of the power amplifier module is in communication connection with an information signal port of the missile control box; I/O ports of the two single-chip microcomputers are in communication connection with input ends of a tracking signal GZA port and a GZB port of the missile control box; the I/O ports of the two single-chip microcomputers are in communication connection with a driver; the output end of the driver is in communication connection with an alternating 110V signal port of the missile; and the single chip microcomputer is in serial communication connection with the missile control box through a serial communication module.

Furthermore, the simplified test module outputs different 16-system serial port data to the missile control box according to a 5-bit I/O combined signal output by the PXI bus I/O card, and completes the test of the missile control box by matching with a tracking signal and an information signal.

Furthermore, the ports of the single chip microcomputer, which are communicated with the GZA port and the GZB port, generate two paths of square wave signals with 90-degree phase difference and 2.93ms period through the assembly of the single chip microcomputer; the port of the single chip microcomputer, which is communicated with the power amplifier module, generates two TTL level pulse signals through the assembly of the single chip microcomputer, the TTL level pulse signals generate step waveform information signals with adjustable voltage amplitude of 30-120V through a driving circuit and a power amplifying circuit of the power amplifier module, and the port of the single chip microcomputer, which is connected with a driver, generates two high and low level signals through the single chip microcomputer, wherein the high and low level signals are missile direct current test signals and are connected to an input A2 end and an input A3 end of the driver; the output high and low levels of the two paths of high and low level signals are related to missile test signals; when the missile test is +110V, the end A2 is 1, and the end A3 is 0; when the missile test is-110V, the A2 end is 0, and the A3 end is 1; when the missile tests to alternate 110V, the A2 terminal and the A3 terminal are TTL level alternating signals with the cycle of 40ms and opposite polarities.

Compared with the prior art, the utility model discloses a testing arrangement is equipped to modified guided missile replaces PXI serial ports communication card through simplifying test module, simplifies test module and adopts 20 foot iron sheet formula embedded singlechip on line able to programme, in addition add 5 peripheral elements constitution less, small, and produce control signal through ripe assembler, PXI serial ports card function has been accomplished, the complicated cooperation chronogenesis problem of signal between PXI serial ports card and the PXI IO card has been solved, and greatly reduced equipment manufacturing cost.

Drawings

Fig. 1 is a schematic structural view of the prior missile launching control device test system of the present invention.

Fig. 2 is a schematic structural diagram of a test system of the existing missile control box of the present invention.

Fig. 3 is the structure diagram of the minimum system of the single chip microcomputer and the communication port thereof.

Fig. 4 is a schematic structural diagram of a test system of the missile control box of the present invention.

Fig. 5 is a schematic diagram of an information signal of TTL level in one cycle according to the present invention.

Fig. 6 is a schematic diagram of a tracking signal of one cycle according to the present invention.

Fig. 7 is a schematic diagram of a dc 110V missile signal according to the present invention.

Fig. 8 is a schematic diagram of an alternating 110V signal according to the present invention.

Fig. 9 is a schematic diagram of simplified test module input/output comparison according to the present invention.

Detailed Description

Example 1:

as shown in fig. 3 and 4, the improved missile rig testing device can omit an expensive PXI serial port communication card by adopting a simplified testing module, greatly reduce the complexity of software programming and greatly improve the program efficiency; the simplified test module can be applied to the updating and the reconstruction of products and the production of subsequent products; a test module is simplified to replace a PXI serial port card, and simultaneously a newly generated serial port signal is also synchronous with information signals and tracking signals GZA and GZB generated by a PXI bus I/O, and the specific structure of the test module is as follows: the missile control box comprises a PXI bus I/O card, and a missile control box and a missile which are in communication connection with the PXI bus I/O card; the PXI bus I/O card is in communication connection with the missile control box and the missile through the simplified test module; the simplified test module comprises a singlechip minimum system consisting of an embedded 89S2051 singlechip and peripheral circuits thereof; the minimum system of the single chip microcomputer outputs different 16-system serial port data to a missile control box according to a 5-bit I/O combined signal output by the PXI bus I/O card, and completes the test of the missile control box by matching with a tracking signal and an information signal; the I/O ports of the two single-chip microcomputers are connected with information signal input ends HO0 and HO1 of the power amplifier module; the output end of the power amplifier module is in communication connection with an information signal port of the missile control box; the I/O ports of the two single-chip microcomputers are in communication connection with the tracking signal GZA port of the missile control box and the GZB port input ends GZA and GZB; the I/O ports of the two single-chip microcomputers are in communication connection with drivers A2 and A3; the output end of the driver is in communication connection with an alternating 110V signal port of the missile; and the single chip microcomputer is in serial communication connection with the missile control box through a serial communication module.

The PXI bus I/O card outputs a 5-bit I/O combined signal to be sent to an input control end of the single chip microcomputer to be used as a test item selection signal; as shown in fig. 5, the single chip microcomputer assembly generates two TTL level pulse signals, and sends the TTL level pulse signals to the information signal input end of the power amplifier module, which generates TTL level information signals, and the TTL level pulse signals pass through the driving circuit and the power amplifier circuit of the power amplifier module to generate step waveform information signals with adjustable voltage amplitude of 30-120V, as shown in fig. 6, the single chip microcomputer assembly generates two square wave signals with 90 ° phase difference and 2.93ms period, and the two square wave signals are connected to the input ends of the GZA port and the GZB port; as shown in fig. 7 and 8, the single chip generates two high and low level signals, which are missile dc test signals and are connected to the a2 and A3 input ends of the driver; the output high and low levels of the two paths of high and low level signals are related to missile test signals; when the missile test is +110V, the end A2 is 1, and the end A3 is 0; when the missile test is-110V, the A2 end is 0, and the A3 end is 1; when the missile tests to alternate 110V, the A2 terminal and the A3 terminal are TTL level alternating signals with the cycle of 40ms and opposite polarities.

As shown in fig. 9, the utility model discloses a singlechip minimum system it is as follows through serial ports and missile control box serial port communication connection: the relation between the serial port output and the tracking output, the relation between the information signal output and the corresponding test items are shown in the figure; according to different test items, 5-bit I/O combined signals are output by the PXI bus I/O card, the simplified test module outputs different 16-system serial port data to the missile control box according to the 5-bit I/O combined signals output by the PXI bus I/O card, and the test of the control box is completed by matching with tracking signals and information signals.

The above-mentioned embodiment is only the preferred embodiment of the present invention, so all the equivalent changes or modifications made by the structure, features and principles of the present invention are included in the claims of the present invention.

Claims

1. An improved missile equipment testing device comprises a PXI bus I/O card, a missile control box and a missile, wherein the missile control box and the missile are in communication connection with the PXI bus I/O card; the method is characterized in that: the PXI bus I/O card is in communication connection with the missile control box and the missile through the simplified test module; the simplified test module comprises a singlechip minimum system consisting of an embedded 89S2051 singlechip and peripheral circuits thereof; the 5I/O ports of the single chip microcomputer are in communication connection with the I/O card output end of the PXI bus, and the I/O ports of the two single chip microcomputers are connected with the information signal input end of the power amplification module; the output end of the power amplifier module is in communication connection with an information signal port of the missile control box; I/O ports of the two single-chip microcomputers are in communication connection with input ends of a tracking signal GZA port and a GZB port of the missile control box; the I/O ports of the two single-chip microcomputers are in communication connection with a driver; the output end of the driver is in communication connection with an alternating 110V signal port of the missile; and the single chip microcomputer is in serial communication connection with the missile control box through a serial communication module.

2. The improved missile rig test rig of claim 1 wherein: the simplified test module outputs different 16-system serial port data to the missile control box according to a 5-bit I/O combined signal output by the PXI bus I/O card, and completes the test of the missile control box by matching with a tracking signal and an information signal.