CN106933215B - PXI bus-based universal equivalent device for external interface of telemetry system - Google Patents
PXI bus-based universal equivalent device for external interface of telemetry system Download PDFInfo
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- CN106933215B CN106933215B CN201710138007.3A CN201710138007A CN106933215B CN 106933215 B CN106933215 B CN 106933215B CN 201710138007 A CN201710138007 A CN 201710138007A CN 106933215 B CN106933215 B CN 106933215B
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B23/00—Testing or monitoring of control systems or parts thereof
- G05B23/02—Electric testing or monitoring
- G05B23/0205—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults
- G05B23/0208—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults characterized by the configuration of the monitoring system
- G05B23/0213—Modular or universal configuration of the monitoring system, e.g. monitoring system having modules that may be combined to build monitoring program; monitoring system that can be applied to legacy systems; adaptable monitoring system; using different communication protocols
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/23—Pc programming
- G05B2219/23258—GUI graphical user interface, icon, function bloc editor, labview
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/25—Pc structure of the system
- G05B2219/25314—Modular structure, modules
Abstract
The utility model provides a general equivalent ware of telemetry system external interface based on PXI bus, includes PXI instrument combination module, signal conditioning combination module and interface adapter, wherein PXI instrument combination module includes zero slot controller, universal meter integrated circuit board, multiplexing integrated circuit board, DA integrated circuit board, relay integrated circuit board, FPGA integrated circuit board and timer/counter integrated circuit board. The PXI instrument combined module and the signal conditioning combined module are universal platforms, and the interface adapter is a model special part. The invention adopts a general platform and a special adapter framework, wherein the general platform outputs signals such as analog quantity, instructions, digital quantity, phase sequence and the like, the interface adapter is designed in a differentiation way according to the types and physical definitions of various types of interface connectors, and the signals of the general platform are cut and transferred, so that the unified test of the external interfaces of the remote measuring system is realized.
Description
Technical Field
The invention relates to a PXI bus-based universal equivalent device for an external interface of a telemetry system, and belongs to the field of test of a measurement system of a carrier rocket.
Background
The external interface of the current remote measuring system of the carrier rocket generally refers to an electrical interface with other electrical systems such as a control system, a utilization system, a servo system and the like. The interface test generally adopts signal test boards of AC/DC, command, digital quantity and other types to carry out independent test, and has low efficiency, low automation degree, poor universality and high cost. Some colleges and universities have also begun to research the equivalent device, for example, an equivalent device is provided in an instrument and meter device in the 8 th year of 2015, and mainly comprises a dual-mode communication interface board, a back board, an analog signal board, a command signal board, a digital quantity signal board and a pulse signal board, so that the signal source function of the external system equivalent device is realized. The equivalent device integrates all types of signals into one device, if the equivalent device is expanded to other types, the signal source device still needs to be produced again because the resources and the point positions cannot be expanded and only the industrial personal computer is unchanged, and the equivalent device has the characteristics of flexibility, universality and easiness in expansion, and has the problems of low framework rate, poor expansibility, high maintenance cost and the like.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: the defects of the prior art are overcome, the PXI bus-based universal equivalent device for the external interface of the telemetry system is provided, the automation degree and efficiency of testing are improved, the testing and maintenance cost is reduced, and the device can be flexibly expanded and applied to multi-model testing.
The technical solution of the invention is as follows: a PXI bus-based telemetry system external interface universal equivalent device comprises a PXI instrument combined module, a signal conditioning combined module and an interface adapter;
the PXI instrument combination module comprises a zero slot controller, a universal meter board card, a multiplexing board card, a D/A board card, a relay board card, an FPGA board card and a timer/counter board card;
a zero slot controller: controlling the starting of each board card in the PXI instrument combination module, outputting an expected design value of the external interface function of the remote measuring system to the corresponding board card, receiving data fed back by the remote measuring system, and judging whether the design of the external interface function of the remote measuring system is correct or not by comparing the expected design value with the data fed back by the remote measuring system;
D/A board card: after the system is started, receiving an expected design value of the alternating current/direct current analog parameter of the telemetry system output by the zero slot controller, converting the expected design value into an analog source signal, and outputting the analog source signal to a signal conditioning combination module and a multiplexing board card;
multiplexing board card: forwarding an analog source signal from the D/A board card to the multimeter board card;
universal meter board card: measuring an actual voltage value corresponding to an analog source signal from the multiplexing board card;
relay board card: after starting, receiving an expected design value of a command parameter of the telemetry system output by the zero slot controller, converting the expected design value into a command source signal, and outputting the command source signal to the signal conditioning combination module;
FPGA board card: after the system is started, receiving an expected design value of a digital quantity parameter of the telemetry system output by the zero slot controller, converting the expected design value into a digital quantity source signal and outputting the digital quantity source signal to the signal conditioning combination module;
timer/counter board: after the signal conditioning combined module is started, receiving an expected design value of a phase sequence signal of the telemetry system output by the zero slot controller, converting the expected design value into a phase sequence source signal and outputting the phase sequence source signal to the signal conditioning combined module;
and a signal conditioning combined module: respectively conditioning the received analog source signal, command source signal, digital source signal and phase sequence source signal to the analog signal, command signal, digital signal and phase sequence signal, so that the voltage and driving capability of each path of signal meet the requirements of a remote measuring system, and outputting the conditioned signals to an interface adapter;
interface adapter: and the analog quantity signal, the command signal, the digital quantity signal and the phase sequence signal from the signal conditioning combination module are forwarded to a corresponding external interface of the telemetry system.
The signal conditioning combination module comprises a D/A conditioning submodule, a relay conditioning submodule, an FPGA conditioning submodule and a timer/counter conditioning submodule.
The D/A conditioning submodule comprises an operational amplifier A, an operational amplifier B, a resistor R1, a resistor R2, a resistor R3 and a resistor Rf, wherein one end of the resistor R1 is connected with an analog source signal, the other end of the resistor R1 is connected with the inverting input end of the operational amplifier A and one end of the resistor Rf, the other end of the resistor Rf is connected with the output end of the operational amplifier A, the non-inverting input end of the operational amplifier A is grounded through a resistor R3, the output end of the operational amplifier A is connected with the non-inverting input end of the operational amplifier B through a resistor R2, the inverting input end of the operational amplifier B is connected with the output end, and the output end of the operational amplifier.
The relay conditioning submodule comprises a charged instruction conditioning submodule and an uncharged instruction conditioning submodule, the charged instruction conditioning submodule consists of a 28V power supply, the positive end of the 28V power supply is connected with one end of a relay board card, the other end of the relay board card is connected with an interface adapter, and the negative end of the 28V power supply is connected with a remote measuring system through the interface adapter; and the uncharged instruction conditioning submodule directly connects two ends of the relay board card with the remote measuring system.
The FPGA conditioning submodule consists of a 54LS06 inverting buffer chip, the input end of the 54LS06 inverting buffer chip is connected with a digital quantity source signal, and the output end of the 54LS06 inverting buffer chip is connected with an interface adapter.
The timer/counter conditioning submodule consists of three 54LS06 chips, the positive end of each phase sequence source signal is connected with the interface adapter through the 54LS06 chip, and the negative end of each phase sequence source signal is directly connected with the telemetry system.
The interface adapter comprises a resistor R4, a resistor R5, a resistor R6 and three resistors R7 with the same resistance;
the resistor R4 is connected with the output end of the D/A conditioning submodule, the resistor R5 is connected with the relay board card, and the resistor R6 is connected with the output end of the FPGA conditioning submodule; each resistor R7 is connected to one output of the timer/counter conditioning submodule.
Compared with the prior art, the invention has the following beneficial effects:
(1) the invention adopts a general platform and a special adapter framework, wherein the general platform outputs signals such as analog quantity, instructions, digital quantity, phase sequence and the like, the interface adapter is designed in a differentiation way according to the types and physical definitions of various types of interface connectors, and the signals of the general platform are cut and transferred, so that the unified test of the external interfaces of the remote measuring system is realized.
(2) As the PXI bus instrument combination module is used as the core equipment of the universal platform, the goods shelf product resources with a large number are one of the factors for realizing low cost, and therefore, the universal platform is a means for realizing automatic testing and low maintenance cost. And different model test requirements can be met through corresponding model interface adapters.
(3) The invention can complete the test of all external interfaces by one-time connection, the test flow is automatically executed, the test data is automatically interpreted, manual intervention is not needed, and the test efficiency is greatly improved. By the general platform, the state of multiple models can be covered, the state on the arrow can be dynamically adjusted, and the method has high flexibility.
Drawings
FIG. 1 is a block diagram of a generic equivalent set-up of the present invention;
FIG. 2 is a circuit diagram of a D/A conditioning submodule;
FIG. 3 is a circuit diagram of a relay electrified conditioning sub-module;
FIG. 4 is a circuit diagram of an uncharged conditioning submodule of the relay;
FIG. 5 is a circuit diagram of an FPGA conditioning submodule;
FIG. 6 is a circuit diagram of a timer/counter conditioning submodule.
Detailed Description
Aiming at the characteristics of multiple types of external interface test equipment, poor expansibility, high cost and the like of the conventional multi-model remote measuring system, the universal equivalent device for the external interface of the remote measuring system based on the PXI bus is designed, can be flexibly expanded and is suitable for multi-model tests, and when the remote measuring system of the carrier rocket performs subsystem tests, the universal equivalent device simulates and sends an external interface signal to the remote measuring system, and judges whether the measurement function of the remote measuring system on the external interface is correct or not by reading back and analyzing a remote measuring data packet.
As shown in fig. 1, the present invention includes a PXI instrumentation combination module, a signal conditioning combination module, and an interface adapter. The PXI instrument combination module comprises a zero slot controller, a universal meter board card, a multiplexing board card, a D/A board card, a relay board card, an FPGA board card and a timer/counter board card.
The working mode of the equivalent device is that the D/A board card, the FPGA board card, the relay board card and the timer board card on the PXI instrument combination module are controlled by software to be configured and output, the D/A board card outputs an alternating current/direct current analog quantity voltage signal, the FPGA board card outputs a digital quantity signal, the relay board card outputs a switch and other signals, the timer/counter board card outputs a square wave signal, the signals of an alternating current/direct current, an instruction, a digital quantity, a phase sequence and the like of an external system are simulated through the signal conditioning combination module and the interface adapter, and the signals are accessed into a remote measuring system through an external system interface.
A zero slot controller: the starting of each board card in the PXI instrument combination module is controlled, an expected design value of the external interface function of the telemetering system is output to the corresponding board card, data fed back by the telemetering system is received, and whether the design of the external interface function of the telemetering system is correct or not is judged by comparing the expected design value with the data fed back by the telemetering system. If 1V voltage is output to the D/A board card, return data of the telemetry system are collected, if the return is 1V (or has deviation but is within an allowable range), the AC/DC parameter collection function is considered to be correct, otherwise, the AC/DC parameter collection function is incorrect.
D/A board card: after the system is started, the expected design value of the alternating current/direct current analog parameter of the telemetry system output by the zero slot controller is received (the waveform, the frequency and the size of the output signal of the D/A port can be controlled online through software, and the simulation of signals similar to gyro voltage, excitation voltage and the like is realized), and the signals are converted into analog source signals and output to the signal conditioning combination module and the multiplexing board card.
Multiplexing board card: and forwarding the analog quantity signal from the D/A board card to the multimeter board card. Universal meter board card: and measuring an actual voltage value corresponding to the analog quantity signal from the multiplexing board card, and comparing a difference value between an expected design value and the actual voltage value of the analog quantity signal, so that the method can be used for self-checking and calibrating the analog quantity signal.
Relay board card: after the system is started, the expected design value of the command parameter of the telemetry system output by the zero-slot controller is received (the switch can be controlled to be closed and switched on and off on line through software, and the simulation of signals such as a depletion shutdown command and the like is realized), and the signal is converted into a command source signal and output to the signal conditioning combination module.
FPGA board card: after the system is started, the expected design value of the digital quantity parameter of the telemetering system output by the zero-slot controller is received (the duty ratio and the frequency of the output pulse of the I/O port are controlled by software to realize the simulation of signals similar to gyro pulse and the like), and the signals are converted into digital quantity source signals and output to the signal conditioning combination module.
Timer/counter board: after the signal processing module is started, an expected design value of a phase sequence signal of the telemetry system output by the zero slot controller is received (the phase difference, the duty ratio, the number and the like of the signal can be controlled online through software, and the simulation of the signal similar to the pulse phase sequence of the motor is realized), the phase sequence signal is converted into a phase sequence source signal, and the phase sequence source signal is output to the signal conditioning combination module.
And a signal conditioning combined module: and respectively conditioning the received analog source signal, command source signal, digital source signal and phase sequence source signal to the analog signal, command signal, digital signal and phase sequence signal, so that the voltage and driving capability of each path of signal meet the requirements of the remote measuring system, and outputting the conditioned signals to the interface adapter.
Interface adapter: and the analog quantity signal, the command signal, the digital quantity signal and the phase sequence signal from the signal conditioning combination module are forwarded to a corresponding external interface of the telemetry system.
The signal conditioning combination module comprises a D/A conditioning submodule, a relay conditioning submodule, an FPGA conditioning submodule and a timer/counter conditioning submodule. The interface adapter comprises a resistor R4, a resistor R5, a resistor R6 and three resistors R7 with the resistance of 100 ohms.
As shown in fig. 2, the D/a conditioning sub-module includes an operational amplifier a, an operational amplifier B, a resistor R1, a resistor R2, a resistor R3, and a resistor Rf, one end of the resistor R1 is connected to the analog source signal, the other end of the resistor R1 is connected to the inverting input terminal of the operational amplifier a and one end of the resistor Rf, the other end of the resistor Rf is connected to the output terminal of the operational amplifier a, the non-inverting input terminal of the operational amplifier a is grounded through the resistor R3, the output terminal of the operational amplifier a is connected to the non-inverting input terminal of the operational amplifier B through the resistor R2, the inverting input terminal of the operational amplifier B is connected to the output terminal, and the output terminal of the operational amplifier.
The relay conditioning submodule comprises a charged instruction conditioning submodule and an uncharged instruction conditioning submodule, as shown in fig. 3, the charged instruction conditioning submodule is composed of a 28V power supply, the positive end of the 28V power supply is connected with one end of a relay board card, the other end of the relay board card is connected with a resistor R5 of an interface adapter, and the negative end of the 28V power supply is connected with the telemetry system through the interface adapter. As shown in fig. 4, the neutral instruction conditioning submodule directly connects the two ends of the relay board card to the telemetry system.
As shown in fig. 5, the FPGA conditioning submodule is composed of a 54LS06 inverting buffer chip, an input terminal of the 54LS06 inverting buffer chip is connected to a digital source signal, and an output terminal of the 54LS06 inverting buffer chip is connected to a resistor R6.
As shown in fig. 6, the timer/counter conditioning submodule consists of three chips 54LS06, the positive terminal of the phase sequence a source signal is connected to a resistor R7 through the chip 54LS06, and the negative terminal is directly connected to the telemetry system. The positive terminal of the phase-sequence B source signal is connected to a resistor R7 via a 54LS06 chip, and the negative terminal is connected directly to the telemetry system. The positive terminal of the phase-sequence C source signal is connected to a resistor R7 via a 54LS06 chip, and the negative terminal is connected directly to the telemetry system.
And the universal platform adopts a Labview state machine to realize automatic flow, and the automatic flow controls all the test processes. The state machine not only can make the logic relation between multiple events in the program more concise, but also makes the logic relation processing between multiple events simpler due to the powerful error processing capability, user selection test, conditional execution and other functions. A state machine can be described more accurately in general by a state diagram. The Labview state machine consists of a Whi le main loop and a case structure, and realizes the jump of the state by using a bit register.
Initializing, namely initializing the operation of initializing the instrument; "Idle reset" a transitional state for the state of a hand-off with the user; "excitation preparation" is a preparation operation before the output of an excitation signal, such as channel switching, delay waiting, etc.; the output of the excitation signal is the output control of interface excitation signals such as D/A, instructions, digital quantity and the like; the state before acquisition is signal acquisition preparation of the A/D module and the universal meter module; the acquisition signal is signal acquisition; the interpretation is the interpretation of the single step test result and determines the next step of jumping.
Example (b):
the D/A board card selects NI PXI6723, the board card is 32 paths of D/A output, the voltage range is-10 v-10v, therefore, the number n of the board cards should meet the requirement of 32 x n > the number of direct current signals of the telemetering system, for example, if a certain model needs 100 paths of direct current signals, n is selected as 128 paths of D/A board card signal sources in total, the number is more than the required 100 paths, and then the signal conditioning combined module multiple G is determined according to the voltage range of the direct current signals of the telemetering system, so that the maximum value of the signal voltage of 10G > is met.
The relay board card selects NI PXI-2569, the board card is output by 100 paths of relay switches, the output characteristic is on or off, therefore, the number n of the board cards should meet the requirement of 100 x n > the instruction number of the telemetering system, for example, a certain model needs 50 paths of instruction signals, n is selected as a relay card signal source with 100 paths in total and is larger than the required 50 paths, and then, according to the instruction, a plurality of paths of switch channels are selected to enter the live conditioning, and the plurality of paths of switches are in direct short circuit.
The FPGA board card selects NI PXI-7841R, the board card is an FPGA with 90 paths of I/O output, the output characteristic is I/O configurable, the interior can be compiled online by using a logic programming language, and the FPGA board card is suitable for the generation of an excitation source of a digital quantity signal, so the number n of the board cards can meet 90 x n > the digital quantity of a telemetering system, for example, if a certain model needs 30 paths of digital quantity signals, n is selected as 1 and totally 90 paths of FPGA board signal sources, and is more than 30 paths, and then the number of pulse conditioning and the number of computer digital quantities in the digital quantity signals are used for determining the number of entering pulse conditioning and the number of entering computer digital conditioning.
The timer/counter board card selects NI PXI-6608, the board card is an 8-path timer module, the output characteristic is I/O square wave configurable duty ratio and period, therefore, the number n of the board cards should meet 8 × n > the number of phase sequence signals of the telemetry system, for example, if a certain model needs 3 paths of phase sequence signals, n is selected to be 1 to 8 paths of timer/counter card signal sources, and is more than 3 paths.
The internal software of the zero slot controller is realized by adopting a Labview tool, so that the NI PXI board card can be directly and seamlessly operated, and the state machine mode is adopted inside, so that the flow trend can be strictly controlled. When the system starts a state machine, the system enters an initial state and then enters a read configuration state to complete the board card configuration of a corresponding D/A module, a relay module, an FPGA module or a timer module; then entering a state of outputting excitation signals, operating signal output control of a corresponding D/A module, a relay module, an FPGA module or a timer module, outputting the excitation signals required to be output in the current step, and then entering a state of reading return values of the remote measuring system; in the state of reading the return value, reading the return value of the wave channel back, judging whether the design of the external interface function of the telemetering system is correct or not, and judging whether the state of entering the next step of outputting an excitation signal or the state of ending according to whether the process is reached or not; and in the end reset state, completing the reset of the signal, and restarting a new test flow according to the selection of a user, namely reentering the read configuration state.
Those skilled in the art will appreciate that those matters not described in detail in the present specification are well known in the art.
The present invention is not limited to the above-described embodiments, the above-described method is only illustrative and not restrictive, and those skilled in the art can make other forms within the spirit and scope of the present invention without departing from the spirit and scope of the present invention as defined by the appended claims.
Claims (7)
1. A PXI bus-based telemetry system external interface universal equivalent device is characterized in that: the PXI instrument combined module, the signal conditioning combined module and the interface adapter are included;
the PXI instrument combination module comprises a zero slot controller, a universal meter board card, a multiplexing board card, a D/A board card, a relay board card, an FPGA board card and a timer/counter board card;
a zero slot controller: controlling the starting of each board card in the PXI instrument combination module, outputting an expected design value of the external interface function of the remote measuring system to the corresponding board card, receiving data fed back by the remote measuring system, and judging whether the design of the external interface function of the remote measuring system is correct or not by comparing the expected design value with the data fed back by the remote measuring system;
D/A board card: after the system is started, receiving an expected design value of the alternating current/direct current analog parameter of the telemetry system output by the zero slot controller, converting the expected design value into an analog source signal, and outputting the analog source signal to a signal conditioning combination module and a multiplexing board card;
multiplexing board card: forwarding an analog source signal from the D/A board card to the multimeter board card;
universal meter board card: measuring an actual voltage value corresponding to an analog source signal from the multiplexing board card;
relay board card: after starting, receiving an expected design value of a command parameter of the telemetry system output by the zero slot controller, converting the expected design value into a command source signal, and outputting the command source signal to the signal conditioning combination module;
FPGA board card: after the system is started, receiving an expected design value of a digital quantity parameter of the telemetry system output by the zero slot controller, converting the expected design value into a digital quantity source signal through digital signal logic edited by online programming software, and outputting the digital quantity source signal to a signal conditioning combination module; the FPGA board card can control the duty ratio and frequency of the output pulse of the I/O port through software to realize the simulation of a gyro pulse signal;
timer/counter board: after the signal conditioning combined module is started, receiving an expected design value of a phase sequence signal of the telemetry system output by the zero slot controller, converting the expected design value into a phase sequence source signal and outputting the phase sequence source signal to the signal conditioning combined module; the timer/counter board card can control the phase difference, duty ratio and number of signals on line through software, so as to realize the simulation of the motor pulse phase sequence signal;
and a signal conditioning combined module: respectively conditioning the received analog source signal, command source signal, digital source signal and phase sequence source signal to the analog signal, command signal, digital signal and phase sequence signal, so that the voltage and driving capability of each path of signal meet the requirements of a remote measuring system, and outputting the conditioned signals to an interface adapter;
interface adapter: the analog quantity signal, the command signal, the digital quantity signal and the phase sequence signal from the signal conditioning combination module are forwarded to a corresponding external interface of the remote measuring system;
the zero slot controller software is realized by adopting a Labview tool, a state machine mode is adopted in the zero slot controller software, when a system starts a state machine, the system enters an initial state, then enters a reading configuration state, and the corresponding D/A module, the relay module, the FPGA module or the timer module board card configuration is completed; then entering a state of outputting excitation signals, operating signal output control of a corresponding D/A module, a relay module, an FPGA module or a timer module, outputting the excitation signals required to be output in the current step, and then entering a state of reading return values of the remote measuring system; in the state of reading the return value, reading the return value of the wave channel back, judging whether the design of the external interface function of the telemetering system is correct or not, and judging whether the state of entering the next step of outputting an excitation signal or the state of ending according to whether the process is reached or not; and in the end reset state, completing the reset of the signal, and restarting a new test flow according to the selection of a user, namely reentering the read configuration state.
2. The PXI bus-based telemetry system external interface universal equivalent according to claim 1, wherein: the signal conditioning combination module comprises a D/A conditioning submodule, a relay conditioning submodule, an FPGA conditioning submodule and a timer/counter conditioning submodule.
3. The PXI bus-based telemetry system external interface universal equivalent according to claim 2, wherein: the D/A conditioning submodule comprises an operational amplifier A, an operational amplifier B, a resistor R1, a resistor R2, a resistor R3 and a resistor Rf, wherein one end of the resistor R1 is connected with an analog source signal, the other end of the resistor R1 is connected with the inverting input end of the operational amplifier A and one end of the resistor Rf, the other end of the resistor Rf is connected with the output end of the operational amplifier A, the non-inverting input end of the operational amplifier A is grounded through a resistor R3, the output end of the operational amplifier A is connected with the non-inverting input end of the operational amplifier B through a resistor R2, the inverting input end of the operational amplifier B is connected with the output end, and meanwhile, the output end of the operational amplifier B serves as the output end of.
4. The PXI bus-based telemetry system external interface universal equivalent according to claim 2, wherein: the relay conditioning submodule comprises a charged instruction conditioning submodule and an uncharged instruction conditioning submodule, the charged instruction conditioning submodule consists of a 28V power supply, the positive end of the 28V power supply is connected with one end of a relay board card, the other end of the relay board card is connected with an interface adapter, and the negative end of the 28V power supply is connected with a remote measuring system through the interface adapter; and the uncharged instruction conditioning submodule directly connects two ends of the relay board card with the remote measuring system.
5. The PXI bus-based telemetry system external interface universal equivalent according to claim 2, wherein: the FPGA conditioning submodule consists of a 54LS06 inverting buffer chip, the input end of the 54LS06 inverting buffer chip is connected with a digital source signal, and the output end of the 54LS06 inverting buffer chip is used as the output end of the FPGA conditioning submodule and connected with an interface adapter.
6. The PXI bus-based telemetry system external interface universal equivalent according to claim 2, wherein: the timer/counter conditioning submodule consists of three 54LS06 chips, the negative end of each phase sequence source signal is directly connected with the telemetry system, the positive end of each phase sequence source signal is connected with the input end of one 54LS06 chip, and the output ends of the three 54LS06 chips are used as the three output ends of the timer/counter conditioning submodule and are all connected with the interface adapter.
7. The PXI bus-based telemetry system external interface universal equivalent according to claim 2, wherein: the interface adapter comprises a resistor R4, a resistor R5, a resistor R6 and three resistors R7 with the same resistance;
the resistor R4 is connected with the output end of the D/A conditioning submodule, the resistor R5 is connected with the relay board card, and the resistor R6 is connected with the output end of the FPGA conditioning submodule; each resistor R7 is connected to one output of the timer/counter conditioning submodule.
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