CN106933215A - A kind of telemetry system external tapping generalized equivalent device based on PXI buses - Google Patents
A kind of telemetry system external tapping generalized equivalent device based on PXI buses Download PDFInfo
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- CN106933215A CN106933215A CN201710138007.3A CN201710138007A CN106933215A CN 106933215 A CN106933215 A CN 106933215A CN 201710138007 A CN201710138007 A CN 201710138007A CN 106933215 A CN106933215 A CN 106933215A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B23/00—Testing or monitoring of control systems or parts thereof
- G05B23/02—Electric testing or monitoring
- G05B23/0205—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults
- G05B23/0208—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults characterized by the configuration of the monitoring system
- G05B23/0213—Modular or universal configuration of the monitoring system, e.g. monitoring system having modules that may be combined to build monitoring program; monitoring system that can be applied to legacy systems; adaptable monitoring system; using different communication protocols
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/23—Pc programming
- G05B2219/23258—GUI graphical user interface, icon, function bloc editor, labview
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/25—Pc structure of the system
- G05B2219/25314—Modular structure, modules
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Abstract
A kind of telemetry system external tapping generalized equivalent device based on PXI buses, including PXI instrument combinations module, signal condition composite module and interface adapter, wherein PXI instrument combinations module includes Zero greeve controller, universal meter board, multiplexing board, D/A boards, relay board, FPGA boards and timer/counter board.Wherein PXI instrument combinations module and signal condition composite module are general-purpose platform, and interface adapter is model specific part.The present invention adds private adapter framework using general-purpose platform, wherein general-purpose platform exports the signals such as analog quantity, instruction, digital quantity and phase sequence, and interface adapter then carries out differentiation design according to each model interface connector type and physical definition, the signal of general-purpose platform is reduced and transferred, the unified test to telemetry system external interface is realized.
Description
Technical field
The present invention relates to a kind of telemetry system external tapping generalized equivalent device based on PXI buses, belong to carrier rocket measurement
System testing field.
Background technology
The external tapping of current launch vehicle telemetry system refer generally to control system, using system, servo-drive system etc. other
The electric interfaces of electrical system.The interface testing is typically respectively adopted the signal test board of the types such as alternating current-direct current, instruction, digital quantity
Independent test is carried out, inefficiency, automaticity are low, poor universality, high cost.Also Some Universities begin one's study equivalent
Device, such as the 8th phase in 2015 instrument and meter device in give a kind of simulator, mainly include dual mode communication interface board, backboard,
Analog signal plate, command signal plate, digital quantity signal plate, pulse signal plate, realize the signal source function of external system simulator.Should
Simulator is substantially that all types of signals are integrated into an equipment, if expanding to other models, due to resource and point position
Not expansible, only industrial computer is constant, and signal source equipment still needs and produces again, does not possess flexible, general easy extension characteristic,
There is also the problems such as framework speed is low, autgmentability is poor, maintenance cost is high simultaneously.
The content of the invention
Technology solve problem of the invention is：Overcome the deficiencies in the prior art, there is provided a kind of remote measurement system based on PXI buses
System external tapping generalized equivalent device, improves the automaticity and efficiency of test, reduces test and maintenance cost, can flexibly expand
Exhibition is suitable for polytypic test.
Technical solution of the invention is：A kind of telemetry system external tapping generalized equivalent device based on PXI buses, including
PXI instrument combinations module, signal condition composite module and interface adapter；
PXI instrument combinations module includes Zero greeve controller, universal meter board, multiplexing board, D/A boards, relay
Board, FPGA boards and timer/counter board；
Zero greeve controller：The startup of each board, telemetry system is exported to corresponding board in control PXI instrument combination modules
The desired design value of external interface function, receives the data from telemetry system feedback, by comparing desired design value and remote measurement
The data of system feedback, judge whether the design of telemetry system external interface function is correct；
D/A boards：After startup, the telemetry system alternating current-direct current analog quantity parameter desired design of Zero greeve controller output is received
Value, is converted into analog quantity source signal, exports to signal condition composite module and multiplexing board；
Multiplexing board：Analog quantity source signal from D/A boards is transmitted to universal meter board；
Universal meter board：Measure the corresponding actual voltage value of analog quantity source signal from multiplexing board；
Relay board：After startup, the telemetry system order parameter desired design value of Zero greeve controller output is received, by it
Instruction source signal is converted to, is exported and is given signal condition composite module；
FPGA boards：After startup, the telemetry system digital quantity parameter desired design value of Zero greeve controller output is received, by it
Digital quantity source signal is converted to, is exported and is given signal condition composite module；
Timer/counter board：After startup, the telemetry system phase sequence anticipated signal design of Zero greeve controller output is received
Value, is converted into phase sequence source signal, exports and gives signal condition composite module；
Signal condition composite module：The analog quantity source signal that to receive respectively, instruction source signal, digital quantity source signal with
And phase sequence source signal is nursed one's health to analog signalses, command signal, digital quantity signal and phase sequential signal, the voltage of Shi Mei roads signal
Meet telemetry system requirement with driving force, and by the signal output after conditioning to interface adapter；
Interface adapter：By the analog signalses from signal condition composite module, command signal, digital quantity signal and
Phase sequential signal is transmitted to the corresponding external interface of telemetry system.
The signal condition composite module includes D/A conditionings submodule, relay conditioning submodule, FPGA conditioning submodules
And timer/counter conditioning submodule.
The D/A conditionings submodule includes operational amplifier A, operational amplifier B, resistance R1, resistance R2, resistance R3, electricity
One end connection analog quantity source signal of resistance Rf, resistance R1, other end inverting input and resistance simultaneously with operational amplifier A
One end connection of Rf, the other end of resistance Rf is connected with the output end of operational amplifier A, the normal phase input end of operational amplifier A
It is grounded by resistance R3, the output end of operational amplifier A is connected by resistance R2 with the normal phase input end of operational amplifier B, is transported
The inverting input for calculating amplifier B is connected with output end, while the output end of operational amplifier B is connected with interface adapter.
The relay conditioning submodule includes powered instruction conditioning submodule and not charged instruction conditioning submodule, described
Powered instruction conditioning submodule is made up of a 28V power supply, and 28V power positive ends are connected with relay board one end, relay board
The card other end is connected with interface adapter, and 28V power supply negative terminals are connected by interface adapter with telemetry system；Not charged instruction is adjusted
Directly with telemetry system be connected at relay board two ends by reason submodule.
FPGA conditioning submodule is made up of 54LS06 inverter buffer chips, 54LS06 inverter buffer chips it is defeated
Enter end to be connected with digital quantity source signal, the output end of 54LS06 inverter buffer chips is connected with interface adapter.
The timer/counter conditioning submodule is made up of three 54LS06 chips, per the anode of road phase sequence source signal
It is connected with interface adapter by 54LS06 chips, negative terminal is directly connected with telemetry system.
The interface adapter includes resistance R4, resistance R5, resistance R6, three resistance identical resistance R7；
Resistance R4 is connected with the output end of D/A conditioning submodules, and resistance R5 is connected with relay board, resistance R6 and FPGA
Nurse one's health the output end connection of submodule；Each resistance R7 is connected with an output end of timer/counter conditioning submodule.
Compared with prior art, the present invention has the advantages that：
(1) present invention adds private adapter framework, wherein general-purpose platform output analog quantity, instruction, number using general-purpose platform
The signal such as word amount and phase sequence, and interface adapter then carries out difference according to each model interface connector type and physical definition
Change design, the signal of general-purpose platform is reduced and transferred, realize the unified test to telemetry system external interface.
(2) because using PXI bus instruments composite module, used as general-purpose platform nucleus equipment, its large number of shelf is produced
Product resource is to realize one of inexpensive factor, therefore the general-purpose platform is the hand for realizing automatic test and low-maintenance cost
Section.And different model test request is met by passing through respective model interface adapter.
(3) present invention can once connect the test for completing whole external interfaces, and testing process is performed automatically, test data
Automatic interpretation, without manual intervention, greatly improves testing efficiency.By general-purpose platform who and, cover polytypic state, energy
The adjustment of state on dynamic reply arrow, with higher flexibility.
Brief description of the drawings
Fig. 1 is generalized equivalent device composition frame chart of the present invention；
Fig. 2 is that D/A nurses one's health submodular circuits figure；
Fig. 3 is the powered conditioning submodular circuits figure of relay；
Fig. 4 is the not charged conditioning submodular circuits figure of relay；
Fig. 5 is that FPGA nurses one's health submodular circuits figure；
Fig. 6 is that timer/counter nurses one's health submodular circuits figure.
Specific embodiment
It is many for present polytypic telemetry system external tapping test equipment species, autgmentability is poor, high cost the features such as, this hair
A kind of telemetry system external tapping generalized equivalent device based on PXI buses of bright design, can flexible expansion tested suitable for polytypic, fortune
Telemetry of launch vehicle system is carried when subsystem test is carried out, generalized equivalent device simulation of the invention sends external tapping signal and gives remote measurement system
System, by retaking of a year or grade and parses telemetry data packet, and whether the measurement function of interpretation telemetry system external interface is correct.
As shown in figure 1, the present invention includes PXI instrument combinations module, signal condition composite module and interface adapter.
PXI instrument combinations module includes Zero greeve controller, universal meter board, multiplexing board, D/A boards, relay board, FPGA
Board and timer/counter board.
Wherein PXI instrument combinations module and signal condition composite module are general-purpose platform, and interface adapter is model specific
Part, simulator working method of the present invention is to control D/A boards, FPGA boards, relay in PXI instrument combination modules by software
Device board, the configuration of timer board and output size, wherein D/A boards output AC/DC analog quantity voltage signal, FPGA boards
The signals such as output digital quantity signal, relay board output switch, timer/counter board output square-wave signal, by letter
Number conditioning composite module and interface adapter, simulate the signal such as alternating current-direct current, instruction, digital quantity, phase sequence of external system, by outer system
System interface accesses telemetry system.
Zero greeve controller：The startup of each board, telemetry system is exported to corresponding board in control PXI instrument combination modules
The desired design value of external interface function, receives the data from telemetry system feedback, by comparing desired design value and remote measurement
The data of system feedback, judge whether the design of telemetry system external interface function is correct.1V voltages such as are exported to D/A boards,
Collection telemetry system return data, if passback is 1V (or have deviation, but in allowed band), then it is assumed that alternating current-direct current is joined
Number acquisition function is correct, otherwise incorrect.
D/A boards：After startup, the telemetry system alternating current-direct current analog quantity parameter desired design value of Zero greeve controller output is received
(by software D/A mouthfuls of signal output waveform capable of on-line, frequency, size, realize similar to gyro voltage, excitation voltage etc.
The simulation of signal), analog quantity source signal is converted into, export to signal condition composite module and multiplexing board.
Multiplexing board：Analog signalses from D/A boards are transmitted to universal meter board.Universal meter board：Survey
The corresponding actual voltage value of analog signalses from multiplexing board is measured, analog signalses desired design value and reality is compared
Difference between magnitude of voltage, can be used for the self-inspection and calibration to analog signalses.
Relay board：After startup, the telemetry system order parameter desired design value for receiving Zero greeve controller output (passes through
Software switch closure capable of on-line, break-make realizes the simulation similar to signals such as depleted shutdown instructions), it is converted into finger
Source signal is made, is exported and is given signal condition composite module.
FPGA boards：After startup, the telemetry system digital quantity parameter desired design value for receiving Zero greeve controller output (passes through
Software controls I/O mouthfuls of dutycycle, the frequency of output pulse, realizes the simulation similar to signals such as gyro pulses), it is converted into
Digital quantity source signal, exports and gives signal condition composite module.
Timer/counter board：After startup, the telemetry system phase sequence anticipated signal design of Zero greeve controller output is received
Value (by software signal phase difference capable of on-line, dutycycle, quantity etc., is realized similar to signals such as motor pulses phase sequences
Simulation), phase sequence source signal is converted into, export and give signal condition composite module.
Signal condition composite module：The analog quantity source signal that to receive respectively, instruction source signal, digital quantity source signal with
And phase sequence source signal is nursed one's health to analog signalses, command signal, digital quantity signal and phase sequential signal, the voltage of Shi Mei roads signal
Meet telemetry system requirement with driving force, and by the signal output after conditioning to interface adapter.
Interface adapter：By the analog signalses from signal condition composite module, command signal, digital quantity signal and
Phase sequential signal is transmitted to the corresponding external interface of telemetry system.
Signal condition composite module include D/A conditioning submodule, relay conditioning submodule, FPGA conditioning submodule and
Timer/counter nurses one's health submodule.Interface adapter includes that resistance R4, resistance R5, resistance R6, three resistances are 100 Europe
Resistance R7.
As shown in Fig. 2 D/A conditioning submodules include operational amplifier A, operational amplifier B, resistance R1, resistance R2, resistance
R3, resistance Rf, one end connection analog quantity source signal of resistance R1, the other end simultaneously with the inverting input of operational amplifier A with
And one end of resistance Rf connects, the other end of resistance Rf is connected with the output end of operational amplifier A, the positive of operational amplifier A
Input is grounded by resistance R3, and the output end of operational amplifier A is connected by the normal phase input end of resistance R2 and operational amplifier B
Connect, the inverting input of operational amplifier B is connected with output end, while the output end of operational amplifier B and interface adapter
Resistance R4 is connected.
Relay conditioning submodule includes powered instruction conditioning submodule and not charged instruction conditioning submodule, such as Fig. 3 institutes
Show, powered instruction conditioning submodule is made up of a 28V power supply, and 28V power positive ends are connected with relay board one end, relay
The board other end is connected with the resistance R5 of interface adapter, and 28V power supply negative terminals are connected by interface adapter with telemetry system.Such as
Shown in Fig. 4, directly with telemetry system be connected at relay board two ends by not charged instruction conditioning submodule.
As shown in figure 5, FPGA conditioning submodules are made up of 54LS06 inverter buffer chips, 54LS06 inverter buffer cores
The input of piece is connected with digital quantity source signal, and the output end of 54LS06 inverter buffer chips is connected with resistance R6.
As shown in fig. 6, timer/counter conditioning submodule is made up of three 54LS06 chips, phase sequence A source signals are just
End is connected by 54LS06 chips with a resistance R7, and negative terminal is directly connected with telemetry system.The anode of phase sequence B source signals passes through
54LS06 chips are connected with a resistance R7, and negative terminal is directly connected with telemetry system.The anode of phase sequence C source signals passes through 54LS06
Chip is connected with a resistance R7, and negative terminal is directly connected with telemetry system.
General-purpose platform realizes automatic flow come automatic flow controls all test process using Labview state machines.Shape
State machine can not only make the logical relation in program between multiple affair more concise, while its powerful error processing capacity,
The functions such as user's selection test, condition execution process the logical relation between multiple affair becomes more simple.Shape can typically be used
State figure is accurately described to a state machine.Labview state machines are by Whi le major cycles and a case structure group
Into, and redirecting for state is realized using bit register.
" initialization " carries out the operation of instrument initialization；" free time resets " a kind of transition state, for being come into contacts with user
State；" excitation prepares " is operated for the preparation before pumping signal output, such as passage switching, time delay are waited etc.；" pumping signal
Output " is the output control of the interface pumping signals such as D/A, instruction, digital quantity；" state before collection " is A/D modules, universal meter mould
The signal acquisition of block prepares；" collection signal " is signal acquisition；" interpretation " is the interpretation to single stepping test result, and is determined next
Step redirects state.
Embodiment：
D/A boards select NI PXI6723, and the board is that 32 road D/A are exported, and voltage range is -10v-10v, therefore board
Quantity n should meet 32*n>Telemetry system direct current signal quantity, such as certain model need the tunnel of direct current signal 100, then n elects 4 as and is total to
128 road D/A board signal sources, more than required 100 tunnel, then determine that signal is adjusted according to telemetry system direct-flow signal voltage scope
Reason composite module multiple G, so as to meet 10G>Signal voltage maximum.
Relay board selects NI PXI-2569, and the board is No. 100 relay switches outputs, output characteristics for logical or
It is disconnected, therefore board quantity n should meet 100*n>Telemetry system instruction number, such as certain model need the tunnel of command signal 50, then n
Elect 1 totally No. 100 relay card signal source as, more than required 50 tunnel, then according to instruction for powered instruction or not charged instruction come
How many way switch passages are selected to enter powered conditioning, how many way switch are direct short circuit.
FPGA boards select NI PXI-7841R, and the board is the FPGA of 90 road I/O outputs, and output characteristics can match somebody with somebody for I/O
Put, the usable logic programming language in inside is write online, and the driving source for being adapted to digital quantity signal is produced, therefore board quantity
N should meet 90*n>Telemetry system digital quantity quantity, such as certain model need the tunnel of digital quantity signal 30, then n elects 1 totally 90 tunnel as
FPGA card signal source, more than required 30 tunnel, then according to pulse digital quantity in digital quantity signal and computer word digital quantity quantity
It is how many to enter computer word conditioning to determine how much enter pulse conditioning.
Timer/counter board selects NI PXI-6608, and the board is 8 tunnel timer modules, and output characteristics is I/O
Square wave can configure dutycycle and cycle, therefore board quantity n should meet 8*n>Telemetry system phase sequence number of signals, such as certain type
Number the tunnel of phase sequential signal 3 is needed, then n elects 1 totally 8 road timer/counter card signal source as, more than required 3 tunnel,.
Zero greeve controller in house software realized using Labview instruments, so can direct more seamless operation NI PXI boards,
Internal adoption status machine pattern, so can strict control flow trend.Enter original state when system starts state machine, connect
Into configuration status is read, complete the configuration of corresponding D/A modules, relay module, FPGA module or timer module board；
Output drive signal condition is subsequently entered, corresponding D/A modules, relay module, FPGA module or timer module is operated
Signal output is controlled, the pumping signal output that will be exported needed for current procedures, and state of value is returned subsequently into telemetry system is read；
In return state of value is read, the back production value of radio frequency channel is read, and the design of interpretation telemetry system external interface function is
It is no correct, then most judged it is to enter the output drive signal condition of next step or terminate shape later according to whether reaching flow
State；Terminating reset state, completing the reset of signal, and chosen whether to restart new testing process according to user, that is, weighing
It is new to enter reading configuration status.
The content not being described in detail in description of the invention belongs to the known technology of those skilled in the art.
The invention is not limited in above-mentioned specific embodiment, above-mentioned method is only schematic, rather than restricted
, those of ordinary skill in the art are not departing from spirit of the invention and claimed under enlightenment of the invention
Under ambit, the other forms made also are belonged within protection of the invention.
Claims (7)
1. a kind of telemetry system external tapping generalized equivalent device based on PXI buses, it is characterised in that：Including PXI instrument combination moulds
Block, signal condition composite module and interface adapter；
PXI instrument combinations module include Zero greeve controller, universal meter board, multiplexing board, D/A boards, relay board,
FPGA boards and timer/counter board；
Zero greeve controller：The startup of each board in control PXI instrument combination modules, it is external to corresponding board output telemetry system
The desired design value of interface function, receives the data from telemetry system feedback, by comparing desired design value and telemetry system
The data of feedback, judge whether the design of telemetry system external interface function is correct；
D/A boards：After startup, the telemetry system alternating current-direct current analog quantity parameter desired design value of Zero greeve controller output is received, will
It is converted to analog quantity source signal, exports to signal condition composite module and multiplexing board；
Multiplexing board：Analog quantity source signal from D/A boards is transmitted to universal meter board；
Universal meter board：Measure the corresponding actual voltage value of analog quantity source signal from multiplexing board；
Relay board：After startup, the telemetry system order parameter desired design value of Zero greeve controller output is received, be converted
It is instruction source signal, exports and give signal condition composite module；
FPGA boards：After startup, the telemetry system digital quantity parameter desired design value of Zero greeve controller output is received, be converted
It is digital quantity source signal, exports and give signal condition composite module；
Timer/counter board：After startup, the telemetry system phase sequence anticipated signal design load of Zero greeve controller output is received,
Phase sequence source signal is converted into, is exported and is given signal condition composite module；
Signal condition composite module：Analog quantity source signal, instruction source signal, digital quantity source signal and the phase that will be received respectively
Sequence source signal is nursed one's health to analog signalses, command signal, digital quantity signal and phase sequential signal, the voltage of Shi Mei roads signal and drive
Kinetic force meets telemetry system requirement, and by the signal output after conditioning to interface adapter；
Interface adapter：By the analog signalses from signal condition composite module, command signal, digital quantity signal and phase sequence
Signal is transmitted to the corresponding external interface of telemetry system.
2. a kind of telemetry system external tapping generalized equivalent device based on PXI buses according to claim 1, its feature exists
In：The signal condition composite module include D/A conditioning submodule, relay conditioning submodule, FPGA conditioning submodule and
Timer/counter nurses one's health submodule.
3. a kind of telemetry system external tapping generalized equivalent device based on PXI buses according to claim 2, its feature exists
In：The D/A conditionings submodule includes operational amplifier A, operational amplifier B, resistance R1, resistance R2, resistance R3, resistance Rf,
One end connection analog quantity source signal of resistance R1, the other end simultaneously with the inverting input of operational amplifier A and resistance Rf
One end connects, and the other end of resistance Rf is connected with the output end of operational amplifier A, and the normal phase input end of operational amplifier A passes through
Resistance R3 is grounded, and the output end of operational amplifier A is connected by resistance R2 with the normal phase input end of operational amplifier B, and computing is put
The inverting input of big device B is connected with output end, while the output end of operational amplifier B nurses one's health the output of submodule as D/A
End, is connected with interface adapter.
4. a kind of telemetry system external tapping generalized equivalent device based on PXI buses according to claim 2, its feature exists
In：The relay conditioning submodule includes powered instruction conditioning submodule and not charged instruction conditioning submodule, described powered
Instruction conditioning submodule is made up of a 28V power supply, and 28V power positive ends are connected with relay board one end, and relay board is another
One end is connected with interface adapter, and 28V power supply negative terminals are connected by interface adapter with telemetry system；Not charged instruction conditioning
Directly with telemetry system be connected at relay board two ends by module.
5. a kind of telemetry system external tapping generalized equivalent device based on PXI buses according to claim 2, its feature exists
In：The FPGA conditionings submodule is made up of 54LS06 inverter buffer chips, the input of 54LS06 inverter buffer chips
It is connected with digital quantity source signal, the output end of 54LS06 inverter buffer chips nurses one's health the output end of submodule as FPGA, with
Interface adapter is connected.
6. a kind of telemetry system external tapping generalized equivalent device based on PXI buses according to claim 2, its feature exists
In：The timer/counter conditioning submodule be made up of three 54LS06 chips, often the negative terminal of road phase sequence source signal directly with
Telemetry system is connected, and is connected with the input of a 54LS06 chip per the anode of road phase sequence source signal, three 54LS06 chips
Output end as timer/counter nurse one's health submodule three output ends, be connected with interface adapter.
7. a kind of telemetry system external tapping generalized equivalent device based on PXI buses according to claim 2, its feature exists
In：The interface adapter includes resistance R4, resistance R5, resistance R6, three resistance identical resistance R7；
Resistance R4 is connected with the output end of D/A conditioning submodules, and resistance R5 is connected with relay board, and resistance R6 and FPGA is nursed one's health
The output end connection of submodule；Each resistance R7 is connected with an output end of timer/counter conditioning submodule.
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| 庞俊奇: "某型号遥测外系统等效器的设计与实现", 《中国优秀硕士学位论文全文数据库 信息科技辑》 * |
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| 邓健等: "基于PXI技术的运载火箭控制系统外系统等效装置的设计", 《导弹与航天运载技术》 * |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107589328A (en) * | 2017-09-29 | 2018-01-16 | 武汉华海通用电气有限公司 | A kind of power electronics equips plate level Redundant Test System |
| CN108007284A (en) * | 2017-11-27 | 2018-05-08 | 上海航天测控通信研究所 | A kind of universal carrier rocket external system equivalent device |
| CN109489707A (en) * | 2018-11-06 | 2019-03-19 | 倍赫曼工业技术(天津)有限公司 | Incremental photoelectric encoder testing machine and testing method |
| CN118091298A (en) * | 2024-04-25 | 2024-05-28 | 山西中北测控科技有限公司 | Universal equivalent test system and test method |
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