CN214591359U

CN214591359U - Power-on reset circuit

Info

Publication number: CN214591359U
Application number: CN202120951369.6U
Authority: CN
Inventors: 杨江
Original assignee: Shenzhen Goodix Technology Co Ltd
Current assignee: Shenzhen Goodix Technology Co Ltd
Priority date: 2020-09-30
Filing date: 2020-09-30
Publication date: 2021-11-02
Anticipated expiration: 2030-09-30
Also published as: CN213213426U

Abstract

An embodiment of the present application provides a power-on reset circuit, including: the band gap reference circuit, the current comparator and the voltage comparison circuit are all powered by a voltage source; the first output end of the band-gap reference circuit is connected with the control end of the current comparator; a first current input end and a second current input end of the current comparator are respectively connected with a first current signal and a second current signal, and an output end of the current comparator is connected with a control end of the voltage comparison circuit; the first input end of the voltage comparison circuit is connected with the first output end of the band-gap reference circuit, the second input end of the voltage comparison circuit is connected with a signal used for indicating the voltage from the voltage source, and the output end of the voltage comparison circuit is used for outputting a reset signal. The method avoids errors caused by output of reset signals when the reference generating circuit is unstable, reduces false triggering in the power-on process, and improves the power-on reliability.

Description

Power-on reset circuit

Technical Field

The embodiment of the application relates to the technical field of sensors, in particular to a power-on reset circuit.

Background

In some application scenarios, the Power-on Reset Circuit (POR) may be affected by temperature, and in order to reduce the influence of temperature on voltage and provide stable voltage for the chip, a bandgap reference Circuit connected to the Power voltage is generally used to provide stable voltage for the chip. Taking this application scenario as an example, in the power-on process, the power supply voltage starts to increase from 0 potential, the bandgap reference circuit starts to operate under the driving of the power supply voltage, and when the power supply voltage increases to a preset value, the power-on reset circuit outputs a reset signal, but in actual circumstances, the bandgap reference circuit may not be stable yet, the voltage provided for the chip is not stable yet, and at this time, the chip starts to operate after receiving the reset signal, which is easy to cause errors, and thus the chip cannot be started normally.

SUMMERY OF THE UTILITY MODEL

In view of the above, an object of the present invention is to provide a power-on reset circuit, which overcomes the defect of error caused by outputting a reset signal when a bandgap reference circuit is unstable in the prior art.

The embodiment of the application provides a power-on reset circuit, which comprises: the band gap reference circuit, the current comparator and the voltage comparison circuit are all powered by a voltage source;

the first output end of the band-gap reference circuit is connected with the control end of the current comparator and used for inputting a first signal to the control end of the current comparator so as to control the current comparator to work;

a first current input end and a second current input end of the current comparator are respectively connected with a first current signal and a second current signal, and an output end of the current comparator is connected with a control end of the voltage comparison circuit and is used for inputting a second signal to the control end of the voltage comparison circuit so as to control the voltage comparison circuit to work;

the first input end of the voltage comparison circuit is connected with the first output end of the band-gap reference circuit, the second input end of the voltage comparison circuit is connected with a signal used for indicating the voltage of the voltage source, and the output end of the voltage comparison circuit is used for outputting a reset signal.

Optionally, in an embodiment of the present application, the current comparator includes a first switch and a current mirror;

a first input end of the current mirror is connected with a first current signal;

the first end of the first switch is a second current input end and an output end of the current comparator, the second end of the first switch is connected with the second input end of the current mirror, and the control end of the first switch is a control end of the current comparator.

Optionally, in an embodiment of the present application, the first switch includes a first field effect transistor;

the drain electrode of the first field effect transistor is the first end of the first switch, the source electrode of the first field effect transistor is the second end of the first switch, and the grid electrode of the first field effect transistor is the control end of the first switch;

the drain electrode of the first field effect transistor is connected with a second current signal, the source electrode of the first field effect transistor is connected with the second input end of the current mirror, and the grid electrode of the first field effect transistor is connected with the first output end of the band-gap reference circuit.

Optionally, in an embodiment of the present application, the current comparator further includes a voltage limiting element;

the first end of the voltage limiting element is a first current input end of the current comparator, the second end of the voltage limiting element is connected with the first input end of the current mirror, and the first input end of the current mirror is connected with a first current signal through the voltage limiting element.

Optionally, in an embodiment of the present application, the voltage limiting element includes a second field effect transistor;

the source electrode of the second field effect transistor is the first end of the voltage limiting element, and the drain electrode of the second field effect transistor is the second end of the voltage limiting element;

the source electrode of the second field effect transistor is connected with the first current signal, the drain electrode of the second field effect transistor is connected with the first input end of the current mirror, and the grid electrode of the second field effect transistor is connected with the drain electrode of the second field effect transistor.

Optionally, in an embodiment of the present application, the current mirror includes a third field effect transistor and a fourth field effect transistor;

the drain electrode of the third field effect transistor is a first input end of the current mirror, and the drain electrode of the fourth field effect transistor is a second input end of the current mirror;

the drain electrode of the third field effect transistor is connected with the grid electrode, and the grid electrode of the third field effect transistor is connected with the grid electrode of the fourth field effect transistor.

Optionally, in an embodiment of the present application, a current of the first current signal is greater than a current of the second current signal, and the second signal is a high level signal.

Optionally, in an embodiment of the present application, the voltage comparison circuit includes a voltage division control branch and a voltage comparator;

the input end of the voltage division control branch circuit is a second input end of the voltage comparison circuit, the control end of the voltage division control branch circuit is a control end of the voltage comparison circuit, the control end of the voltage division control branch circuit is connected with the output end of the current comparator, the first output end of the voltage division control branch circuit is connected with the positive phase input end of the voltage comparator, and the second output end of the voltage division control branch circuit is grounded;

the inverting input end of the voltage comparator is the first input end of the voltage comparison circuit, the output end of the voltage comparator is the output end of the voltage comparison circuit, and the inverting input end of the voltage comparator is connected with the first output end of the band-gap reference circuit.

Optionally, in an embodiment of the present application, the voltage division control branch includes a voltage comparator, a second switch, a first resistor, and a second resistor;

the first end of the second switch is the input end of the voltage division control branch circuit, the control end of the second switch is the control end of the voltage division control branch circuit, and the output end of the voltage comparator is the output end of the voltage comparison circuit;

the first end of the second switch is connected with a voltage source, and the second end of the second switch is connected with the first end of the first resistor;

the second end of the first resistor is a first output end of the voltage division control branch circuit, the second end of the first resistor is connected with the first end of the second resistor, and the second end of the first resistor is connected with a positive phase input end of the voltage comparator;

the second end of the second resistor is a second output end of the voltage division control branch circuit, and the second end of the second resistor is grounded.

Optionally, in an embodiment of the present application, the second switch includes a fifth fet;

the grid electrode of the fifth field effect transistor is the control end of the second switch, the source electrode of the fifth field effect transistor is the first end of the second switch, and the drain electrode of the fifth field effect transistor is the second end of the second switch;

the grid electrode of the fifth field effect transistor is connected with the output end of the current comparator, the source electrode of the fifth field effect transistor is connected with the voltage source, and the drain electrode of the fifth field effect transistor is connected with the first end of the first resistor.

Optionally, in an embodiment of the present application, the voltage comparison circuit further includes an inverter;

the input end of the phase inverter is connected with the output end of the current comparator, and the output end of the phase inverter is connected with the enable end of the voltage comparator and used for inputting an enable signal to the enable end of the voltage comparator.

Optionally, in an embodiment of the present application, the first current signal and the second current signal are from a bandgap reference circuit, and a second output terminal of the bandgap reference circuit is connected to the first current input terminal of the current comparator, for inputting the first current signal to the current comparator; and a third output end of the band-gap reference circuit is connected with a second current input end of the current comparator and used for inputting a second current signal to the current comparator.

Optionally, in an embodiment of the present application, the bandgap reference circuit includes a start-up circuit and a reference generation circuit;

the first output end of the reference generating circuit is the first output end of the band-gap reference circuit, the second output end of the reference generating circuit is the second output end of the band-gap reference circuit, and the third output end of the reference generating circuit is the third output end of the band-gap reference circuit;

the input end of the starting circuit is connected with the first output end of the reference generating circuit, and the first trigger node of the starting circuit is connected with the second trigger node of the reference generating circuit and used for inputting a trigger signal to the second trigger node of the reference generating circuit so as to trigger the reference generating circuit to work.

Optionally, in an embodiment of the present application, the reference generating circuit includes an operational amplifier, and a first branch, a second branch, and a third branch connected in parallel with each other;

the first branch circuit, the second branch circuit and the third branch circuit are all connected with a voltage source;

the output end of the first branch circuit and the output end of the second branch circuit are respectively connected with the inverting input end and the positive input end of the operational amplifier, and the correlation between the voltage and the temperature of the output end of the first branch circuit is different from the correlation between the voltage and the temperature of the output end of the second branch circuit;

the output end of the operational amplifier is respectively connected with the control end of the first branch circuit, the control end of the second branch circuit and the control end of the third branch circuit, and the control end of the first branch circuit and the control end of the second branch circuit are trigger nodes of the reference generating circuit;

the output end of the third branch circuit is the first output end of the reference generating circuit.

Optionally, in an embodiment of the present application, the reference generating circuit further includes a fourth branch and a fifth branch connected in parallel with each other;

the output end of the fourth branch circuit is a second output end of the reference generating circuit, the input end of the fourth branch circuit is connected with a voltage source, the control end of the fourth branch circuit is connected with the output end of the operational amplifier, and the output end of the fourth branch circuit is connected with the first current input end of the current comparator and used for inputting a first current signal to the current comparator;

the output end of the fifth branch circuit is a third output end of the reference generating circuit, the input end of the fifth branch circuit is connected with the voltage source, the control end of the fifth branch circuit is connected with the output end of the operational amplifier, and the output end of the fifth branch circuit is connected with a second current input end of the current comparator and used for inputting a second current signal to the current comparator.

Optionally, in an embodiment of the present application, the fourth branch includes a sixth fet;

a grid electrode of the sixth field effect transistor is a control end of the fourth branch, a source electrode of the sixth field effect transistor is an input end of the fourth branch, and a drain electrode of the sixth field effect transistor is an output end of the fourth branch;

the source electrode of the sixth field effect transistor is connected with the voltage source, the grid electrode of the sixth field effect transistor is connected with the output end of the operational amplifier, and the drain electrode of the sixth field effect transistor is connected with the first current input end of the current comparator.

Optionally, in an embodiment of the present application, the fifth branch includes a seventh fet;

a grid electrode of the seventh field effect transistor is a control end of the fifth branch, a source electrode of the seventh field effect transistor is an input end of the fifth branch, and a drain electrode of the seventh field effect transistor is an output end of the fifth branch;

the source electrode of the seventh field effect transistor is connected with the voltage source, the grid electrode of the seventh field effect transistor is connected with the output end of the operational amplifier, and the drain electrode of the seventh field effect transistor is connected with the second current input end of the current comparator.

Optionally, in an embodiment of the present application, the third branch includes an eighth fet and a third resistor;

the drain electrode of the eighth field effect transistor is the output end of the third branch circuit; the source electrode of the eighth field effect transistor is connected with a voltage source, the grid electrode of the eighth field effect transistor is connected with the output end of the operational amplifier, and the drain electrode of the eighth field effect transistor is connected with the first end of the third resistor; the second end of the third resistor is grounded.

Optionally, in an embodiment of the present application, the first branch includes a first bjt, a ninth fet, and a fourth resistor;

the grid electrode of the ninth field effect transistor is the control end of the first branch circuit, and the drain electrode of the ninth field effect transistor is the output end of the first branch circuit;

the source electrode of the ninth field-effect tube is connected with a voltage source, the grid electrode of the ninth field-effect tube is connected with the output end of the operational amplifier, and the drain electrode of the ninth field-effect tube is connected with the positive phase input end of the operational amplifier;

one end of the fourth resistor is connected with the drain electrode of the ninth field-effect tube, and the other end of the fourth resistor is grounded;

the emitter of the first bipolar junction transistor is connected with the drain of the ninth field effect transistor, and the base and the collector of the first bipolar junction transistor are grounded.

Optionally, in an embodiment of the present application, the second branch includes a second bjt, a tenth fet, a fifth resistor, and a sixth resistor;

the grid electrode of the tenth field effect transistor is the control end of the second branch circuit, and the drain electrode of the tenth field effect transistor is the output end of the second branch circuit;

the source electrode of the tenth field effect transistor is connected with a voltage source, the grid electrode of the tenth field effect transistor is connected with the output end of the operational amplifier, and the drain electrode of the tenth field effect transistor is connected with the inverting input end of the operational amplifier;

one end of the fifth resistor is connected with the drain electrode of the tenth field effect transistor, and the other end of the fifth resistor is connected with the emitting electrode of the second bipolar junction transistor;

one end of the sixth resistor is connected with the drain electrode of the tenth field effect transistor, and the other end of the sixth resistor is grounded;

the collector and base of the second bipolar junction transistor are both grounded.

Optionally, in an embodiment of the present application, the power-on reset circuit further includes a start circuit;

Optionally, in an embodiment of the present application, the start-up circuit includes an eleventh fet, a twelfth fet, and a thirteenth fet;

the grid electrode of the eleventh field effect transistor and the grid electrode of the twelfth field effect transistor are input ends of the starting circuit, and the drain electrode of the thirteenth field effect transistor is a first trigger node;

the source electrode of the eleventh field effect transistor is connected with a voltage source, the grid electrode of the eleventh field effect transistor is connected with the first output end of the reference generating circuit, and the drain electrode of the eleventh field effect transistor is respectively connected with the drain electrode of the twelfth field effect transistor and the grid electrode of the thirteenth field effect transistor;

the grid electrode of the twelfth field effect transistor is connected with the first output end of the reference generating circuit, and the source electrode of the twelfth field effect transistor is grounded;

the drain electrode of the thirteenth field effect transistor is connected with the second trigger node, and the source electrode of the thirteenth field effect transistor is grounded.

The power-on reset circuit provided by the embodiment of the application comprises a band gap reference circuit, a current comparator and a voltage comparison circuit, wherein the band gap reference circuit, the current comparator and the voltage comparison circuit are all powered by a voltage source, because a first signal output by the band gap reference circuit can control the current comparator to work, and the current comparator is powered by the voltage source, therefore, after the power voltage and the band gap reference circuit meet the requirements, the current comparator can work and output a second signal, the output second signal is utilized to control the voltage comparator to work and output a reset signal, the reset signal is prevented from being output when the band gap reference circuit is unstable, errors are caused, false triggering in the power-on process is reduced, and the power-on reliability is improved.

Drawings

Some specific embodiments of the present application will be described in detail hereinafter by way of illustration and not limitation with reference to the accompanying drawings. The same reference numbers in the drawings identify the same or similar elements or components. Those skilled in the art will appreciate that the drawings are not necessarily drawn to scale. In the drawings:

fig. 1 is a structural diagram of a power-on reset circuit according to an embodiment of the present disclosure;

fig. 2 is a structural diagram of a power-on reset circuit according to a second embodiment of the present application;

fig. 3 is a structural diagram of a current comparator according to a second embodiment of the present application;

fig. 4 is a structural diagram of another current comparator provided in the second embodiment of the present application;

fig. 5 is a structural diagram of a power-on reset circuit according to a third embodiment of the present application;

fig. 6 is a structural diagram of a voltage comparison circuit according to a third embodiment of the present application;

fig. 7 is a structural diagram of a power-on reset circuit according to a fourth embodiment of the present application;

fig. 8 is a structural diagram of a reference generating circuit according to a fourth embodiment of the present disclosure;

fig. 9 is a block diagram of another reference generating circuit according to the fourth embodiment of the present application;

FIG. 10 is a block diagram of another reference generating circuit according to the fourth embodiment of the present disclosure;

fig. 11 is a structural diagram of a starting circuit according to a fourth embodiment of the present application;

fig. 12 is a structural diagram of a power-on reset circuit according to a fifth embodiment of the present application;

fig. 13 is a schematic diagram illustrating a variation of a slow power-on signal according to a fifth embodiment of the present application;

fig. 14 is a schematic diagram of a fast power-on signal change according to a fifth embodiment of the present application.

Detailed Description

The embodiment of the present invention will be further described with reference to the accompanying drawings.

Example one

Fig. 1 shows a structure diagram of a power-on reset circuit provided in an embodiment of the present application, where fig. 1 is a diagram of a power-on reset circuit provided in an embodiment of the present application. The power-on reset circuit 10 provided in the embodiment of the present application includes: the band gap reference circuit 11, the current comparator 12 and the voltage comparison circuit 13 are all powered by voltage sources;

a first output end of the bandgap reference circuit 11 is connected to a control end of the current comparator 12, and is configured to input a first signal to the control end of the current comparator 12 to control the current comparator 12 to operate;

a first current input end and a second current input end of the current comparator 12 are respectively connected with a first current signal and a second current signal, and an output end of the current comparator 12 is connected with a control end of the voltage comparison circuit 13 and is used for inputting a second signal to the control end of the voltage comparison circuit 13 so as to control the voltage comparison circuit 13 to work;

a first input terminal of the voltage comparison circuit 13 is connected to a first output terminal of the bandgap reference circuit 11, a second input terminal of the voltage comparison circuit 13 is used for indicating a signal of voltage magnitude of the voltage source, and an output terminal of the voltage comparison circuit 13 is used for outputting a power-on reset signal (for short, a reset signal).

It should be noted that, alternatively, the voltage source may include a voltage conversion module in the chip, and the signal output by the voltage source may be a signal output by the voltage conversion module, which is only exemplified here. Because it takes a certain time for the electrical signal to flow through the elements in the chip during the power-on process of the chip, the voltage of the voltage source has a process of rising, and the chip can start to work only when the voltage of the voltage source rises to a stable state.

Optionally, the bandgap reference circuit 11 is configured to output a stable voltage, and generally, the bandgap reference circuit 11 includes two signals, where a voltage of the first signal is positively correlated with a temperature, and a voltage of the second signal is negatively correlated with the temperature, and the two signals are fused to obtain an output signal that is less affected by the temperature or not affected by the temperature, that is, the first signal output by the first output end of the bandgap reference circuit 11.

The bandgap reference circuit 11 outputs a first signal to the current comparator 12, the current comparator 12 starts to operate when the voltage of the first signal is greater than or equal to a first preset value and the power supply voltage is greater than or equal to a second preset value, and the output terminal of the current comparator 12 outputs a second signal to the control terminal of the voltage comparison circuit 13, where it should be noted that the second preset value is greater than or equal to the operating voltage of the current comparator 12. The voltage source may be directly connected to the current comparator 12 to supply power to the current comparator 12, or the voltage source may supply power to the current comparator 12 through the bandgap reference circuit 11. The comparison result of the current comparator 12 may be fixed, for example, if the control terminal of the voltage comparison circuit 13 starts to operate after receiving the low level signal, the current comparator 12 may output the low level signal fixedly, that is, the second signal is the low level signal; for another example, when the control terminal of the voltage comparing circuit 13 starts to operate after receiving the high level signal, the current comparator 12 may output the high level signal fixedly, that is, the second signal is the high level signal. Optionally, in an embodiment of the present application, a current of the first current signal is greater than a current of the second current signal, and the second signal is a high level signal.

After receiving the second signal, the control terminal of the voltage comparison circuit 13 starts to operate, and compares the first signal output by the bandgap reference circuit 11 with the signal for indicating the voltage magnitude of the voltage source, and when the signal for indicating the voltage magnitude of the voltage source is greater than the first signal output by the bandgap reference circuit 11, it indicates that the power supply voltage meets the requirement, and the voltage comparison circuit 13 outputs a reset signal. It should be noted that, when the signal indicating the voltage magnitude of the voltage source is greater than the first signal output by the bandgap reference circuit 11, the power voltage at this time may be greater than or equal to the second preset value.

Because the current comparator 12 outputs the second signal, the following two conditions need to be satisfied simultaneously: 1) the power supply voltage is greater than or equal to the second preset value, that is, the power supply voltage reaches a stable value, which enables the current comparator to work, 2) the first signal output by the bandgap reference circuit 11 to the current comparator 12 is greater than or equal to the first preset value, that is, the first signal output by the bandgap reference circuit 11 reaches a stable value, which controls the voltage output by the current comparator, and the second signal controls the voltage comparison circuit to work, therefore, when the voltage comparison circuit 13 starts to work, it must be satisfied that the power supply voltage is greater than or equal to the second preset value, and the first signal output by the bandgap reference circuit 11 is greater than or equal to the first preset value. After the two conditions are met and the operation is started, the voltage comparison circuit compares the signal for indicating the voltage of the voltage source with the first signal output by the band gap reference circuit 11 and outputs the reset signal, so that the premise that the reset signal is output is that the signal for indicating the voltage of the voltage source is large enough, the power voltage and the band gap reference circuit are ensured to reach the two conditions, the output of the reset signal when the band gap reference circuit 13 is unstable is avoided, errors are avoided, false triggering in the power-on process is reduced, and the power-on reliability is improved.

Further, the voltage comparison circuit may output the reset signal when the signal indicating the magnitude of the voltage source is greater than the voltage of the first signal. The voltage comparison circuit 13 starts to operate under the control of the current comparator 12 only when the power supply voltage is greater than or equal to the second threshold and the first signal output by the bandgap reference circuit is greater than or equal to the first threshold, and outputs the reset signal only when the signal for indicating the voltage magnitude of the voltage supply is greater than the voltage of the first signal output by the bandgap reference circuit 11, thereby avoiding outputting the reset signal when the bandgap reference circuit 11 is unstable, avoiding errors, reducing false triggering in the power-on process, and increasing the reliability of power-on.

Example two

In the second embodiment of the present application, based on the structure of the power-on reset circuit in the first embodiment, the structure of the current comparator 12 of the power-on reset circuit is further described exemplarily, and of course, this is merely an exemplary description, and does not represent that the present application is limited thereto. As shown in fig. 2, fig. 2 is a structural diagram of a power-on reset circuit according to a second embodiment of the present application. Optionally, in the present embodiment, the current comparator 12 includes a first switch 121 and a current mirror 122;

a first input end of the current mirror 122 is connected to a first current signal; a first terminal of the first switch 121 serves as a second current input terminal and an output terminal of the current comparator 12, a second terminal of the first switch 121 is connected to a second input terminal of the current mirror 122, and a control terminal of the first switch 121 serves as a control terminal of the current comparator 12 and is connected to the bandgap reference circuit.

The first input terminal of the current mirror 122 inputs the first current signal, and the current mirror 122 may copy the current, so that the second input terminal of the current mirror 122 also inputs the first current signal, and the first terminal of the first switch 121 inputs the second current signal, when the current of the first current signal is greater than the current of the second current signal, the first terminal of the first switch 121 is at a low level, and when the current of the first current signal is less than the current of the second current signal, the first terminal of the first switch 121 is at a high level. It should be noted that, in one implementation, the first input terminal of the current mirror 122 may be a first current input terminal of the current comparator 12; in another implementation, the first input terminal of the current mirror 122 is not the first current input terminal of the current comparator 12, and the first input terminal of the current mirror 122 may be connected to the first current signal through the first current input terminal of the current comparator 12.

It should be noted that the first switch 121 and the current mirror 122 may have various forms, and two examples are listed here to describe the first switch 121 and the current mirror 122 in detail.

Optionally, based on the power-on reset circuit shown in fig. 2, in a first example, the first switch 121 is further described, as shown in fig. 3, fig. 3 is a structural diagram of a current comparator 12 according to a second embodiment of the present application, where the first switch 121 includes a first field-effect transistor 1211;

the drain of the first field effect transistor 1211 is a first terminal of the first switch 121, the source of the first field effect transistor 1211 is a second terminal of the first switch 121, and the gate of the first field effect transistor 1211 is a control terminal of the first switch 121; the drain of the first field effect transistor 1211 is connected to the second current signal, the source of the first field effect transistor 1211 is connected to the second input terminal of the current mirror 122, and the gate of the first field effect transistor 1211 is connected to the first output terminal of the bandgap reference circuit 11.

The first field effect transistor 1211 may be an N-type field effect transistor, the first field effect transistor 1211 may be turned on when the gate of the first field effect transistor 1211 is at a high level, the current comparator 12 may output a signal, and the first field effect transistor 1211 may be turned off when the gate of the first field effect transistor 1211 is at a low level, and the current comparator 12 does not output a signal. The gate of the first field effect transistor 1211 is connected to the first output terminal of the bandgap reference circuit 11, so that the current comparator 12 operates when the voltage of the first signal output from the first output terminal of the bandgap reference circuit 11 is at a high level (i.e. the voltage of the first signal is greater than the first preset value). This enables more efficient control of the operation of the current comparator 12.

Optionally, based on the power-on reset circuit shown in fig. 2, in a second example, the current mirror 122 is further described, as shown in fig. 3, the current mirror 122 includes a third field-effect transistor 1221 and a fourth field-effect transistor 1222; the drain of the third fet 1221 is the first input terminal of the current mirror 122, and the drain of the fourth fet 1222 is the second input terminal of the current mirror 122; the drain of the third fet 1221 is connected to the gate, and the gate of the third fet 1221 is connected to the gate of the fourth fet 1222.

Fig. 3 shows not only the first fet 1211, but also the third fet 1221 and the fourth fet 1222, which does not mean that the first fet 1211, the third fet 1221 and the fourth fet 1222 must be present at the same time, and the current mirror 122 may also have other designs, and fig. 3 shows the structure of the current comparator 12 by way of example only, and does not mean that the present application is limited thereto.

Based on the current comparator 12 shown in fig. 2, optionally, in an embodiment of the present application, as shown in fig. 4, fig. 4 is a structural diagram of another current comparator 12 provided in the second embodiment of the present application, where the current comparator 12 further includes a voltage limiting element 123;

the first end of the voltage limiting element 123 is a first current input end of the current comparator 12, the second end of the voltage limiting element 123 is connected with the first input end of the current mirror 122, and the first input end of the current mirror 122 is connected to the first current signal through the voltage limiting element 123.

Alternatively, in an embodiment of the present application, as shown in fig. 4, the voltage limiting element 123 includes a second field effect transistor 1231; the source of the second field effect transistor 1231 is the first end of the voltage limiting element 123, and the drain of the second field effect transistor 1231 is the second end of the voltage limiting element 123; the source of the second fet 1231 is connected to the first current signal, the drain of the second fet 1231 is connected to the first input terminal of the current mirror 122, and the gate of the second fet 1231 is connected to the drain of the second fet 1231.

It should be noted that, in one implementation, the first current signal and the second current signal may be from a separate current source, and in another implementation, the first current signal and the second current signal may be from the bandgap reference circuit 11, which is only exemplary and not meant to limit the present application.

If the current comparator 12 needs to work normally, the voltages at both ends of all the components on each branch must be greater than or equal to the driving voltage, and the voltage comparison circuit 12 is driven under the voltage provided by the voltage source, therefore, the power voltage must be large enough to drive all the components on each branch (each branch is in parallel connection and the voltages are the same), and the voltage limiting component 123 is added in the current comparator 12, so that the power voltage not only needs to drive all the components on each branch in the original circuit, but also needs to drive the voltage limiting component 123, compared with the original circuit, the power voltage must be larger to enable the current comparator 12 to work, which is equivalent to improving the second preset value, and ensuring that the current comparator 12 works under the condition of larger and more stable power voltage, and further improving the power-on reliability.

EXAMPLE III

In the third embodiment of the present application, based on the structure of the power-on reset circuit in the first embodiment, the structure of the voltage comparison circuit 13 of the power-on reset circuit is further described exemplarily, and of course, this is only an exemplary description, and does not represent that the present application is limited thereto. As shown in fig. 5, fig. 5 is a structural diagram of a power-on reset circuit provided in a third embodiment of the present application. Optionally, the voltage comparison circuit 13 includes a voltage comparator 131 and a voltage division control branch 132; the input end of the voltage division control branch 132 is a second input end of the voltage comparison circuit 13, the control end of the voltage division control branch 132 is a control end of the voltage comparison circuit, the control end of the voltage division control branch 132 is connected with the output end of the current comparator, the first output end of the voltage division control branch 132 is connected with the non-inverting input end of the voltage comparator 131, and the second output end of the voltage division control branch 132 is grounded; the inverting input terminal of the voltage comparator 131 is a first input terminal of the voltage comparison circuit, the output terminal of the voltage comparator 131 is an output terminal of the voltage comparison circuit, and the inverting input terminal of the voltage comparator 131 is connected with a first output terminal of the bandgap reference circuit.

The voltage division control branch 132 receives the second signal output by the current comparator 12 through the control terminal, and then the signal for indicating the voltage magnitude of the voltage source can be accessed, and the voltage comparison circuit 13 can start to operate. The signal indicating the magnitude of the voltage source is finally inputted to the non-inverting input terminal of the voltage comparator 131, but since the voltage division control branch 132 has a voltage division function, the signal inputted to the non-inverting input terminal of the voltage comparator 131 may be equal to or not equal to the voltage of the voltage source, and the magnitude of the signal inputted to the non-inverting input terminal of the voltage comparator 131 can be controlled by adjusting the voltage division element included in the voltage division control branch 132. Therefore, the voltage threshold of the voltage source outputting the reset signal can be adjusted by adjusting the voltage dividing element. Illustratively, because of the voltage dividing function of the voltage dividing control branch 132, the ratio of the voltage source to the voltage of the signal input to the positive input terminal of the voltage comparator 131 is k, k is an integer greater than or equal to 1, the voltage of the positive input terminal of the voltage comparator 131 is greater than the voltage of the first signal input to the negative input terminal, the voltage comparator 131 outputs the reset signal, that is, the voltage of the voltage source is greater than k times the voltage of the first signal, by adjusting the voltage dividing element, k is greater, the voltage of the voltage source reaches a greater voltage value and the reset signal can be output, and if k is smaller by adjusting the voltage dividing element, the voltage of the voltage source reaches a smaller voltage value and the reset signal can be output, so that the threshold of the voltage source can be adjusted more flexibly.

Optionally, in this embodiment, as shown in fig. 5, the voltage division control branch 132 includes a second switch 1321, a first resistor 1322, and a second resistor 1323;

a first end of the second switch 1321 is an input end of the voltage division control branch 132 (i.e., a second input end of the voltage comparison circuit 13), and a control end of the second switch 1321 is a control end of the voltage division control branch 132 (i.e., a control end of the voltage comparison circuit 13);

a first terminal of the second switch 1321 is connected to the voltage source, and a second terminal of the second switch 1321 is connected to a first terminal of the first resistor 1322;

a second end of the first resistor 1322 is a first output end of the voltage division control branch 132, the second end of the first resistor 1322 is connected to a first end of the second resistor 1323, and a second end of the first resistor 1322 is connected to a positive phase input end of the voltage comparator 131; the second terminal of the second resistor 1323 is the second output terminal of the voltage division control branch 132, and the second terminal of the second resistor 1323 is grounded.

It should be noted that, in fig. 5, the voltage dividing elements are the first resistor 1322 and the second resistor 1323, which is only an example and does not represent that the application is limited thereto, and other elements for dividing voltage are also possible. The inverting input terminal of the voltage comparator 131 is connected to the first output terminal of the bandgap reference circuit 11, that is, the inverting input terminal of the voltage comparator 131 inputs the first signal V output by the bandgap reference circuit 11_BGThe positive input terminal of the voltage comparator 131 is connected to a middle point between the first resistor 1322 and the second resistor 1323, i.e., the second terminal of the first resistor 1322, the first terminal of the second resistor 1323, and a signal from the power voltage, which is input to the positive input terminal of the voltage comparator 131, is influenced by the resistances of the first resistor 1322 and the second resistor 1323, and exemplarily, the voltage value V of the signal input to the positive input terminal of the voltage comparator 131_DETECTCan be expressed by formula one, which is as follows:

V_DETECT＝V_DD×R₂/(R₁+R₂) (ii) a Formula one

Wherein, V_DDRepresenting the supply voltage, R₁Represents the resistance value, R, of the first resistor 1322₂Representing the resistance value of the second resistor 1323. The voltage comparator 131 outputs a reset signal if the voltage value of the signal input to the non-inverting input terminal of the voltage comparator 131 is greater than the voltage value of the first signal.

According to the formula one, the threshold voltage V of the voltage comparator 131 outputting the reset signal can be obtained_THThat is, the voltage at which the voltage of the signal input to the non-inverting input terminal is equal to the voltage of the first signal can be expressed by the following equation two:

V_TH＝V_BG×(R₁+R₂)/R₂(ii) a Formula two

Wherein, V_BGRepresenting the voltage of the first signal. Of course,this is merely an example and does not represent a limitation of the present application.

Optionally, based on the power-on reset circuit shown in fig. 5, an enabling signal of the voltage comparator 131 is described, as shown in fig. 6, fig. 6 is a structural diagram of a voltage comparison circuit 13 provided in a third embodiment of the present application, and in an embodiment of the present application, the voltage comparison circuit 13 further includes an inverter 133;

an input terminal of the inverter is connected to the output terminal of the current comparator 12, and an output terminal of the inverter is connected to the enable terminal of the voltage comparator 131, for inputting an enable signal to the enable terminal of the voltage comparator 131.

If the second signal output by the current comparator 12 is low level, the inverter outputs the enable signal of high level after passing through the inverter, so that the voltage comparator 131 can operate, and conversely, if the signal output by the current comparator 12 is high level, the inverter outputs low level after passing through the inverter, so that the voltage comparator 131 does not operate.

Optionally, in an embodiment of the present application, as shown in fig. 6, the second switch 1321 includes a fifth fet 13211;

the gate of the fifth fet 13211 is the control terminal of the second switch 1321, the source of the fifth fet 13211 is the first terminal of the second switch 1321, and the drain of the fifth fet 13211 is the second terminal of the second switch 1321;

the gate of the fifth fet 13211 is connected to the output terminal of the current comparator 12, the source of the fifth fet 13211 is connected to the voltage source, and the drain of the fifth fet 13211 is connected to the first terminal of the first resistor 1322.

It should be noted that the fifth fet 13211 may be a P-type fet, a gate of the fifth fet 13211 is connected to the second signal output by the current comparator 12, if the second signal is low level, the fifth fet 13211 is turned on, and if the second signal is high level, the fifth fet 13211 is turned off.

Although fig. 6 shows the inverter and the fifth fet 13211, this does not mean that the inverter and the fifth fet 13211 must exist at the same time, and fig. 6 shows the structure of the voltage comparison circuit 13 by way of example. Taking the voltage comparison circuit 13 shown in fig. 6 as an example, if the current is lower than the second signal output by the comparator, the fifth fet is turned on, the inverter outputs a high-level enable signal, the voltage comparator 131 operates normally, and two-point control is realized by using one second signal, so that the control effect is better.

Example four

In an embodiment of the present application, based on the structure of the power-on reset circuit in the first embodiment, the structure of the bandgap reference circuit of the power-on reset circuit is further described by way of example, and of course, this is only an example and does not represent that the present application is limited thereto. Optionally, in the fourth embodiment of the present application, the voltage source may supply power to the current comparator 12 through the bandgap reference circuit 11, the first current signal and the second current signal are from the bandgap reference circuit 11, and the second output terminal of the bandgap reference circuit 11 is connected to the first current input terminal of the current comparator 12, and is configured to input the first current signal to the current comparator 12; a third output terminal of the bandgap reference circuit 11 is connected to a second current input terminal of the current comparator 12, and is configured to input a second current signal to the current comparator 12. As shown in fig. 7, fig. 7 is a structural diagram of a power-on reset circuit according to a fourth embodiment of the present application. The bandgap reference circuit 11 includes a reference generating circuit 111 and a start-up circuit 112;

the first output end of the reference generating circuit 111 is the first output end of the bandgap reference circuit 11, the second output end of the reference generating circuit 111 is the second output end of the bandgap reference circuit 11, and the third output end of the reference generating circuit 111 is the third output end of the bandgap reference circuit 11; the input terminal of the start-up circuit 112 is connected to the first output terminal of the reference generating circuit 111, and the first trigger node of the start-up circuit is connected to the second trigger node of the reference generating circuit 111, for inputting a trigger signal to the second trigger node of the reference generating circuit 111 to trigger the reference generating circuit 111 to operate.

The structures of the reference generation circuit 111 and the start-up circuit 112 are described in detail herein, respectively, taking two application scenarios.

In a first application scenario, the structure of the reference generating circuit 111 is explained with reference to fig. 8 to 10:

alternatively, as shown in fig. 8, fig. 8 is a structural diagram of a reference generating circuit 111 according to a fourth embodiment of the present application. In the present embodiment, the reference generating circuit 111 includes an operational amplifier 1111, and a first branch 1112, a second branch 1113, and a third branch 1114 connected in parallel to each other;

the first branch 1112, the second branch 1113 and the third branch 1114 are all connected with a voltage source;

an output end of the first branch 1112 and an output end of the second branch 1113 are respectively connected with an inverting input end and a positive input end of the operational amplifier 1111, and the temperature dependency of the voltage of the output end of the first branch 1112 is different from the temperature dependency of the voltage of the output end of the second branch 1113;

the output end of the operational amplifier 1111 is connected to the control end of the first branch 1112, the control end of the second branch 1113, and the control end of the third branch 1114, and the control end of the first branch 1112 and the control end of the second branch 1113 are trigger nodes of the reference generating circuit 111;

the output terminal of the third branch 1114 is the first output terminal of the reference generating circuit 111.

The temperature dependence of the voltage at the output of the first branch 1112 is different from the temperature dependence of the voltage at the output of the second branch 1113, for example, the temperature dependence of the voltage at the output of the first branch 1112 is positive, and the temperature dependence of the voltage at the output of the second branch 1113 is negative; or, the voltage of the output end of the first branch 1112 is negatively correlated with the temperature, the voltage of the output end of the second branch 1113 is positively correlated with the temperature, and the signal output by the first branch 1112 and the signal output by the second branch 1113 pass through the operational amplifier 1111, so that the influence of the temperature is reduced, and the voltage of the first signal output by the third branch 1114 is less influenced by the temperature or is not influenced by the temperature.

Further alternatively, in an embodiment of the present application, the reference generating circuit 111 may output the first current signal and the second current signal to the current comparator 12, as shown in fig. 9, fig. 9 is a structural diagram of another reference generating circuit 111 provided in the fourth embodiment of the present application, and the reference generating circuit 111 further includes a fourth branch 1115 and a fifth branch 1116 connected in parallel with each other;

the output end of the fourth branch 1115 is a second output end of the reference generating circuit 111, the input end of the fourth branch 1115 is connected with a voltage source, the control end of the fourth branch 1115 is connected with the output end of the operational amplifier 1111, and the output end of the fourth branch 1115 is connected with a first current input end of the current comparator 12 and is used for inputting a first current signal to the current comparator 12;

the output terminal of the fifth branch 1116 is a third output terminal of the reference generating circuit 111, the input terminal of the fifth branch 1116 is connected to the voltage source, the control terminal of the fifth branch 1116 is connected to the output terminal of the operational amplifier 1111, and the output terminal of the fifth branch 1116 is connected to the second current input terminal of the current comparator 12, so as to input the second current signal to the current comparator 12.

Optionally, in an embodiment of the present application, as shown in fig. 9, the fourth branch 1115 includes a sixth fet 11151;

the gate of the sixth field effect transistor 11151 is the control end of the fourth branch 1115, the source of the sixth field effect transistor 11151 is the input end of the fourth branch 1115, and the drain of the sixth field effect transistor 11151 is the output end of the fourth branch 1115;

the source of the sixth fet 11151 is connected to the voltage source, the gate of the sixth fet 11151 is connected to the output of the operational amplifier 1111, and the drain of the sixth fet 11151 is connected to the first current input of the current comparator 12.

Alternatively, in one embodiment of the present application, as shown in fig. 9, the fifth branch 1116 includes a seventh fet 11161;

the gate of the seventh fet 11161 is the control end of the fifth branch 1116, the source of the seventh fet 11161 is the input end of the fifth branch 1116, and the drain of the seventh fet 11161 is the output end of the fifth branch 1116;

the source of the seventh fet 11161 is connected to the voltage source, the gate of the seventh fet 11161 is connected to the output of the operational amplifier 1111, and the drain of the seventh fet 11161 is connected to the second current input of the current comparator 12.

It should be noted that the signal output by the first branch 1112 and the signal output by the second branch 1113 are processed by the operational amplifier 1111 to output a control signal, the control signal may satisfy the conduction condition of the fifth fet 11151 and the sixth fet 11151, the fifth fet 11151 and the sixth fet 11151 may be P-type fets, and the control signal output by the operational amplifier 1111 may be a low-level signal, but the control signal is not a signal of 0 potential but a signal smaller than the threshold voltage of the P-type fets, which is only exemplary and not meant to limit the present application.

Alternatively, based on the reference generating circuit shown in fig. 8, fig. 10 is a structural diagram of another reference generating circuit 111 provided in the fourth embodiment of the present application, and the structures of the first branch 1112, the second branch 1113, and the third branch 1114 of the reference generating circuit 111 are described by taking fig. 10 as an example.

Alternatively, in the first example, as shown in fig. 10, the structure of the third branch 1114 is explained, and the third branch 1114 includes an eighth fet 11141 and a third resistor 11142;

the drain of the eighth fet 11141 is the output of the third branch 1114; the source of the eighth field-effect tube 11141 is connected with a voltage source, the gate of the eighth field-effect tube 11141 is connected with the output end of the operational amplifier 1111, and the drain of the eighth field-effect tube 11141 is connected with the first end of the third resistor 11142; the second terminal of the third resistor 11142 is connected to ground.

The eighth fet 11141 may be a pfet, and when the control signal output by the operational amplifier 1111 is low, the eighth fet 11141 is turned on, and the drain of the eighth fet 11141 outputs the second signal.

Alternatively, in a second example, as shown in fig. 10, describing the structure of the first branch 1112, the first branch 1112 includes a first bjt 11121, a ninth fet 11122, and a fourth resistor 11123;

the gate of the ninth fet 11122 is the control end of the first branch 1112, and the drain of the ninth fet 11122 is the output end of the first branch 1112;

the source electrode of the ninth field-effect tube 11122 is connected with a voltage source, the gate electrode of the ninth field-effect tube 11122 is connected with the output end of the operational amplifier 1111, and the drain electrode of the ninth field-effect tube 11122 is connected with the non-inverting input end of the operational amplifier 1111;

one end of the fourth resistor 11123 is connected to the drain of the ninth fet 11122, and the other end is grounded;

the emitter of the first bjt 11121 is connected to the drain of the ninth fet 11122, and the base and collector of the first bjt 11121 are both grounded.

It should be noted that the ninth fet 11122 may be a pfet, and the voltage at the output terminal of the first branch 1112 (i.e., the voltage at the drain of the ninth fet 11122) is inversely related to the temperature.

Alternatively, in a third example, as shown in fig. 10, the structure of the second branch 1113 is described, and the second branch 1113 includes a second bjt 11131, a tenth fet 11132, a fifth resistor 11133, and a sixth resistor 11134;

the gate of the tenth fet 11132 is the control terminal of the second branch 1113, and the drain of the tenth fet 11132 is the output terminal of the second branch 1113;

the source of the tenth field effect transistor 11132 is connected to the voltage source, the gate of the tenth field effect transistor 11132 is connected to the output of the operational amplifier 1111, and the drain of the tenth field effect transistor 11132 is connected to the inverting input of the operational amplifier 1111;

one end of the fifth resistor 11133 is connected to the drain of the tenth fet 11132, and the other end is connected to the emitter of the second bjt 11131;

one end of the sixth resistor 11134 is connected to the drain of the tenth fet 11132, and the other end is grounded;

the collector and base of the second bipolar junction transistor 11131 are both grounded.

It should be noted that the tenth fet 11132 may be a pfet, and the voltage at the output terminal of the second branch 1113 (i.e., the voltage at the drain of the tenth fet 11132) is inversely related to the temperature.

With reference to the above three examples, it should be noted that fig. 10 shows a specific structure of each branch, which does not represent that the embodiment of the present application is limited thereto, and the structure of the reference generating circuit 111 may also be in other forms, which is not limited by the present application. Taking the reference generating circuit 111 shown in fig. 10 as an example, the eighth fet 11141, the ninth fet 11122 and the tenth fet 11132 form a current mirror 122, the current flowing through the eighth fet 11141 is replicated according to the structure of the current mirror 122, and similarly, in combination with fig. 9 and 10, the sixth fet 11151 and the seventh fet 11161 and the eighth fet 11141, the ninth fet 11122 and the tenth fet 11132 also form the current mirror 122, and the current flowing through the sixth fet 11151 and the seventh fet 11161 is replicated according to the current mirror 122, which is only exemplary and not intended to limit the present application.

In a second application scenario, referring to fig. 11, a structure of the starting circuit 112 is described, optionally, in an embodiment of the present application, as shown in fig. 11, fig. 11 is a structural diagram of a starting circuit provided in a fourth embodiment of the present application, where the starting circuit 112 includes an eleventh field-effect transistor 1121, a twelfth field-effect transistor 1122, and a thirteenth field-effect transistor 1123;

the source electrode of the eleventh field effect transistor is connected with a voltage source, the grid electrode of the eleventh field effect transistor is connected with the first output end of the reference generating circuit 111, and the drain electrode of the eleventh field effect transistor is respectively connected with the drain electrode of the twelfth field effect transistor and the grid electrode of the thirteenth field effect transistor;

the grid electrode of the twelfth field effect transistor is connected with the first output end of the reference generating circuit 111, and the source electrode of the twelfth field effect transistor is grounded;

It should be noted that the eleventh fet may be a P-type fet, and the twelfth fet and the thirteenth fet may be N-type fets, because the input terminal of the start-up circuit is connected to the first output terminal of the reference generating circuit 111, and therefore, the first signal output by the first output terminal of the reference generating circuit 111 may control the state of the start-up circuit. As shown in fig. 11, when the first signal is at a low level, the gates of the eleventh field effect transistor and the thirteenth field effect transistor are both at a low level, the eleventh field effect transistor is turned on, the thirteenth field effect transistor is turned off, at this time, the drain of the eleventh field effect transistor is at a high level, the gate of the twelfth field effect transistor is at a high level, the first trigger node (the gate of the twelfth field effect transistor) is at a high level, the twelfth field effect transistor is turned on, and the voltage of the second trigger node is pulled to a low level, so that the reference generating circuit 111 operates. When the second signal is at a high level, the gates of the eleventh field effect transistor and the thirteenth field effect transistor are both at a high level, the eleventh field effect transistor is turned off, the thirteenth field effect transistor is turned on, at this time, the first trigger node (the gate of the twelfth field effect transistor) is at a low level, and the start-up circuit does not output a trigger signal to the reference generation circuit 111 any more. With reference to the reference generating circuit 111 shown in fig. 9, the second trigger node may be an output terminal of the operational amplifier 1111, the trigger signal may be a low level signal, when the first trigger node is at a high level, the voltage of the second trigger node is pulled to a low level, so that the eighth fet 11141, the ninth fet 11132 are turned on, and the sixth fet 11151 and the seventh fet 11161 are turned on, at this time, the reference generating circuit 111 starts to operate, the first output terminal of the reference generating circuit 111 outputs a first signal, and the first signal is at a high level, so that after the reference generating circuit 111 starts to operate, the first trigger node (the gate of the twelfth fet) becomes a low level, the twelfth fet is turned off, and the reference generating circuit 111 depends on the control signal output from the output terminal of the operational amplifier 1111 to cause the eighth fet 11141, the ninth fet 11132 to be turned on, The tenth fet 11132, and the sixth fet 11151 and the seventh fet 11161 are kept on.

With reference to the reference generating circuit shown in fig. 10, because the first branch, the second branch and the third branch are connected in parallel, voltages at two ends of the reference generating circuit can ensure that each branch can operate, and therefore, voltages at two ends of the bandgap reference circuit are greater than or equal to driving voltages of the tenth fet, the fifth resistor and the second bjt, and can operate normally.

EXAMPLE five

Based on the power-on reset circuit and the specific structures of the circuits in the power-on reset circuit described in the first to fourth embodiments, the fifth embodiment of the present application provides a power-on reset circuit, which will be described in more detail₁Denotes a first field effect transistor, M₂Representing a second fet 1231, and so on, M₁₃It is to be noted that, in the fifth embodiment of the present application, the names of the respective elements are the same as those of the first to fifth embodiments, and as shown in fig. 12, the power-on reset circuit includes a reference generation circuit 111, a current comparator 12, a voltage comparison circuit 13, and a start-up circuit 112.

Wherein the current comparator 12 comprises a first field effect transistor M₁Second field effect transistor M₂Third field effect transistor M₃Fourth field effect transistor M₄Wherein M is₂、M₃And M₄Grid of at node net₂Is connected, and M₃The gate and the drain of (1) are connected;

the voltage comparison circuit 13 comprises a voltage comparator 131 and a fifth field effect transistor M₅A first resistor 1322, a second resistor 1323, and an inverter 133;

the reference generating circuit 111 includes sixth to tenth field effect transistors, i.e., M₆～M₁₀Further comprises an operational amplifier 1111, a third resistor 11142, a fourth resistor 11123, a fifth resistor 11133, a sixth resistor 11134, a first BJT 11121, and a second BJT crystalA tube 11131;

the starting circuit 112 includes an eleventh fet M₁₁Twelfth field effect transistor M₁₂And a thirteenth field effect transistor M₁₃；

The connection relationship between the elements is described in detail in the first to fifth embodiments, and is not described herein again.

Here, based on the power-on reset circuit shown in fig. 12, two power-on processes of power-on fast and power-on slow will be described in detail.

Alternatively, when the power supply is powered on slowly, i.e., the supply voltage settling time is greater than the settling time of the bandgap reference circuit, e.g., supply voltage V_DDPower-up takes 1ms and band-gap reference circuit set-up takes 100 us. Supply voltage V_DDWhen the voltage rises slowly from 0, because the band-gap reference circuit does not work yet, at the moment, the voltage V output by the first output end of the band-gap reference circuit_BGIs a low level signal, and therefore, in the start-up circuit of the bandgap reference circuit, M₁₁First turned on, so that M₁₁Of the drain electrode net₁The voltage at the node flips to a high level that rises with the supply voltage. When net₁The voltage of the node being dependent on the supply voltage V_DDRises to more than M₁₃At threshold voltage of, M₁₃Conduction, V_BPThe voltage (i.e., the voltage of the second trigger node) is pulled down to a low level, resulting in M₉And M₁₀And conducting and starting the band-gap reference circuit. Because the time for establishing the band gap reference circuit is faster than the power-on time of the power supply voltage in the slow power-on process, when the band gap reference circuit is established, the voltage V of the first signal output by the band gap reference circuit is output_BGWhen the voltage of the power supply is larger than the first preset value, the power supply voltage is not electrified, and at the moment, the voltage of the power supply does not reach the voltage which enables the current comparator to work, so that the current comparator does not work, and M is larger than the first preset value₇Of the drain electrode net₃Is at a high level that rises with the supply voltage, which causes M to rise₅Cut-off, positive phase input net of voltage comparator 131₅Is at a low potential. Enable terminal net of voltage comparator 131₄At a low potential, the voltage comparator does not operateVoltage V output from the voltage comparator_OUTIs 0.

When the power supply voltage rises to be greater than or equal to M₂Threshold voltage of, M₃Threshold voltage of and M₆When the voltage across the current comparator is higher than or equal to the operating voltage (i.e. the power supply voltage is higher than or equal to the second predetermined value), V is determined_BGHas already stably output a high level, M₁On, the current comparator works, so that net₃Flip to low level, thereby causing M to₅Conduction, net₅Flipping to a high level that follows the rise of the supply voltage. Net₄The voltage comparator starts to operate when it is turned over to a high level following the rise of the supply voltage, but because of the net at the non-inverting input of the voltage comparator₅Is less than the voltage V of the inverting input terminal of the voltage comparator_BGThus the voltage V output by the voltage comparator_OUTStill 0.

When the supply voltage continues to rise so that net₅Voltage of greater than V_BGWhen the power supply voltage V is greater than the voltage at the positive input end of the voltage comparator_DDIs equal to the threshold voltage V of the reset signal output by the voltage comparator 131_THThreshold voltage V_THThe calculation can refer to the second formula in the third embodiment, which is not repeated here, and the output voltage V of the voltage comparator_OUTFlipping to a high level following the rise of the supply voltage, a reset signal is generated. The process is shown in fig. 13.

Alternatively, when the power supply is powered up quickly, i.e., the power supply voltage settling time is less than the settling time of the bandgap reference, e.g., V_DDPower up for 10us and 100us is required for the bandgap reference circuit to build up. Supply voltage V_DDStarting from 0, M in starting circuit of band-gap reference₁₁First of all, make net₁Is inverted to a high level that rises with the supply voltage. When net₁Level of (a) with V_DDRises to more than M₃At threshold voltage of, M₃Conduction, V_BPThe voltage is pulled down to a low level and the bandgap reference starts to start. This is achieved byTime, net₃To follow the high level of the supply voltage rising together, so that M₅Cutoff, hence net₅Is at a low potential. Net₄At a low potential, the voltage comparator does not operate, and the output of the voltage comparator is 0.

Due to the supply voltage V_DDThe rising is fast, when the power supply voltage is already built, the band gap reference circuit is not yet built, and at the moment, the power supply voltage is already larger than M₂Threshold voltage of, M₃Threshold voltage of and M₆The sum of the overdrive voltages (it can also be said that the supply voltage rises to make the voltage across the current comparator greater than or equal to its operating voltage, i.e. the supply voltage is greater than or equal to a second preset value). However, V is a relatively long time to establish a bandgap reference_BGThe voltage rises slowly, so M₁Still not conducted, net₄At a low potential, the voltage comparator does not operate, but still outputs a 0.

When V is_BGGo up to let M₁At the beginning of conduction, i.e. the voltage V of the first signal output by the bandgap reference circuit_BGGreater than a first preset value, net₃Is turned to a low level so that M₅And conducting. Net₄The voltage comparator starts to operate when the voltage level is inverted to the high level. At this time, the positive phase input end net of the voltage comparator₅Already greater than V of the inverting input_BGTherefore, the voltage comparator immediately outputs a high level, generating a reset signal. The process is shown in fig. 14.

Thus, particular embodiments of the present subject matter have been described. Other embodiments are within the scope of the following claims. In some cases, the actions recited in the claims can be performed in a different order and still achieve desirable results. In addition, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some embodiments, multitasking and parallel processing may be advantageous.

It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.

The above description is only an example of the present application and is not intended to limit the present application. Various modifications and changes may occur to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.

Claims

1. A power-on-reset circuit, comprising: the band-gap reference circuit, the current comparator and the voltage comparison circuit are all powered by a voltage source;

the first output end of the bandgap reference circuit is connected with the control end of the current comparator and is used for inputting a first signal to the control end of the current comparator so as to control the current comparator to work, the bandgap reference circuit comprises a second output end and a third output end which are formed by a current mirror structure, and the second output end of the bandgap reference circuit is connected with the first current input end of the current comparator and is used for inputting the first current signal formed by the current mirror structure to the current comparator; a third output end of the band-gap reference circuit is connected with a second current input end of the current comparator and is used for inputting a second current signal formed by a current mirror structure to the current comparator;

a first current input end and a second current input end of the current comparator are respectively connected with the first current signal and the second current signal, an output end of the current comparator is connected with a control end of the voltage comparison circuit and is used for inputting a second signal to the control end of the voltage comparison circuit so as to control the voltage comparison circuit to work, and the voltage source supplies power to the current comparator through the band-gap reference circuit;

the first input end of the voltage comparison circuit is connected with the first output end of the band-gap reference circuit, the second input end of the voltage comparison circuit is connected with a signal used for indicating the voltage of the voltage source, and the output end of the voltage comparison circuit is used for outputting a power-on reset signal.

2. The power-on-reset circuit of claim 1, wherein the current comparator comprises a first switch and a current mirror;

a first input end of the current mirror is connected to the first current signal;

the first end of the first switch is the second current input end of the current comparator and the output end, the second end of the first switch is connected with the second input end of the current mirror, and the control end of the first switch is the control end of the current comparator.

3. The power-on-reset circuit of claim 2, wherein the first switch comprises a first field effect transistor;

the drain electrode of the first field effect transistor is a first end of the first switch, the source electrode of the first field effect transistor is a second end of the first switch, and the grid electrode of the first field effect transistor is a control end of the first switch;

the drain electrode of the first field effect transistor is connected to the second current signal, the source electrode of the first field effect transistor is connected with the second input end of the current mirror, and the grid electrode of the first field effect transistor is connected with the first output end of the band-gap reference circuit.

4. The power-on-reset circuit of claim 2, wherein the current comparator further comprises a voltage limiting element;

the first end of the voltage limiting element is a first current input end of the current comparator, the second end of the voltage limiting element is connected with the first input end of the current mirror, and the first input end of the current mirror is connected with the first current signal through the voltage limiting element.

5. The power-on-reset circuit of claim 4, wherein the voltage-limiting element comprises a second field-effect transistor;

6. The power-on-reset circuit of claim 2, wherein the current mirror comprises a third field effect transistor and a fourth field effect transistor;

7. The power-on-reset circuit of claim 1,

the current of the first current signal is larger than that of the second current signal, and the second signal is a high-level signal.

8. A power-on reset circuit according to any one of claims 1 to 7, wherein the voltage comparison circuit comprises a voltage division control branch and a voltage comparator;

the input end of the voltage division control branch circuit is a second input end of the voltage comparison circuit, the control end of the voltage division control branch circuit is a control end of the voltage comparison circuit, the control end of the voltage division control branch circuit is connected with the output end of the current comparator, the first output end of the voltage division control branch circuit is connected with the positive input end of the voltage comparator, and the second output end of the voltage division control branch circuit is grounded;

the voltage comparator comprises a voltage comparator, a band-gap reference circuit and a band-gap reference circuit, wherein the inverting input end of the voltage comparator is a first input end of the voltage comparison circuit, the output end of the voltage comparator is an output end of the voltage comparison circuit, and the inverting input end of the voltage comparator is connected with a first output end of the band-gap reference circuit.

9. The power-on reset circuit according to claim 8, wherein the voltage division control branch comprises a second switch, a first resistor and a second resistor;

the first end of the second switch is the input end of the voltage division control branch, and the control end of the second switch is the control end of the voltage division control branch;

a first end of the second switch is connected with the voltage source, and a second end of the second switch is connected with a first end of the first resistor;

10. The power-on-reset circuit of claim 9, wherein the second switch comprises a fifth field effect transistor;

a grid electrode of the fifth field effect transistor is a control end of the second switch, a source electrode of the fifth field effect transistor is a first end of the second switch, and a drain electrode of the fifth field effect transistor is a second end of the second switch;

11. The power-on-reset circuit of claim 8, wherein the voltage comparison circuit further comprises an inverter;

12. The power-on-reset circuit of claim 1, wherein the bandgap reference circuit comprises a start-up circuit and a reference generation circuit;

the input end of the starting circuit is connected with the first output end of the reference generating circuit, the first trigger node of the starting circuit is connected with the second trigger node of the reference generating circuit, and the starting circuit is used for inputting a trigger signal to the second trigger node of the reference generating circuit so as to trigger the reference generating circuit to work.

13. The power-on reset circuit according to claim 12, wherein the reference generating circuit comprises an operational amplifier, and a first branch, a second branch and a third branch connected in parallel with each other;

the output end of the first branch circuit and the output end of the second branch circuit are respectively connected with the inverting input end and the positive input end of the operational amplifier, and the temperature dependency of the voltage of the output end of the first branch circuit is different from the temperature dependency of the voltage of the output end of the second branch circuit;

the output end of the operational amplifier is respectively connected with the control end of the first branch, the control end of the second branch and the control end of the third branch, and the control end of the first branch and the control end of the second branch are trigger nodes of the reference generating circuit;

14. The power-on reset circuit according to claim 13, wherein the reference generating circuit further comprises a fourth branch and a fifth branch connected in parallel with each other and formed by a current mirror structure;

the output end of the fourth branch is a second output end of the reference generating circuit, the input end of the fourth branch is connected with the voltage source, the control end of the fourth branch is connected with the output end of the operational amplifier, and the output end of the fourth branch is connected with the first current input end of the current comparator and is used for inputting a first current signal to the current comparator;

the output end of the fifth branch is a third output end of the reference generating circuit, the input end of the fifth branch is connected with the voltage source, the control end of the fifth branch is connected with the output end of the operational amplifier, and the output end of the fifth branch is connected with a second current input end of the current comparator and used for inputting a second current signal to the current comparator.

15. The power-on-reset circuit of claim 14, wherein the fourth branch comprises a sixth fet;

16. The power-on-reset circuit of claim 14, wherein the fifth branch comprises a seventh fet;

17. The power-on-reset circuit of claim 13, wherein the third branch comprises an eighth fet and a third resistor;

the drain electrode of the eighth field effect transistor is the output end of the third branch circuit; the source electrode of the eighth field effect transistor is connected with the voltage source, the grid electrode of the eighth field effect transistor is connected with the output end of the operational amplifier, and the drain electrode of the eighth field effect transistor is connected with the first end of the third resistor; and the second end of the third resistor is grounded.

18. The power-on-reset circuit of claim 13, wherein the first branch comprises a first bipolar junction transistor, a ninth field effect transistor, and a fourth resistor;

the source electrode of the ninth field-effect tube is connected with the voltage source, the grid electrode of the ninth field-effect tube is connected with the output end of the operational amplifier, and the drain electrode of the ninth field-effect tube is connected with the positive phase input end of the operational amplifier;

and the emitter of the first bipolar junction transistor is connected with the drain of the ninth field effect transistor, and the base and the collector of the first bipolar junction transistor are grounded.

19. The power-on-reset circuit of claim 13, wherein the second branch comprises a second bjt, a tenth fet, a fifth resistor, and a sixth resistor;

a grid electrode of the tenth field effect transistor is a control end of the second branch circuit, and a drain electrode of the tenth field effect transistor is an output end of the second branch circuit;

a source electrode of the tenth field effect transistor is connected with the voltage source, a grid electrode of the tenth field effect transistor is connected with an output end of the operational amplifier, and a drain electrode of the tenth field effect transistor is connected with an inverting input end of the operational amplifier;

one end of the fifth resistor is connected with the drain electrode of the tenth field effect transistor, and the other end of the fifth resistor is connected with the emitter electrode of the second bipolar junction transistor;

the collector and the base of the second bipolar junction transistor are both grounded.

20. The power-on-reset circuit of claim 12, wherein the start-up circuit comprises an eleventh fet, a twelfth fet, and a thirteenth fet;

the grid electrode of the eleventh field effect transistor and the grid electrode of the twelfth field effect transistor are input ends of the starting circuit, and the drain electrode of the thirteenth field effect transistor is the first trigger node;

a source electrode of the eleventh field effect transistor is connected with the voltage source, a grid electrode of the eleventh field effect transistor is connected with a first output end of the reference generating circuit, and a drain electrode of the eleventh field effect transistor is respectively connected with a drain electrode of the twelfth field effect transistor and a grid electrode of the thirteenth field effect transistor;