CN214380687U - Direct-current voltage DC12V inverter circuit based on high-power PMOS (P-channel Metal oxide semiconductor) tube - Google Patents
Direct-current voltage DC12V inverter circuit based on high-power PMOS (P-channel Metal oxide semiconductor) tube Download PDFInfo
- Publication number
- CN214380687U CN214380687U CN202120513842.2U CN202120513842U CN214380687U CN 214380687 U CN214380687 U CN 214380687U CN 202120513842 U CN202120513842 U CN 202120513842U CN 214380687 U CN214380687 U CN 214380687U
- Authority
- CN
- China
- Prior art keywords
- pmos tube
- pmos pipe
- piezoresistor
- voltage
- transformer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Emergency Protection Circuit Devices (AREA)
Abstract
The utility model provides a direct current voltage DC12V inverter circuit based on high-power PMOS pipe, when inserting 12V direct current voltage at the input, the grid of PMOS pipe I and PMOS pipe II all obtains higher voltage, when PMOS pipe I switches on, the grid voltage of PMOS pipe II is drawn low, consequently PMOS pipe II ends, along with the increase of the electric current that switches on of PMOS pipe I, the transformer has the effect of hindering the electric current, make I grid voltage of PMOS pipe slowly drawn low, when I grid voltage of PMOS pipe is less than source voltage, PMOS pipe II switches on. When PMOS pipe II switches on, PMOS pipe I's grid voltage is pulled down, therefore PMOS pipe I ends, and along with PMOS pipe II's conduction current increase, the transformer has the effect of hindering the electric current, makes PMOS pipe II grid voltage slowly pulled down, and when PMOS pipe II grid voltage was less than source voltage, PMOS pipe I switched on. Therefore, the two PMOS tubes are mutually and alternately switched on and off, so that a constantly changing current signal is generated and is boosted into high-voltage alternating-current voltage through the transformer. The whole circuit is safe and reliable.
Description
Technical Field
The utility model relates to an inverter technical field, concretely relates to direct current voltage DC12V inverter circuit based on high-power PMOS pipe.
Background
At present, a lot of devices for inverting the direct-current voltage DC12V into the alternating-current voltage exist, but most of the devices are expensive and have overlarge volume, some inverting devices are not suitable for families, and some inverters have insufficient output power, so that the load cannot work normally. Therefore, a circuit device which is low in price and large in output power and can invert the direct-current voltage DC12V into alternating-current voltage is needed, and the circuit device not only can be suitable for common families to use, but also can output large power. If a power failure occurs in a household, the direct current DC12V storage battery can be used in the household.
Disclosure of Invention
The utility model discloses a overcome not enough of above technique, provide a direct current voltage DC12V inverter circuit based on high-power PMOS pipe.
The utility model overcomes the technical scheme that its technical problem adopted is:
a direct-current voltage DC12V inverter circuit based on a high-power PMOS tube comprises:
the first connecting end of the three-terminal ceramic gas discharge tube is connected to the anode of the 12V storage battery, the third connecting end of the three-terminal ceramic gas discharge tube is connected to the cathode of the 12V storage battery through a piezoresistor I, and the second connecting end of the three-terminal ceramic gas discharge tube is grounded through a piezoresistor II;
one end of a TVS transient suppression diode I and one end of a TVS transient suppression diode II are connected in series with each other, then one end of the TVS transient suppression diode I is connected to the anode of the 12V storage battery through a decoupling inductor I, the other end of the TVS transient suppression diode I is connected to the cathode of the 12V storage battery through a decoupling inductor II, a capacitor I and a capacitor II are connected in series with each other, then the TVS transient suppression diode I and the TVS transient suppression diode II are connected in parallel, one end of a TVS transient suppression diode III is respectively connected with the TVS transient suppression diode I and the TVS transient suppression diode II, and the other end of the TVS transient suppression diode III is respectively connected with the capacitor I, the capacitor II and the ground;
the drain electrode of the PMOS tube I is connected with one contact of the secondary side of the transformer;
the drain electrode of the PMOS tube II is connected to the other contact of the secondary side of the transformer and the grid electrode of the PMOS tube I respectively, the source electrode of the PMOS tube II and the source electrode of the PMOS tube I are connected to one end of a capacitor I and one end of a capacitor II which are connected in series with each other respectively, the other end of the capacitor I and the other end of the capacitor II which are connected in series with each other are connected to the secondary side of the transformer, and the grid electrode of the PMOS tube II is connected to the drain electrode and the source electrode of the PMOS tube I respectively;
the first connecting end of the two-end ceramic gas discharge tube is grounded, the second connecting end of the two-end ceramic gas discharge tube is respectively connected to one end of a piezoresistor IV and one end of a piezoresistor V, the other end of the piezoresistor IV is respectively connected to one primary contact of the transformer and one end of the piezoresistor III, and the other end of the piezoresistor V is respectively connected to the other primary contact of the transformer and the other end of the piezoresistor III.
Furthermore, the drain electrode of the PMOS tube II is connected with the grid electrode of the PMOS tube I through a resistor II.
Furthermore, the grid electrode of the PMOS tube II is respectively connected with the drain electrode of the PMOS tube I through a resistor III and connected with the source electrode of the PMOS tube I through a resistor IV.
Furthermore, the source electrode of the PMOS tube II is connected with the grid electrode of the PMOS tube I through a resistor I.
In order to play a role of protecting a circuit, a fuse I is arranged between the primary side of the transformer and the piezoresistor IV, and a fuse II is arranged between the primary side of the transformer and the piezoresistor V.
The utility model has the advantages that: when 12V direct current voltage is accessed to the input end, the grid electrodes of the PMOS tube I and the PMOS tube II are all higher in voltage, when the PMOS tube I is conducted, the grid electrode voltage of the PMOS tube II is pulled down, therefore, the PMOS tube II is cut off, the transformer has a blocking effect on the current along with the increase of the conducting current of the PMOS tube I, the grid electrode voltage of the PMOS tube I is slowly pulled down, and when the grid electrode voltage of the PMOS tube I is smaller than the source electrode voltage, the PMOS tube II is conducted. When PMOS pipe II switches on, PMOS pipe I's grid voltage is pulled down, therefore PMOS pipe I ends, and along with PMOS pipe II's conduction current increase, the transformer has the effect of hindering the electric current, makes PMOS pipe II grid voltage slowly pulled down, and when PMOS pipe II grid voltage was less than source voltage, PMOS pipe I switched on. Therefore, the two PMOS tubes are mutually and alternately switched on and off, so that a constantly changing current signal is generated and is boosted into high-voltage alternating-current voltage through the transformer. The whole circuit is safe and reliable.
Drawings
FIG. 1 is a circuit diagram of the present invention;
in the figure, 1, a PMOS tube I2, a PMOS tube II 3, a three-terminal ceramic gas discharge tube 4, a piezoresistor I5, a piezoresistor II 6, a decoupling inductor I7, a decoupling inductor II 8, a TVS transient suppression diode I9, a TVS transient suppression diode II 10, a TVS transient suppression diode III 11, a capacitor I12, a capacitor II 13, a resistor I14, a resistor II 15, a resistor III 16, a resistor IV 17, a transformer 18, a fuse I19, a piezoresistor III 20, a fuse II 21, a piezoresistor IV 22, a piezoresistor V23 and two-terminal ceramic gas discharge tubes.
Detailed Description
The present invention will be further explained with reference to fig. 1.
The first connecting end of the three-terminal ceramic gas discharge tube 3 is connected to the anode of the 12V storage battery, the third connecting end of the three-terminal ceramic gas discharge tube is connected to the cathode of the 12V storage battery through a piezoresistor I4, and the second connecting end of the three-terminal ceramic gas discharge tube is grounded through a piezoresistor II 5; one end of a TVS transient suppression diode I8 and one end of a TVS transient suppression diode II 9 are connected in series with each other, then one end of the TVS transient suppression diode I8 is connected to the positive electrode of a 12V storage battery through a decoupling inductor I6, the other end of the TVS transient suppression diode I8 is connected to the negative electrode of the 12V storage battery through a decoupling inductor II 7, a capacitor I11 and a capacitor II 12 are connected in series with each other, then the TVS transient suppression diode I8 and the TVS transient suppression diode II 9 are connected in parallel, one end of a TVS transient suppression diode III 10 is respectively connected with the TVS transient suppression diode I8 and the TVS transient suppression diode II 9, and the other end of the TVS transient suppression diode III 10 is respectively connected with the capacitor I11, the capacitor II 12 and the ground; a PMOS transistor I1, the drain of which is connected to a contact of the secondary side of the transformer 17; the drain electrode of the PMOS tube II 2 is connected to the other contact of the secondary side of the transformer 17 and the grid electrode of the PMOS tube I1 respectively, the source electrode of the PMOS tube II and the source electrode of the PMOS tube I1 are connected to one ends of a capacitor I11 and a capacitor II 12 which are mutually connected in series respectively, the other ends of the capacitor I11 and the capacitor II 12 which are mutually connected in series are connected to the secondary side of the transformer 17, and the grid electrode of the PMOS tube II 2 is connected to the drain electrode and the source electrode of the PMOS tube I1 respectively; the first connection end of the two-end ceramic gas discharge tube 23 is grounded, the second connection end of the two-end ceramic gas discharge tube is respectively connected to one end of the piezoresistor IV 21 and one end of the piezoresistor V22, the other end of the piezoresistor IV 21 is respectively connected to one primary contact of the transformer 17 and one end of the piezoresistor III 19, and the other end of the piezoresistor V22 is respectively connected to the other primary contact of the transformer 17 and the other end of the piezoresistor III 19. The PMOS tube has the advantages of high input impedance, good thermal stability, high voltage resistance, improved frequency characteristic, low noise, low power consumption, no secondary breakdown phenomenon and the like. When 12V direct current voltage is accessed to the input end, the grid electrodes of the PMOS tube I1 and the PMOS tube II 2 are all higher in voltage, when the PMOS tube I1 is conducted, the grid electrode voltage of the PMOS tube II 2 is pulled down, therefore, the PMOS tube II 2 is cut off, along with the increase of the conduction current of the PMOS tube I1, the transformer 17 has a blocking effect on the current, the grid electrode voltage of the PMOS tube I1 is slowly pulled down, and when the grid electrode voltage of the PMOS tube I1 is smaller than the source electrode voltage, the PMOS tube II 2 is conducted. When PMOS pipe II 2 switches on, PMOS pipe I1's grid voltage is pulled down, therefore PMOS pipe I1 ends, and along with PMOS pipe II 2's conduction current increase, transformer 17 has the effect of hindering the electric current, makes PMOS pipe II 2 grid voltage slowly pulled down, and when PMOS pipe II 2 grid voltage was less than source voltage, PMOS pipe I1 switched on. Therefore, the two PMOS transistors are alternately turned on and off to generate a constantly changing current signal, and the current signal is boosted to a high-voltage ac voltage through the transformer 17. When the inter-electrode electric field strength exceeds the breakdown strength of the gas, the two-terminal ceramic gas discharge tube 23 and the three-terminal ceramic gas discharge tube 3 cause a gap discharge as short-circuit protection devices, thereby limiting the inter-electrode voltage and protecting the entire anti-reverse connection circuit. The decoupling inductor I6 and the decoupling inductor II 7 mainly have the functions of preventing the current flowing through the inductors from jumping and preventing the current from passing quickly. The TVS transient suppression diode I8, the TVS transient suppression diode II 9 and the TVS transient suppression diode III 10 are voltage limiting protection devices, have similar functions to piezoresistors, and also clamp overvoltage to a lower voltage value by utilizing the nonlinear characteristics of the devices to realize the protection of a rear-stage circuit. The piezoresistor I4, the piezoresistor II 5, the piezoresistor IV 21 and the piezoresistor V22 play a role in circuit protection.
Furthermore, the drain electrode of the PMOS tube II 2 is connected with the grid electrode of the PMOS tube I1 through a resistor II 14. The resistor II 14 plays a role in current limiting.
Furthermore, the grid electrode of the PMOS tube II 2 is respectively connected with the drain electrode of the PMOS tube I1 through a resistor III 15 and connected with the source electrode of the PMOS tube I1 through a resistor IV 16. Resistor III 15 plays the role of current limiting.
Furthermore, the source electrode of the PMOS tube II 2 is connected with the grid electrode of the PMOS tube I1 through a resistor I13. The resistor I13 plays a role in limiting current.
Preferably, a fuse I18 is arranged between the primary side of the transformer 17 and the piezoresistor IV 21, and a fuse II 20 is arranged between the primary side of the transformer 17 and the piezoresistor V22. The fuse I18 and the fuse II 20 can play a role of protecting a circuit when the current is too large.
Claims (5)
1. A direct-current voltage DC12V inverter circuit based on a high-power PMOS tube is characterized by comprising:
the three-terminal ceramic gas discharge tube (3) is connected with the anode of the 12V storage battery through a first connecting end, connected with the cathode of the 12V storage battery through a piezoresistor I (4) through a third connecting end, and grounded through a piezoresistor II (5) through a second connecting end;
after being mutually connected in series, one end of a TVS transient suppression diode I (8) and a TVS transient suppression diode II (9) is connected to the anode of a 12V storage battery through a decoupling inductor I (6), the other end of the TVS transient suppression diode I (8) and the cathode of the 12V storage battery through a decoupling inductor II (7), a capacitor I (11) and a capacitor II (12) are mutually connected in series and then are connected in parallel with the TVS transient suppression diode I (8) and the TVS transient suppression diode II (9) which are mutually connected in series, one end of a TVS transient suppression diode III (10) is respectively connected with the TVS transient suppression diode I (8) and the TVS transient suppression diode II (9), and the other end of the TVS transient suppression diode III (10) is respectively connected with the capacitor I (11), the capacitor II (12) and the ground;
a PMOS transistor I (1) with a drain connected to one contact of the secondary side of the transformer (17);
the drain electrode of the PMOS tube II (2) is respectively connected with the other contact of the secondary side of the transformer (17) and the grid electrode of the PMOS tube I (1), the source electrode of the PMOS tube I (1) and the source electrode of the PMOS tube I (1) are respectively connected with one end of a capacitor I (11) and one end of a capacitor II (12) which are mutually connected in series, the other end of the capacitor I (11) and the other end of the capacitor II (12) which are mutually connected in series are connected with the secondary side of the transformer (17), and the grid electrode of the PMOS tube II (2) is respectively connected with the drain electrode and the source electrode of the PMOS tube I (1);
and a first connection end of the two-end ceramic gas discharge tube (23) is grounded, a second connection end of the two-end ceramic gas discharge tube is respectively connected to one end of a piezoresistor IV (21) and one end of a piezoresistor V (22), the other end of the piezoresistor IV (21) is respectively connected to one primary contact of the transformer (17) and one end of a piezoresistor III (19), and the other end of the piezoresistor V (22) is respectively connected to the other primary contact of the transformer (17) and the other end of the piezoresistor III (19).
2. The high-power PMOS tube-based DC12V inverter circuit according to claim 1, wherein: the drain electrode of the PMOS tube II (2) is connected with the grid electrode of the PMOS tube I (1) through a resistor II (14).
3. The high-power PMOS tube-based DC12V inverter circuit according to claim 1, wherein: and the grid electrode of the PMOS tube II (2) is respectively connected with the drain electrode of the PMOS tube I (1) through a resistor III (15) and connected with the source electrode of the PMOS tube I (1) through a resistor IV (16).
4. The high-power PMOS tube-based DC12V inverter circuit according to claim 1, wherein: and the source electrode of the PMOS tube II (2) is connected with the grid electrode of the PMOS tube I (1) through a resistor I (13).
5. The high-power PMOS tube-based DC12V inverter circuit according to claim 1, wherein: a fuse I (18) is arranged between the primary side of the transformer (17) and the piezoresistor IV (21), and a fuse II (20) is arranged between the primary side of the transformer (17) and the piezoresistor V (22).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120513842.2U CN214380687U (en) | 2021-03-11 | 2021-03-11 | Direct-current voltage DC12V inverter circuit based on high-power PMOS (P-channel Metal oxide semiconductor) tube |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120513842.2U CN214380687U (en) | 2021-03-11 | 2021-03-11 | Direct-current voltage DC12V inverter circuit based on high-power PMOS (P-channel Metal oxide semiconductor) tube |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN214380687U true CN214380687U (en) | 2021-10-08 |
Family
ID=77970786
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202120513842.2U Active CN214380687U (en) | 2021-03-11 | 2021-03-11 | Direct-current voltage DC12V inverter circuit based on high-power PMOS (P-channel Metal oxide semiconductor) tube |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN214380687U (en) |
-
2021
- 2021-03-11 CN CN202120513842.2U patent/CN214380687U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN203574534U (en) | Surge current suppressing circuit | |
| CN208589916U (en) | It is a kind of with overvoltage protection and it is anti-sparking function dc power interface circuit | |
| CN107947557A (en) | A kind of soft starting circuit of anti-over-pressed, under-voltage surge | |
| CN212969451U (en) | Three-level BOOST device | |
| CN214380687U (en) | Direct-current voltage DC12V inverter circuit based on high-power PMOS (P-channel Metal oxide semiconductor) tube | |
| CN2577503Y (en) | Over voltage protection device of single-phase bridge inverter for medium voltage frequency transformer | |
| CN214281258U (en) | Direct-current voltage DC12V inverter circuit based on high-power NMOS (N-channel metal oxide semiconductor) tube | |
| CN208904649U (en) | A kind of power supply overvoltage protection circuit of high pressure barricade | |
| CN209462252U (en) | One kind being applied to vehicle-mounted DC/DC converter hard switching lossless absorption circuit | |
| CN207625441U (en) | A kind of soft starting circuit of anti-over-pressed, under-voltage surge | |
| CN211530732U (en) | Power supply positive and negative polarity reverse connection preventing circuit adopting PMOS (P-channel metal oxide semiconductor) tube | |
| CN103326344B (en) | A kind of overvoltage limiting circuit | |
| CN109103865A (en) | A kind of power supply overvoltage protection circuit of high pressure barricade | |
| CN215267638U (en) | Surge voltage absorption circuit | |
| CN104578877A (en) | Single-stage boost inverter | |
| CN108802630A (en) | A kind of initiative alarming circuit of bus power source | |
| CN211859597U (en) | Peak current-limiting charging surge current suppression circuit | |
| CN209748190U (en) | Protection circuit and electronic equipment | |
| CN104113038A (en) | Protection circuit | |
| CN206650837U (en) | Playback equipment powers off noise reducing circuit and playback equipment | |
| CN211530744U (en) | Adopt NMOS pipe's anti-reverse connection circuit of positive and negative polarity of power | |
| CN201134792Y (en) | High-power MOS tube driving circuit | |
| CN205490120U (en) | Put short -circuit protection circuit based on two fortune | |
| CN218335747U (en) | Alternating current input rectification filter circuit | |
| CN204442194U (en) | A kind of single-stage boost inverter |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |