CN214278932U

CN214278932U - Multi-module TTL level serial port bus communication circuit

Info

Publication number: CN214278932U
Application number: CN202022648122.5U
Authority: CN
Inventors: 戴霄鹏; 赵澎涛; 陈登举
Original assignee: Hangzhou Tianmai Bio Technology Co ltd
Current assignee: Hangzhou Tianmai Bio Technology Co ltd
Priority date: 2020-11-16
Filing date: 2020-11-16
Publication date: 2021-09-24
Anticipated expiration: 2030-11-16

Abstract

The utility model discloses a TTL level serial ports bus communication circuit between multimode piece, include host computer module and follow the machine module, the host computer module includes main control chip and host computer serial ports drive circuit, follow the machine module including locating each from the singlechip in the machine module and follow machine serial ports drive circuit, the singlechip with follow machine serial ports drive circuit and be connected, the main control chip passes through the bus and is connected with the singlechip, host computer serial ports drive circuit one end is connected with main control chip data sending terminal, the host computer serial ports drive circuit other end is connected with singlechip data receiving terminal, follows machine serial ports drive circuit one end and singlechip and is connected data sending terminal, follows the machine serial ports drive circuit other end and is connected with main control chip data receiving terminal. The utility model discloses well main control chip can realize point-to-point communication from between the machine module, but from the independent assortment between the machine module, satisfies the differentiation demand, does not need expensive line driver and receiver circuit, effectively reduces the hardware cost.

Description

Multi-module TTL level serial port bus communication circuit

Technical Field

The utility model relates to a serial ports communication field especially relates to a TTL level serial ports bus communication circuit between multimode piece.

Background

With the development of scientific technology, modularization and serialization become a trend of the development of equipment products at present, the modularized design can effectively reduce the design cost, and the modularized design can meet the differentiation requirements through combination and interchange among modules, and is widely applied to the design fields of machine tools, electronic products, aerospace, aviation and the like; each independent functional module is provided with a unit with a consistent geometric connection interface and a consistent input interface and a consistent output interface, and when a multi-module combination mode is to be realized, bus type access is to be realized through data interaction between the host and the slave. The traditional serial communication bus has modes of RS232, RS485, IIC, SPI and the like. The RS232 bus can only carry out one-to-one communication and cannot carry out one-master multi-slave communication, the interface level of the RS232 bus is higher, chips are easy to damage, the IIC bus and the SPI bus are generally applied to communication among different master control MCUs of the same circuit board, the closer the communication distance is, the better the communication distance is, the communication distance is not suitable for communication transmission among long-distance master and multi-slave distributed control systems, the IIC bus and the SPI bus are high in transmission communication cost, the more resources of the master control MCUs are occupied, and the whole control system is in a metastable state. The TTL level signal can be directly connected with an integrated circuit, an expensive line driver and a receiver circuit are not needed, and hardware cost can be effectively reduced, so that TTL serial port communication is more advantageous in product application, but the TTL level serial port is a full-duplex serial port and is only suitable for one-to-one data interaction, and one-master multi-slave access needs to be realized.

The invention discloses a Chinese patent publication No. CN210041858U, published as 2020, 2, 7, and named as a one-master multi-slave high-speed serial communication device, the specific technical proposal of the application is that an optical coupler is respectively configured at the sending end and the receiving end of the master machine, an optical coupler is also respectively configured at the sending end and the receiving end of each slave machine, at the host end, the host optical coupler converts the TTL level of 3.3V or 5V sent by the host sending end into the 24V level with strong electromagnetic interference resistance and then transmits the level, at the slave machine end, the slave machine optical coupler converts the 24V level into the 3.3V or 5V TTL level and then receives the TTL level by the slave machine receiving end, similarly, the slave machine optical coupler converts the 3.3V or 5V TTL level sent by the slave machine sending end into the 24V level with strong anti-electromagnetic interference capability and then transmits the TTL level, and then the host optical coupler converts the 24V level into a 3.3V or 5V TTL level and then receives the TTL level by a host receiving end. The disadvantages of the utility model are complex structure and high cost.

Disclosure of Invention

The utility model discloses it is with high costs to have one owner from among the communication system hardware in many times, occupy the problem that the resource is many, a many intermodule TTL level serial port bus communication method is provided, the problem that TTL level serial port meets in the formula access application is from a owner has been solved, the occupation of saving system resource, reduce hardware cost, realize TTL level serial port bus formula access, some adjustment and improvement have been carried out to serial circuits, and optimize the upgrading to serial ports driver, the range of application of TTL level serial port has further been strengthened.

For solving the technical problem that exists, the utility model adopts the following technical scheme: a multi-module TTL level serial port bus communication circuit comprises a host module and a slave module, wherein the host module comprises a master control chip and a host serial port drive circuit, the slave module comprises a single chip microcomputer and a slave serial port drive circuit, the single chip microcomputer and the slave serial port drive circuit are arranged in each slave module, the single chip microcomputer is connected with the slave serial port drive circuit, the master control chip is connected with the single chip microcomputer through a bus, one end of the host serial port drive circuit is connected with a master control chip data sending end, the other end of the host serial port drive circuit is connected with a single chip microcomputer data receiving end, one end of the slave serial port drive circuit is connected with a data sending end of the single chip microcomputer, and the other end of the slave serial port drive circuit is connected with the master control chip data receiving end. The bus is used to conveniently connect a plurality of slave modules and also to conveniently extend the slave modules or other topologies.

Preferably, the bus comprises a first bus and a second bus, a data sending end of the main control chip is connected with the second bus, a data receiving end of the main control chip is connected with the first bus, a data sending end of the single chip microcomputer in each slave module is connected with the first bus, and a data receiving end of the single chip microcomputer in each slave module is connected with the second bus.

Preferably, the host serial port driving circuit comprises a MOS transistor Q1 and a MOS transistor Q2, a source of the MOS transistor Q1 is connected to a power supply, a source of the MOS transistor Q2 is grounded, a gate of the MOS transistor Q1 and a gate of the MOS transistor Q2 are both connected to a data transmitting end of the main control chip, and a drain of the MOS transistor Q1 and a drain of the MOS transistor Q2 are both connected to a data receiving end of the single chip microcomputer. The push-pull output circuit keeps the output at a continuous stable voltage value, thereby not only improving the load capacity of the circuit, but also improving the switching speed, having small circuit output resistance, being capable of driving large load and realizing the rapid and stable transmission of data.

Preferably, the slave serial port driving circuit comprises a pull-up resistor R1 and a MOS transistor Q3, wherein one end of the pull-up resistor R1 is connected with the positive electrode of a power supply, the other end of the pull-up resistor R1 is connected with the drain electrode of the MOS transistor Q3, the source electrode of the MOS transistor Q3 is grounded, the grid electrode of the MOS transistor Q3 is connected with the data sending end of the single chip microcomputer, and the drain electrode of the MOS transistor Q3 is connected with the data receiving end of the master control chip. The open-drain output pins of the serial port driving circuits of the slaves are connected to the serial port driving circuit of the host, so that a wired AND logic is formed, the circuit realizes level conversion and wired AND logic, the driving capability is improved by using an external circuit, a high level is provided by using a pull-up resistor, and only a low level can be output without the pull-up resistor.

Preferably, the MOS transistor Q1 is a P-channel MOS transistor, and the MOS transistors Q2 and Q3 are both N-channel MOS transistors.

Preferably, an encryption module is arranged between the data sending end of the main control chip in the main module and the second bus, and an encryption module is arranged between the data sending end of the single chip microcomputer in each slave module and the first bus. The encryption module can encrypt and decrypt communication data between the host module and the slave module, and the safety of data communication is improved.

Preferably, the slave module single chip microcomputer is selected from STC8F2K32S 2.

The utility model discloses the beneficial effect who possesses does: point-to-point communication can be realized between the master control chip and the slave module; the slave modules can be freely combined to meet the differentiation requirement; and expensive line drivers and receiver circuits are not needed, so that the hardware cost is effectively reduced.

Drawings

Fig. 1 is a schematic diagram of the hardware connection of the present invention.

Fig. 2 is a circuit diagram of a host serial port data transmission port driving circuit.

Fig. 3 is a circuit diagram of a slave serial port data transmission port driving circuit.

Wherein: 1. the system comprises a host module 11, a master control chip 12, a host serial port drive circuit 2, a slave module 21, a single chip microcomputer 22, a slave serial port drive circuit 3, a first bus 4, a second bus 5 and an encryption module.

Detailed Description

The present invention will be further described with reference to the accompanying drawings and detailed description, it is to be understood that the present embodiment is illustrative only and is not intended to limit the scope of the invention, which is to be given various changes or modifications by those skilled in the art, and that such equivalents also fall within the scope of the invention as defined by the appended claims.

As shown in fig. 1, a multi-module TTL level serial bus communication circuit includes a master module 1 and a slave module 2, where the master module 1 includes a master control chip 11 and a master serial driving circuit 12, the slave module 2 includes a single chip microcomputer 21 and a slave serial driving circuit 22, the single chip microcomputer 21 is connected to the slave serial driving circuit 22, the master control chip 11 is connected to the single chip microcomputer 21 through a bus, one end of the master serial driving circuit 12 is connected to a data transmitting end of the master control chip 11, the other end of the master serial driving circuit 12 is connected to a data receiving end of the single chip microcomputer 21, one end of the slave serial driving circuit 22 is connected to a data transmitting end of the single chip microcomputer 21, and the other end of the slave serial driving circuit 22 is connected to a data receiving end of the master control chip 11. The bus comprises a first bus 3 and a second bus 4, a data sending end of a main control chip in the host module 1 is connected with the second bus 4, a data receiving end of a main control chip 11 is connected with the first bus 3, a single chip microcomputer in each slave module 2, a data sending end of each slave module 2 is connected with the first bus 3, and a data receiving end of a single chip microcomputer 21 in each slave module 2 is connected with the second bus 4. An encryption module 5 is further arranged between the data sending end of the inner main control chip 11 and the second bus 4, the encryption module 5 is arranged between the data sending end of each single chip microcomputer 21 and the first bus 3, and the encryption module is in the prior art and is selected from a QCA9886 encryption module.

As shown in fig. 2 and 3, the host serial port driving circuit 12 adopts a push-pull output circuit, and includes a P-channel MOS transistor Q1 and an N-channel MOS transistor Q2, the S-pole of the MOS transistor Q1 is connected to the positive pole of a power supply, the S-pole of the MOS transistor Q2 is connected to the negative pole of the power supply, the G-pole of the MOS transistor Q1 and the G-pole of the MOS transistor Q2 are connected to a data sending function pin TXD of the main control chip 11, the D-pole of the MOS transistor Q1 and the D-pole of the MOS transistor Q2 are connected to a data receiving pin RXD of the single chip microcomputer 21, and the circuit has a small output resistance, can drive a large load, and realize rapid and stable transmission of data; the slave serial port driving circuit 22 adopts an open-drain output circuit and comprises a pull-up resistor R1 and an N-channel MOS tube Q3, wherein one end of the pull-up resistor R1 is connected with the positive electrode of a power supply, the other end of the pull-up resistor R1 is connected with the D electrode of the MOS tube Q3, the S electrode of the MOS tube Q3 is connected with the negative electrode of the power supply, the G electrode of the MOS tube Q3 is connected with a data sending function pin TXD of the singlechip 21, and the D electrode of the MOS tube Q3 is connected with a data receiving function pin RXD of the main control chip 11.

The TTL level communication mode is a full duplex communication mode, and the master control chip and the slave module can simultaneously transmit data to each other and receive data transmitted from each other, thereby implementing point-to-point communication between the master control chip 11 and the slave mcu 21. The data interaction process comprises the following steps: the communication protocol allocates a communication address to the single chip microcomputer 21 in the slave module 2, the master control chip 11 sends a frame of communication data and encrypts the communication data, all the single chip microcomputers 21 receive the frame of data, the check function checks the communication address, the addresses are not matched, the single chip microcomputer 21 resets a flag bit of the received data to discard the cache data, after the address check is passed, the response function makes a corresponding response according to the communication protocol, and the master control chip 11 receives the response frame to complete a single communication action.

Claims

1. A multi-module TTL level serial port bus communication circuit is characterized by comprising a host module (1) and a slave module (2), the host module (1) comprises a main control chip (11) and a host serial port drive circuit (12), the slave module (2) comprises a single chip microcomputer (21) and slave serial port driving circuits (22) which are arranged in the slave modules, the single chip microcomputer (21) is connected with the slave serial port driving circuits (22), the master control chip (11) is connected with the single chip microcomputer (21) through a bus, one end of the master serial port driving circuit (12) is connected with a data sending end of the master control chip (11), the other end of the master serial port driving circuit (12) is connected with a data receiving end of the single chip microcomputer (21), one end of the slave serial port driving circuit (22) is connected with the data sending end of the single chip microcomputer (21), and the other end of the slave serial port driving circuit (22) is connected with the data receiving end of the master control chip (11).

2. The inter-multi-module TTL level serial port bus communication circuit according to claim 1, wherein the bus comprises a first bus (3) and a second bus (4), a data sending end of the main control chip (11) is connected with the second bus (4), a data receiving end of the main control chip (11) is connected with the first bus (3), a data sending end of the single chip microcomputer (21) in each slave module (2) is connected with the first bus (3), and a data receiving end of the single chip microcomputer (21) in each slave module (2) is connected with the second bus (4).

3. The inter-module TTL level serial bus communication circuit according to claim 1, wherein said host serial driver circuit 12 comprises MOS transistor Q1 and MOS transistor Q2, wherein the source of MOS transistor Q1 is connected to power supply, the source of MOS transistor Q2 is grounded, the gate of MOS transistor Q1 and the gate of MOS transistor Q2 are both connected to the data transmitting terminal of the main control chip (11), and the drain of MOS transistor Q1 and the drain of MOS transistor Q2 are both connected to the data receiving terminal of the single chip microcomputer (21).

4. The inter-module TTL level serial bus communication circuit of claim 1 wherein said slave serial driver circuit (22) comprises a pull-up resistor R1 and a MOS transistor Q3, wherein one end of the pull-up resistor R1 is connected to the positive power supply, the other end of the pull-up resistor R1 is connected to the drain of the MOS transistor Q3, the source of the MOS transistor Q3 is grounded, the gate of the MOS transistor Q3 is connected to the data transmitting terminal of the single chip microcomputer (21), and the drain of the MOS transistor Q3 is connected to the data receiving terminal of the master chip (11).

5. The inter-module TTL level serial bus communication circuit of claim 3 or 4, wherein MOS transistor Q1 is a P-channel type MOS transistor, and MOS transistor Q2 and MOS transistor Q3 are both N-channel type MOS transistors.

6. The inter-multi-module TTL level serial port bus communication circuit according to claim 1, wherein an encryption module (5) is arranged between the data transmitting end of the main control chip (11) and the second bus (4), and an encryption module (5) is arranged between the data transmitting end of each single chip microcomputer (21) and the first bus (3).

7. The inter-module TTL level serial bus communication circuit of claim 1 wherein the type of said single chip microcomputer is STC8F2K32S 2.