CN214255817U - Dormancy action circuit - Google Patents
Dormancy action circuit Download PDFInfo
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- CN214255817U CN214255817U CN202022935796.3U CN202022935796U CN214255817U CN 214255817 U CN214255817 U CN 214255817U CN 202022935796 U CN202022935796 U CN 202022935796U CN 214255817 U CN214255817 U CN 214255817U
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Abstract
The utility model relates to the technical field of power management, in particular to a dormancy action circuit, which comprises a first control end, a second control end, a first switch module, a second switch module, a switch tube and a voltage conversion module; the first control end is used for controlling the on-off of the first switch module; the second control end is used for controlling the on-off of the second switch module; the first switch module and the second switch module are respectively connected with the control end of the switch tube; and the switch end of the switch tube is respectively connected with the power supply and the input end of the voltage conversion module. The utility model discloses a set up first control end, second control end, first switch module and second switch module for can carry out work or dormancy through two controllers common control dormancy action circuit.
Description
Technical Field
The utility model relates to a power management technical field, concretely relates to dormancy action circuit.
Background
In order to save the electric quantity, a plurality of products or devices are provided with a dormancy action circuit on a power circuit at present, so that the products or devices can save the electric quantity in a standby state; however, the sleep operation circuit at present is in a sleep or working state through a controller control circuit, when a plurality of products share a power supply, a plurality of sleep circuits are needed, which cannot meet the increasing needs of people and increases the cost.
SUMMERY OF THE UTILITY MODEL
The utility model aims at the above-mentioned not enough among the prior art, provide a dormancy action circuit.
The purpose of the utility model is realized through the following technical scheme: a dormancy action circuit comprises a first control end, a second control end, a first switch module, a second switch module, a switch tube and a voltage conversion module;
the first control end is used for controlling the on-off of the first switch module; the second control end is used for controlling the on-off of the second switch module; the first switch module and the second switch module are respectively connected with the control end of the switch tube; and the switch end of the switch tube is respectively connected with the power supply and the input end of the voltage conversion module.
The utility model is further arranged that the switch tube is a triode Q8; the emitter of the triode Q8 is connected with a power supply; the collector of the triode Q8 is connected with the input end of the voltage conversion module;
the sleep action circuit further includes a resistor R66; the first switch module and the second switch module are respectively connected with the base electrode of a triode Q8 through a resistor R66; the emitter of the transistor Q8 is connected with the base of the transistor Q8 through a resistor R60.
The utility model discloses it is further arranged that the first switch module includes triode Q12, resistor R71 and triode Q10;
the base electrode of the triode Q12 is connected with the first control end; the emitter of the triode Q12 is grounded; the collector of the triode Q12 is respectively connected with the resistor R71 and the base of the triode Q10; the emission of the triode Q10 is grounded; the collector of the triode Q10 is connected with the base of the triode Q8 through a resistor R66.
The utility model discloses it is further arranged that the second switch module includes triode Q9, resistor R77, resistor R73 and triode Q11; the second control end is connected with the base electrode of a triode Q9 through a resistor R77; the emitter of the triode Q9 is connected with a power supply; the collector of the triode Q9 is connected with the base of the triode Q11 through a resistor R73; the emission of the triode Q11 is grounded; the collector of the triode Q11 is connected with the base of the triode Q8 through a resistor R66.
The utility model is further configured that the dormancy action circuit further comprises a sampling module;
the sampling module comprises a resistor R49, a resistor R57 and a capacitor C36; the collector of the triode Q8 is grounded after passing through the resistor R49 and the resistor R57 in sequence; the capacitor C36 is connected in parallel with the resistor R57.
The utility model is further configured that the voltage conversion module comprises a voltage reduction chip U2; the input end of the voltage reduction chip U2 is connected with the switch end of the switch tube.
The utility model discloses it is further arranged that the voltage conversion module further includes a diode D1; the output terminal of the buck chip U2 is connected to ground through a diode D1.
The utility model discloses it is further arranged that the voltage conversion module further comprises an inductor L2 and a capacitor E2; the output end of the buck chip U2 is grounded through an inductor L2 and a capacitor E2 in sequence.
The utility model has the advantages that: the utility model discloses a set up first control end, second control end, first switch module and second switch module for can carry out work or dormancy through two controllers common control dormancy action circuit.
Drawings
The invention is further described with the aid of the accompanying drawings, in which, however, the embodiments do not constitute any limitation to the invention, and for a person skilled in the art, other drawings can be derived from the following drawings without inventive effort.
Fig. 1 is a circuit diagram of the present invention;
wherein: 1. a first control terminal; 2. a second control terminal.
Detailed Description
The invention will be further described with reference to the following examples.
As shown in fig. 1, the sleep operation circuit of the present embodiment includes a first control terminal 1, a second control terminal 2, a first switch module, a second switch module, a switch tube, and a voltage conversion module;
the first control end 1 is used for controlling the on-off of the first switch module; the second control end 2 is used for controlling the on-off of the second switch module; the first switch module and the second switch module are respectively connected with the control end of the switch tube; and the switch end of the switch tube is respectively connected with the power supply and the input end of the voltage conversion module.
Specifically, in the sleep operation circuit described in this embodiment, the first control end 1 and the second control end 2 are respectively connected to two external controllers, so that the first control end 1 and the second control end 2 can respectively control on/off of the first switch module and the second switch module, and when the first switch module and the second switch module are both off, the switch tube is turned off, so that the circuit is in a sleep state; when first switch module or second switch module are in the time of switching on, the switch tube switches on and makes external power source can enter voltage conversion module behind the switch tube and change, then supplies power for external equipment.
In this embodiment, the first control terminal 1, the second control terminal 2, the first switch module and the second switch module are arranged, so that the sleep operation circuit can be controlled to work or sleep through the two controllers.
In the sleep operation circuit of the present embodiment, the switching tube is a transistor Q8; the emitter of the triode Q8 is connected with a power supply; the collector of the triode Q8 is connected with the input end of the voltage conversion module;
the sleep action circuit further includes a resistor R66; the first switch module and the second switch module are respectively connected with the base electrode of a triode Q8 through a resistor R66; the emitter of the transistor Q8 is connected with the base of the transistor Q8 through a resistor R60. The transistor Q8 is a PNP transistor.
Specifically, when the first switch module and the second switch module are both off, the emitter and the collector of the transistor Q8 are disconnected, so that the circuit is in a sleep state; when the first switch module or the second switch module is conducted, the emitter and the collector of the triode Q8 are conducted, so that an external power supply can enter the voltage conversion module for conversion after passing through the emitter and the collector of the triode Q8, and then the external equipment is supplied with power.
In the sleep mode circuit of this embodiment, the first switch module includes a transistor Q12, a resistor R71, and a transistor Q10;
the base electrode of the triode Q12 is connected with the first control end 1; the emitter of the triode Q12 is grounded; the collector of the triode Q12 is respectively connected with the resistor R71 and the base of the triode Q10; the emission of the triode Q10 is grounded; the collector of the triode Q10 is connected with the base of the triode Q8 through a resistor R66.
Specifically, triode Q10 and triode Q12 are the NPN triode, and when the action circuit of need dormancy normally worked, first control end 1 output high level to make triode Q12 switch on, thereby make triode Q10 switch on, even make the voltage reduction on the resistance R66, thereby make triode Q8's base current reduce, so that triode Q8's projecting pole switches on with the collecting electrode.
In the sleep mode circuit of this embodiment, the second switch module includes a transistor Q9, a resistor R77, a resistor R73, and a transistor Q11; the second control end 2 is connected with the base electrode of a triode Q9 through a resistor R77; the emitter of the triode Q9 is connected with a power supply; the collector of the triode Q9 is connected with the base of the triode Q11 through a resistor R73; the emission of the triode Q11 is grounded; the collector of the triode Q11 is connected with the base of the triode Q8 through a resistor R66.
Specifically, the transistor Q11 and the transistor Q9 are both NPN transistors, and when the sleep operation circuit needs to work normally, the second control terminal 2 outputs a high level, so that the transistor Q9 is turned on, so that the transistor Q11 is turned on, that is, the voltage across the resistor R66 is reduced, so that the base current of the transistor Q8 is reduced, and the emitter and the collector of the transistor Q8 are turned on;
when the sleep operation circuit is required to enter the sleep state, the first control end 1 and the second control end 2 output low levels at the same time, so that the triode Q11 and the triode Q10 are both disconnected, the voltage on the resistor R66 is increased, the base current of the triode Q8 is increased, the emitter and the collector of the triode Q8 are disconnected, the voltage conversion module cannot obtain the voltage, and the circuit is in the sleep state.
In the sleep operation circuit of this embodiment, the sleep operation circuit further includes a sampling module;
the sampling module comprises a resistor R49, a resistor R57 and a capacitor C36; the collector of the triode Q8 is grounded after passing through the resistor R49 and the resistor R57 in sequence; the capacitor C36 is connected in parallel with the resistor R57. This arrangement facilitates sampling of the voltage at the collector of transistor Q8.
In the sleep operation circuit of the present embodiment, the voltage conversion module includes a voltage dropping chip U2; the input end of the voltage reduction chip U2 is connected with the switch end of the switch tube. The model of the voltage reduction chip U2 is XL1509-ADJ, TD1509PR or AP 1509-ADJM/TR.
In the sleep operation circuit of this embodiment, the voltage conversion module further includes a diode D1; the output terminal of the buck chip U2 is connected to ground through a diode D1. The above arrangement can prevent the reverse flow of current.
In the sleep operation circuit of the present embodiment, the voltage conversion module further includes an inductor L2 and a capacitor E2; the output end of the buck chip U2 is grounded through an inductor L2 and a capacitor E2 in sequence. The filtering function is achieved through the arrangement.
It should be finally noted that the above embodiments are only intended to illustrate the technical solutions of the present invention, and not to limit the scope of the present invention, and although the present invention has been described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that the technical solutions of the present invention can be modified or replaced with equivalents without departing from the spirit and scope of the technical solutions of the present invention.
Claims (8)
1. A sleep operation circuit, comprising: the device comprises a first control end (1), a second control end (2), a first switch module, a second switch module, a switch tube and a voltage conversion module;
the first control end (1) is used for controlling the on-off of the first switch module; the second control end (2) is used for controlling the on-off of the second switch module; the first switch module and the second switch module are respectively connected with the control end of the switch tube; and the switch end of the switch tube is respectively connected with the power supply and the input end of the voltage conversion module.
2. The sleep action circuit of claim 1, wherein: the switching tube is a triode Q8; the emitter of the triode Q8 is connected with a power supply; the collector of the triode Q8 is connected with the input end of the voltage conversion module;
the sleep operation circuit further includes a resistor R66 and a resistor R60; the first switch module and the second switch module are respectively connected with the base electrode of a triode Q8 through a resistor R66; the emitter of the transistor Q8 is connected with the base of the transistor Q8 through a resistor R60.
3. The sleep action circuit of claim 2, wherein: the first switch module comprises a transistor Q12, a resistor R71 and a transistor Q10;
the base electrode of the triode Q12 is connected with the first control end (1); the emitter of the triode Q12 is grounded; the collector of the triode Q12 is respectively connected with the resistor R71 and the base of the triode Q10; the emission of the triode Q10 is grounded; the collector of the triode Q10 is connected with the base of the triode Q8 through a resistor R66.
4. The sleep action circuit of claim 2, wherein: the second switch module comprises a transistor Q9, a resistor R77, a resistor R73 and a transistor Q11; the second control end (2) is connected with the base electrode of a triode Q9 through a resistor R77; the emitter of the triode Q9 is connected with a power supply; the collector of the triode Q9 is connected with the base of the triode Q11 through a resistor R73; the emission of the triode Q11 is grounded; the collector of the triode Q11 is connected with the base of the triode Q8 through a resistor R66.
5. The sleep action circuit of claim 2, wherein: the sleep action circuit further comprises a sampling module;
the sampling module comprises a resistor R49, a resistor R57 and a capacitor C36; the collector of the triode Q8 is grounded after passing through the resistor R49 and the resistor R57 in sequence; the capacitor C36 is connected in parallel with the resistor R57.
6. The sleep action circuit of claim 1, wherein: the voltage conversion module comprises a voltage reduction chip U2; the input end of the voltage reduction chip U2 is connected with the switch end of the switch tube.
7. The sleep action circuit of claim 6, wherein: the voltage conversion module further comprises a diode D1; the output terminal of the buck chip U2 is connected to ground through a diode D1.
8. The sleep action circuit of claim 6, wherein: the voltage conversion module further comprises an inductor L2 and a capacitor E2; the output end of the buck chip U2 is grounded through an inductor L2 and a capacitor E2 in sequence.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022935796.3U CN214255817U (en) | 2020-12-10 | 2020-12-10 | Dormancy action circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022935796.3U CN214255817U (en) | 2020-12-10 | 2020-12-10 | Dormancy action circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN214255817U true CN214255817U (en) | 2021-09-21 |
Family
ID=77738429
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202022935796.3U Active CN214255817U (en) | 2020-12-10 | 2020-12-10 | Dormancy action circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN214255817U (en) |
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2020
- 2020-12-10 CN CN202022935796.3U patent/CN214255817U/en active Active
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| GR01 | Patent grant | ||
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Address after: 516000 Huidong industrial transfer park, Daling Town, Huidong County, Huizhou City, Guangdong Province Patentee after: Huizhou Jinli variable speed Industrial Development Co.,Ltd. Patentee after: Dongguan Chenggong Electronic Equipment Co., Ltd. Address before: 516300 Huidong industrial transfer park, Daling Town, Huidong County, Huizhou City, Guangdong Province Patentee before: Huizhou Jinli Intelligent Technology Co.,Ltd. Patentee before: Dongguan Chenggong Electronic Equipment Co., Ltd. |
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| CP03 | Change of name, title or address |