CN213690299U - Single-channel serial port multi-channel peripheral time-sharing multiplexing circuit - Google Patents
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Abstract
The utility model belongs to the technical field of serial ports extension equipment and specifically relates to single-pass serial ports multichannel peripheral hardware timesharing multiplexing circuit. The circuit comprises a main control chip MCU, a pull-up and pull-down resistor R1, a pull-up and pull-down resistor R2, a pull-up and pull-down resistor R3, a pull-up and pull-down resistor R4, a current-limiting resistor R5, a current-limiting resistor R6, a level conversion chip U1, a level conversion chip U3, a level conversion chip U4, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4 and an AND gate U2. The utility model discloses according to the characteristics of vending machine internal communication, adopt the peripheral hardware communication of single serial ports and a plurality of different interfaces, effectively solved the contradiction between cost and the demand. The method and the device reduce the cost, reduce the assembly complexity and improve the reliability.
Description
Technical Field
The utility model belongs to the technical field of serial ports extension equipment and specifically relates to single-pass serial ports multichannel peripheral hardware timesharing multiplexing circuit.
Background
The vending machine is a common commercial automation device, is not limited by time and place, can save manpower, is convenient for transaction, provides great convenience for consumers to shop, and is more and more widely used. The vending machine main control board can be externally connected with a plurality of devices, such as a printer, a card reader, a code scanning gun and the like, and is used for assisting the main control board to complete functions of identification, collection, judgment and the like. The interface types of the serial devices mainly include RS232 and RS 485. At present, a general design scheme is that each device is configured with an independent serial port for communication, namely 4 peripherals are required to be configured with a main control board with at least 4 independent serial ports, and when the type of a main control board MCU is selected, at least 4 serial ports are required. If the number and the type of the serial ports are not enough, the main control board cannot be widely applied, and manufacturers can only complement the lacking number by increasing the cost and configuring the interface conversion module and converting other interfaces into the serial ports. The currently used serial device extension methods mainly include two types: one is a design selection stage, which selects the MCU with enough serial ports, so that the serial ports of the main control board can be enough; the other is to add a conversion module to convert other interfaces such as USB and the like into a serial port. The former increases the cost, and the latter not only increases the cost, but also increases the risk of data errors caused by intermediate links.
SUMMERY OF THE UTILITY MODEL
In order to solve the technical problem described in the background art, the utility model provides a single channel serial ports multichannel peripheral hardware time-sharing multiplex circuit. According to the vending machine, the peripheral communication of a single serial port and a plurality of different interfaces is adopted according to the characteristics of internal communication of the vending machine, and the contradiction between the cost and the requirement is effectively solved. The method and the device reduce the cost, reduce the assembly complexity and improve the reliability.
The utility model provides a technical scheme that its technical problem adopted is:
a single-channel serial port multi-peripheral time-sharing multiplexing circuit comprises a main control chip MCU, a pull-up and pull-down resistor R1, a pull-up and pull-down resistor R2, a pull-up and pull-down resistor R3, a pull-up and pull-down resistor R4, a current-limiting resistor R5, a current-limiting resistor R6, a level conversion chip U1, a level conversion chip U3, a level conversion chip U4, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4 and an AND gate U2, wherein one end of the current-limiting resistor R6 is connected with a TXD pin of the main control chip MCU, the other end of the current-limiting resistor R6 is respectively connected with a pin 11 and a pin 10 of the level conversion chip U4, a pin 4 of the level conversion chip U1 and a pin 4 of the level conversion chip U3, one end of the current-limiting resistor R5 is connected with an RXD pin of the main control chip MCU, the other end of the current-limiting resistor R5 is respectively connected with a pin 6 of the AND gate U2, a pin VCC of the gate U2, a pin of, the 2 nd pin of the and gate U2 is connected with the 9 th pin of the level conversion chip U4, the 4 th pin of the and gate U2 is connected with the 1 st pin of the level conversion chip U1, the 5 th pin of the and gate U2 is connected with the 1 st pin of the level conversion chip U3, the 1 st pin of the level conversion chip U4 is connected with one end of a capacitor C1, the 3 rd pin of the level conversion chip U4 is connected with the other end of a capacitor C1, the 4 th pin of the level conversion chip U4 is connected with one end of a capacitor C2, the 5 th pin of the level conversion chip U4 is connected with the other end of a capacitor C2, the 2 nd pin of the level conversion chip U4 is connected with one end of a capacitor C4, the 6 th pin of the level conversion chip U4 is connected with one end of a capacitor C3, the other end of a capacitor C4 and the other end of a capacitor C3 are grounded, the 16 th pin of the level conversion chip U4 is connected with the, the 2 nd pin, the 3 rd pin and the 8 th pin of the level conversion chip U1 are connected to a power source VCC, one end of a pull-up resistor R1 is connected to the power source VCC, the other end of the pull-up resistor R1 is connected to the 6 th pin of the level conversion chip U1, the 7 th pin of the level conversion chip U1 is connected to one end of a pull-up resistor R2, the other end of the pull-up resistor R2 is grounded to the 5 th pin of the level conversion chip U1, the 2 nd pin, the 3 rd pin and the 8 th pin of the level conversion chip U3 are connected to the power source VCC, one end of a pull-up resistor R3 is connected to the power source VCC, the other end of the pull-up resistor R3 is connected to the 6 th pin of the level conversion chip U3, the 7 th pin of the level conversion chip U3 is connected to one end of a pull-up resistor R4, and the other end of the pull.
Specifically, the level conversion chip U1 and the level conversion chip U3 are both RS485 level conversion chips.
Specifically, the level conversion chip U4 is an RS232 level conversion chip.
The utility model has the advantages that: the utility model provides a single pass serial ports multichannel peripheral hardware timesharing multiplexing circuit. According to the vending machine, the peripheral communication of a single serial port and a plurality of different interfaces is adopted according to the characteristics of internal communication of the vending machine, and the contradiction between the cost and the requirement is effectively solved. The method and the device reduce the cost, reduce the assembly complexity and improve the reliability.
Drawings
The present invention will be further explained with reference to the drawings and examples.
Fig. 1 is a circuit diagram of the present invention;
Detailed Description
The present invention will now be described in further detail with reference to the accompanying drawings. These drawings are simplified schematic drawings and illustrate the basic structure of the present invention only in a schematic manner, and thus show only the components related to the present invention.
Fig. 1 is a circuit diagram of the present invention.
As shown in fig. 1, a single-channel serial port multi-channel peripheral time-sharing multiplexing circuit includes a main control chip MCU, a pull-up and pull-down resistor R1, a pull-up and pull-down resistor R2, a pull-up and pull-down resistor R3, a pull-up and pull-down resistor R4, a current-limiting resistor R5, a current-limiting resistor R6, a level conversion chip U1, a level conversion chip U3, a level conversion chip U4, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4 and an and gate U2, wherein one end of the current-limiting resistor R6 is connected to a TXD pin of the main control chip MCU, the other end of the current-limiting resistor R6 is connected to the 11 th and 10 th pins of the level conversion chip U4, the 4 th pin of the level conversion chip U1 and the 4 th pin of the level conversion chip U3, one end of the current-limiting resistor R5 is connected to an RXD pin of the main control chip MCU, the other end of the current-limiting resistor R5 is connected to the 6 th pin of the, the 1 st pin of the and gate U2 is connected to the 12 th pin of the level conversion chip U4, the 2 nd pin of the and gate U2 is connected to the 9 th pin of the level conversion chip U4, the 4 th pin of the and gate U2 is connected to the 1 st pin of the level conversion chip U1, the 5 th pin of the and gate U2 is connected to the 1 st pin of the level conversion chip U3, the 1 st pin of the level conversion chip U4 is connected to one end of a capacitor C1, the 3 rd pin of the level conversion chip U4 is connected to the other end of a capacitor C1, the 4 th pin of the level conversion chip U4 is connected to one end of a capacitor C2, the 5 th pin of the level conversion chip U4 is connected to the other end of a capacitor C2, the 2 nd pin of the level conversion chip U4 is connected to one end of a capacitor C4, the 6 th pin of the level conversion chip U4 is connected to one end of a capacitor C3, the other end of the capacitor C4 and the other end of the capacitor C3 are, the 15 th pin of the level conversion chip U4 is grounded, the 2 nd pin, the 3 rd pin and the 8 th pin of the level conversion chip U1 are connected to a power VCC, one end of a pull-up resistor R1 is connected to the power VCC, the other end of the pull-up resistor R1 is connected to the 6 th pin of the level conversion chip U1, the 7 th pin of the level conversion chip U1 is connected to one end of a pull-up resistor R2, the other end of the pull-up resistor R2 is grounded to the 5 th pin of the level conversion chip U1, the 2 nd pin, the 3 rd pin and the 8 th pin of the level conversion chip U3 are connected to the power VCC, one end of the pull-up resistor R3 is connected to the power VCC, the other end of the pull-up resistor R3 is connected to the 6 th pin of the level conversion chip U3, the 7 th pin of the level conversion chip U3 is connected to one end of the pull-up resistor R4, and the other end of the pull-. The level conversion chip U1 and the level conversion chip U3 are both RS485 level conversion chips. The level conversion chip U4 is an RS232 level conversion chip.
Signals RXD _ MCU and TXD _ MCU on the left side of the current limiting resistor R5 and the current limiting resistor R6 are serial port receiving and transmitting signals at the interface of the MCU of the main control chip. The transmitting pins are expanded into 4 paths or connected directly in a multi-path mode, and the driving capacity of the MCU is far greater than that of the 4 serial port chips; the extension of receiving pin is realized through a 4 input AND gate U2, because the receiving pin of serial port chip all presents the high level under the condition of not having data transmission, and the equipment address is different moreover, according to communication protocol, only one equipment work at the same time, so when certain equipment carries out data transmission, other equipment can not work, when main control chip MCU sent certain equipment address, this equipment had the data transmission action. Therefore, a plurality of external devices with different interfaces can multiplex serial ports of the same main chip in a time-sharing manner.
The working principle is as follows: the main control chip MCU sends data through the TXD _ MCU, and each transceiver receives the data and converts the TTL level signal into an RS232 or RS485 differential signal at the same time and transmits the RS232 or RS485 differential signal to external equipment; the external equipment receives the data packet for analysis, if the corresponding address is not the address of the equipment, no data is returned, and the transceiver does not receive signals, so that the return always presents high level; if the corresponding address is the address of the device, corresponding data is sent through the transceiver according to the communication protocol, the data start bit is at a low level, and the low level and other high levels are input in the logic and gate U2, so that the data of the device is transmitted back to the main control chip MCU, and the whole communication process is completed.
In light of the foregoing, it will be apparent to those skilled in the art from this disclosure that various changes and modifications can be made without departing from the spirit and scope of the invention. The technical scope of the present invention is not limited to the content of the specification, and must be determined according to the scope of the claims.
Claims (3)
1. A single-channel serial port multi-peripheral time-sharing multiplexing circuit is characterized by comprising a main control chip MCU, a pull-up and pull-down resistor R1, a pull-up and pull-down resistor R2, a pull-up and pull-down resistor R3, a pull-up and pull-down resistor R4, a current-limiting resistor R5, a current-limiting resistor R6, a level conversion chip U1, a level conversion chip U3, a level conversion chip U4, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4 and an AND gate U2, wherein one end of the current-limiting resistor R6 is connected with a TXD pin of the main control chip MCU, the other end of the current-limiting resistor R6 is respectively connected with a No. 11 and No. 10 pin of the level conversion chip U4, a No. 4 pin of the level conversion chip U1 and a No. 4 pin of the level conversion chip U3, one end of the current-limiting resistor R6959 is connected with an RXD pin of the main control chip MCU, the other end of the current-limiting resistor R5 is connected with a, the 1 st pin of the and gate U2 is connected to the 12 th pin of the level conversion chip U4, the 2 nd pin of the and gate U2 is connected to the 9 th pin of the level conversion chip U4, the 4 th pin of the and gate U2 is connected to the 1 st pin of the level conversion chip U1, the 5 th pin of the and gate U2 is connected to the 1 st pin of the level conversion chip U3, the 1 st pin of the level conversion chip U4 is connected to one end of a capacitor C1, the 3 rd pin of the level conversion chip U4 is connected to the other end of a capacitor C1, the 4 th pin of the level conversion chip U4 is connected to one end of a capacitor C2, the 5 th pin of the level conversion chip U4 is connected to the other end of a capacitor C2, the 2 nd pin of the level conversion chip U4 is connected to one end of a capacitor C4, the 6 th pin of the level conversion chip U4 is connected to one end of a capacitor C3, the other end of the capacitor C4 and the other end of the capacitor C3 are, the 15 th pin of the level conversion chip U4 is grounded, the 2 nd pin, the 3 rd pin and the 8 th pin of the level conversion chip U1 are connected to a power VCC, one end of a pull-up resistor R1 is connected to the power VCC, the other end of the pull-up resistor R1 is connected to the 6 th pin of the level conversion chip U1, the 7 th pin of the level conversion chip U1 is connected to one end of a pull-up resistor R2, the other end of the pull-up resistor R2 is grounded to the 5 th pin of the level conversion chip U1, the 2 nd pin, the 3 rd pin and the 8 th pin of the level conversion chip U3 are connected to the power VCC, one end of the pull-up resistor R3 is connected to the power VCC, the other end of the pull-up resistor R3 is connected to the 6 th pin of the level conversion chip U3, the 7 th pin of the level conversion chip U3 is connected to one end of the pull-up resistor R4, and the other end of the pull-.
2. The single-channel serial port multi-channel peripheral time-sharing multiplexing circuit of claim 1, characterized in that: the level conversion chip U1 and the level conversion chip U3 are both RS485 level conversion chips.
3. The single-channel serial port multi-channel peripheral time-sharing multiplexing circuit of claim 1, characterized in that: the level conversion chip U4 is an RS232 level conversion chip.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202023345146.XU CN213690299U (en) | 2020-12-31 | 2020-12-31 | Single-channel serial port multi-channel peripheral time-sharing multiplexing circuit |
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| CN202023345146.XU CN213690299U (en) | 2020-12-31 | 2020-12-31 | Single-channel serial port multi-channel peripheral time-sharing multiplexing circuit |
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| CN213690299U true CN213690299U (en) | 2021-07-13 |
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| CN202023345146.XU Active CN213690299U (en) | 2020-12-31 | 2020-12-31 | Single-channel serial port multi-channel peripheral time-sharing multiplexing circuit |
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Effective date of registration: 20231214 Address after: 226500 No. 305, Tengrui Industrial Park, No. 1, telecom East 1st Road, Chengnan street, Rugao City, Nantong City, Jiangsu Province Patentee after: Nantong Lichi Intelligent Equipment Co.,Ltd. Address before: Unit 1727, 17th floor, South Building, No.1 building, Kuncheng Plaza, 1188 Renmin South Road, Kunshan Development Zone, Suzhou City, Jiangsu Province Patentee before: KUNSHAN YIPUTENG AUTOMATION TECHNOLOGY Co.,Ltd. |