CN212231329U - ORing MOSFET control circuit and power supply parallel system - Google Patents
ORing MOSFET control circuit and power supply parallel system Download PDFInfo
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- CN212231329U CN212231329U CN202020938460.XU CN202020938460U CN212231329U CN 212231329 U CN212231329 U CN 212231329U CN 202020938460 U CN202020938460 U CN 202020938460U CN 212231329 U CN212231329 U CN 212231329U
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Abstract
The utility model provides an ORing MOSFET control circuit, including the control unit and MOS pipe Q2, the control unit includes signal acquisition and amplifier circuit, resistance voltage division filter circuit and comparator circuit, signal acquisition and amplifier circuit's output with resistance voltage division filter circuit's input is connected, resistance voltage division filter circuit's output with comparator circuit's input is connected, comparator circuit's output with MOS pipe Q2's gate is connected, MOS pipe Q2's source electrode connects internal voltage V _ IN, MOS pipe Q2's drain electrode connects external voltage V _ OUT. The utility model has the advantages that: the drive voltage of the MOSFET is improved, the conduction loss is reduced, and the circuit efficiency is improved.
Description
Technical Field
The utility model relates to a control circuit especially relates to an ORing MOSFET control circuit and power parallel system.
Background
The loss of the traditional ORing MOSFET control circuit is large, and the power efficiency is low.
Disclosure of Invention
In order to solve the problems in the prior art, the utility model provides an ORing MOSFET control circuit and power parallel system.
The utility model provides an ORing MOSFET control circuit, including the control unit and MOS pipe Q2, the control unit includes signal acquisition and amplifier circuit, resistance voltage division filter circuit and comparator circuit, signal acquisition and amplifier circuit's output with resistance voltage division filter circuit's input is connected, resistance voltage division filter circuit's output with comparator circuit's input is connected, comparator circuit's output with MOS pipe Q2's gate is connected, MOS pipe Q2's source electrode connects internal voltage V _ IN, MOS pipe Q2's drain electrode connects external voltage V _ OUT.
As a further improvement of the present invention, the signal collecting and amplifying circuit includes diode D1A, diode D1B, triode Q1A, triode Q1B, triode Q1A's collecting electrode is connected with power supply voltage VCC behind resistance R4, triode Q1A's base with triode Q1B's base is connected, triode Q1A's projecting pole with diode D1A's positive pole is connected, diode D1A's negative pole is connected with external voltage V _ OUT, triode Q1B's collecting electrode is connected with power supply voltage VCC, triode Q1B's projecting pole with diode D1B's positive pole is connected, diode D1B's negative pole is connected with internal voltage V _ IN.
As a further improvement of the present invention, the parameters of the diode D1A and the diode D1B are consistent, and the parameters of the triode Q1A and the triode Q1B are consistent.
As a further improvement of the present invention, the resistance voltage-dividing filter circuit includes a resistor R1, a resistor R2, a resistor R3 and a capacitor C1, a terminal of the resistor R1 is connected to the power supply voltage VCC, another terminal of the resistor R1 is connected to the collector of the transistor Q1B, one end of the resistor R2 is connected between the collectors of the resistor R1 and the transistor Q1B, the other end of the resistor R2 is connected to one end of the resistor R3, one end of the capacitor C1 and the input of the comparator circuit, another terminal of the resistor R3 is connected to the internal voltage V _ IN, and another terminal of the capacitor C1 is connected to the internal voltage V _ IN.
As a further improvement of the present invention, the comparator circuit includes comparator U1, resistance R5, resistance R6, resistance R7, the positive input termination of comparator U1 behind resistance R5 with resistance R2 connects, the negative input termination of comparator U1 connect reference voltage VREF behind resistance R6, the output of comparator U1 with the gate connection of MOS pipe Q2, the one end of resistance R7 with the positive input connection of comparator U1, the other end of resistance R7 with the output of comparator U1 is connected.
As a further improvement of the present invention, a resistor R8 is connected in series between the output end of the comparator U1 and the gate of the MOS transistor Q2.
The utility model also provides a power parallel system, include as in do one as above-mentioned ORing MOSFET control circuit.
The utility model has the advantages that: by the scheme, the driving voltage of the MOSFET is improved, the conduction loss is reduced, and the circuit efficiency is improved.
Drawings
Fig. 1 is a circuit diagram of an ORing MOSFET control circuit according to the present invention.
Detailed Description
The present invention will be further described with reference to the following description and embodiments.
As shown IN fig. 1, an ORing MOSFET control circuit includes a control unit and a MOS transistor Q2, the control unit includes a signal collecting and amplifying circuit, a resistance voltage-dividing filter circuit and a comparator circuit, an output terminal of the signal collecting and amplifying circuit is connected to an input terminal of the resistance voltage-dividing filter circuit, an output terminal of the resistance voltage-dividing filter circuit is connected to an input terminal of the comparator circuit, an output terminal of the comparator circuit is connected to a gate of the MOS transistor Q2, a source of the MOS transistor Q2 is connected to an internal voltage V _ IN, and a drain of the MOS transistor Q2 is connected to an external voltage V _ OUT.
As shown IN fig. 1, the signal collecting and amplifying circuit includes a diode D1A, a diode D1B, a triode Q1A and a triode Q1B, a collector of the triode Q1A is connected with a power supply voltage VCC after being connected with a resistor R4, a base of the triode Q1A is connected with a base of the triode Q1B, an emitter of the triode Q1A is connected with an anode of the diode D1A, a cathode of the diode D1A is connected with an external voltage V _ OUT, a collector of the triode Q1B is connected with the power supply voltage VCC, an emitter of the triode Q1B is connected with an anode of the diode D1B, and a cathode of the diode D1B is connected with an internal voltage V _ IN.
As shown in fig. 1, the parameters of the diode D1A and the diode D1B are consistent, a device D1 with two diodes integrated together is selected, the parameters of the transistor Q1A and the transistor Q1B are consistent, and a device Q1 with two transistors integrated together is selected.
As shown IN fig. 1, the resistance voltage-dividing filter circuit includes a resistor R1, a resistor R2, a resistor R3, and a capacitor C1, one end of the resistor R1 is connected to a supply voltage VCC, the other end of the resistor R1 is connected to a collector of the transistor Q1B, one end of the resistor R2 is connected between the collector of the resistor R1 and the collector of the transistor Q1B, the other end of the resistor R2 is connected to one end of the resistor R3, one end of the capacitor C1, and an input end of a comparator circuit, the other end of the resistor R3 is connected to an internal voltage V _ IN, and the other end of the capacitor C1 is connected to the internal voltage V _ IN.
As shown in fig. 1, the comparator circuit includes a comparator U1, a resistor R5, a resistor R6, and a resistor R7, a positive input terminal of the comparator U1 is connected to the resistor R2 after being connected to the resistor R5, a negative input terminal of the comparator U1 is connected to the resistor R6 after being connected to a reference voltage VREF, an output terminal of the comparator U1 is connected to a gate of the MOS transistor Q2, one end of the resistor R7 is connected to the positive input terminal of the comparator U1, and the other end of the resistor R7 is connected to an output terminal of the comparator U1.
As shown in fig. 1, a resistor R8 is connected in series between the output terminal of the comparator U1 and the gate of the MOS transistor Q2.
The utility model provides a pair of ORing MOSFET control circuit, its theory of operation as follows:
when the direct-current power supply is loaded, the output current firstly passes through a body diode of an MOS tube Q2, when the output current is gradually increased and the internal voltage is higher than the external voltage (V _ IN > V _ OUT), the triode Q1A is gradually conducted (from cut-off, linear conduction and finally saturation conduction), the triode Q1B is gradually cut off (from saturation conduction, linear conduction and finally cut-off), the voltage Va between the collector electrodes of the resistor R1 and the triode Q1B and the voltage Vb between the resistor R2 and the resistor R5 are gradually increased, when the voltage of Vb is greater than VREF, the comparator U1 outputs high level, the MOS tube Q2 is conducted, the power supply supplies power to the load through the MOS tube Q2 and does not pass through the body diode or external diode of the MOS tube Q2, and the conduction loss of the MOS tube Q2 is smaller than the diode, so that the power supply loss is reduced and the power supply efficiency;
when the external voltage is higher than or equal to the internal voltage (V _ OUT is more than or equal to V _ IN), the triode Q1A is gradually cut off (from saturation conduction, linear conduction and final to cutoff), the triode Q1B is gradually conducted (from cutoff, linear conduction and final to saturation conduction), the voltage of Va and Vb gradually drops, when the voltage of Vb is less than VREF, the comparator U1 outputs low level, the MOS tube Q2 is cut off, the power supply is isolated from the external circuit, the current of the external power supply (a storage battery or other power supplies connected with the power supply IN parallel) cannot be reversely poured into the power supply, and the purpose of protecting the internal circuit of the power supply module is achieved.
The utility model discloses an accurate comparison circuit who takes the return difference is constituteed to resistance partial pressure filter circuit, comparator circuit, through design VREF voltage value and resistance R1, resistance R2, resistance R3's resistance value, when MOSFET body diode's electric current was a certain definite value, Vb voltage just was greater than VREF this moment, the comparator action switched on MOS pipe Q2; and when the external voltage is higher than or equal to the internal voltage, the MOS transistor Q2 is turned off. And resistor R7 produces the return difference voltage, avoids when Vb = VREF, and the repetition turns on and off MOS pipe Q2.
The utility model also provides a power parallel system, include as in do one as above-mentioned ORing MOSFET control circuit.
The foregoing is a more detailed description of the present invention, taken in conjunction with the specific preferred embodiments thereof, and it is not intended that the invention be limited to the specific embodiments shown and described. To the utility model belongs to the technical field of ordinary technical personnel, do not deviate from the utility model discloses under the prerequisite of design, can also make a plurality of simple deductions or replacement, all should regard as belonging to the utility model discloses a protection scope.
Claims (7)
1. An ORing MOSFET control circuit, comprising: including the control unit and MOS pipe Q2, the control unit includes signal acquisition and amplifier circuit, resistance partial pressure filter circuit and comparator circuit, signal acquisition and amplifier circuit's output with resistance partial pressure filter circuit's input is connected, resistance partial pressure filter circuit's output with the input of comparator circuit is connected, the output of comparator circuit with MOS pipe Q2's gate is connected, MOS pipe Q2's source connects internal voltage V _ IN, MOS pipe Q2's drain electrode connects external voltage V _ OUT.
2. The ORing MOSFET control circuit of claim 1, wherein: signal acquisition and amplifier circuit includes diode D1A, diode D1B, triode Q1A, triode Q1B, triode Q1A's collecting electrode meets and connects power supply voltage VCC behind resistance R4, triode Q1A's base with triode Q1B's base is connected, triode Q1A's projecting pole with diode D1A's positive pole is connected, diode D1A's negative pole meets external voltage V _ OUT, triode Q1B's collecting electrode meets power supply voltage VCC, triode Q1B's projecting pole with diode D1B's positive pole is connected, diode D1B's negative pole meets internal voltage V _ IN.
3. The ORing MOSFET control circuit of claim 2, wherein: the parameters of the diode D1A and the diode D1B are consistent, and the parameters of the triode Q1A and the parameters of the triode Q1B are consistent.
4. The ORing MOSFET control circuit of claim 2, wherein: the resistance voltage-dividing filter circuit comprises a resistor R1, a resistor R2, a resistor R3 and a capacitor C1, one end of the resistor R1 is connected with a power supply voltage VCC, the other end of the resistor R1 is connected with a collector of a triode Q1B, one end of the resistor R2 is connected between collectors of the resistor R1 and the triode Q1B, the other end of the resistor R2 is connected with one end of a resistor R3, one end of the capacitor C1 and the input end of a comparator circuit respectively, the other end of the resistor R3 is connected with an internal voltage V _ IN, and the other end of the capacitor C1 is connected with an internal voltage V _ IN.
5. The ORing MOSFET control circuit of claim 4, wherein: the comparator circuit comprises a comparator U1, a resistor R5, a resistor R6 and a resistor R7, wherein the positive input end of the comparator U1 is connected with the resistor R2 after being connected with the resistor R5, the negative input end of the comparator U1 is connected with the reference voltage VREF after being connected with the resistor R6, the output end of the comparator U1 is connected with the gate of the MOS tube Q2, one end of the resistor R7 is connected with the positive input end of the comparator U1, and the other end of the resistor R7 is connected with the output end of the comparator U1.
6. The ORing MOSFET control circuit of claim 5, wherein: a resistor R8 is connected in series between the output end of the comparator U1 and the gate of the MOS transistor Q2.
7. A power parallel system, characterized by: an ORing MOSFET control circuit as claimed in any of claims 1 to 6.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020938460.XU CN212231329U (en) | 2020-05-28 | 2020-05-28 | ORing MOSFET control circuit and power supply parallel system |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020938460.XU CN212231329U (en) | 2020-05-28 | 2020-05-28 | ORing MOSFET control circuit and power supply parallel system |
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| CN212231329U true CN212231329U (en) | 2020-12-25 |
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| CN202020938460.XU Active CN212231329U (en) | 2020-05-28 | 2020-05-28 | ORing MOSFET control circuit and power supply parallel system |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111600460A (en) * | 2020-05-28 | 2020-08-28 | 顺科电气技术（深圳）有限公司 | ORing MOSFET control circuit and power supply parallel system |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111600460A (en) * | 2020-05-28 | 2020-08-28 | 顺科电气技术（深圳）有限公司 | ORing MOSFET control circuit and power supply parallel system |
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