CN215378754U - Rectification pre-charging control circuit - Google Patents

Abstract

A rectification pre-charging control circuit comprises a control circuit and a rectification circuit, wherein the rectification circuit comprises a rectification bridge, a first capacitor, a PO end and a grounding end; the control circuit comprises a first resistor and a first MOS tube, wherein the first MOS tube comprises a first drain electrode, a first source electrode and a grid electrode; the grid electrode is connected to one end of the first resistor, and the first source electrode and the output negative electrode of the rectifier bridge are connected to the grounding end in parallel; the first drain electrode is connected to one end of the first capacitor; the other end of the first capacitor is connected to the PO end; the first MOS tube is used for limiting the current flowing to the first capacitor. When the circuit is powered on, the current flowing to the first capacitor E1 is gradually increased from zero through the first MOS tube, so that the current limitation of the circuit is realized, the current generated by the circuit at the moment of power-on is prevented from being overlarge, and meanwhile, the current limitation by using the NTC1 resistor and the PTC1 resistor is avoided.

Description

Rectification pre-charging control circuit

Technical Field

The utility model relates to the technical field of a rectifying and charging circuit, in particular to a rectifying and pre-charging control circuit.

Background

Generally, in a rectifying pre-charging circuit, an NTC1 resistor is used to limit an excessive current generated at the moment of circuit power-on, and a current is made to flow through an NTC1 resistor, so that an NTC1 resistor generates heat, the resistance of the NTC1 resistor is reduced due to the NTC1 resistor generating heat, and then the loss of the circuit is reduced along with the reduction of an NTC1 resistor, so as to limit the current at the moment of circuit power-on, however, the method of limiting the current by using an NTC1 resistor has problems: in the case of frequent power-on and power-off of the circuit, the NTC1 has no time for resistive heat to dissipate, so that when the resistance is still low, power-on again may cause the circuit to generate excessive current. At present, another current limiting mode exists, the current is limited through a PTC1 resistor, after a capacitor at the rear stage of a circuit is fully charged, a relay is controlled to short a PTC1 resistor, and current flows through a contact of the relay.

SUMMERY OF THE UTILITY MODEL

In view of the deficiencies of the prior art, it is an object of the present invention to provide a rectifying precharge control circuit.

In order to achieve the above object, the present invention provides a rectification pre-charge control circuit, which comprises a control circuit and a rectification circuit, wherein the rectification circuit comprises a rectification bridge, a first capacitor, a PO terminal and a ground terminal; the control circuit comprises a first resistor and a first MOS tube, wherein the first MOS tube comprises a first drain electrode, a first source electrode and a grid electrode; the grid electrode is connected to one end of the first resistor, and the first source electrode and the output negative electrode of the rectifier bridge are connected to the grounding end in parallel; the first drain electrode is connected to one end of the first capacitor; the other end of the first capacitor is connected to the PO end; the first MOS tube is used for limiting the current flowing to the first capacitor.

Further, the control circuit further comprises a second resistor, wherein one end of the second resistor is connected with the first source electrode in parallel, and the other end of the second resistor is connected with the grid electrode in parallel.

Further, the control circuit further comprises a second diode, wherein the anode of the second diode is connected in parallel with the first source electrode, and the cathode of the second diode is connected in parallel with the grid electrode.

Further, the control circuit further comprises a second capacitor, wherein one end of the second capacitor is connected with the first source electrode in parallel, and the other end of the second capacitor is connected with the grid electrode in parallel.

Further, the rectifying circuit further comprises a first diode, and the negative electrode of the first diode, one end of the first resistor and the other end of the first capacitor are connected to the PO end in parallel.

Further, the rectifier circuit further comprises an inductor, and the inductor is connected between the rectifier bridge and the first diode.

Further, the rectifier circuit further comprises a second MOS tube, the second MOS tube comprises a second source electrode and a second drain electrode, the second drain electrode is connected to the anode of the first diode, and the second source electrode and the output cathode of the rectifier bridge are connected to the grounding end in parallel.

Further, a body diode is preset in the second MOS tube.

Further, a body diode is preset in the first MOS tube.

Further, alternating current is connected to the input side of the rectifier bridge.

The utility model has the beneficial effects that: when the circuit is powered on, the current flowing to the first capacitor E1 is gradually increased from zero through the first MOS tube, so that the current limitation of the circuit is realized, the current generated by the circuit at the moment of power-on is prevented from being overlarge, and meanwhile, the current limitation by using the NTC1 resistor and the PTC1 resistor is avoided.

Drawings

Fig. 1 is a schematic diagram of the present embodiment.

The high-voltage power supply comprises a BR-rectifier bridge, an L-inductor, GND 1-a ground terminal, Q1-a first MOS tube, D11-a first drain electrode, S1-a first source electrode, Q2-a second MOS tube, D2-a second drain electrode, S2-a second source electrode, R1-a first resistor, R2-a second resistor, E1-a first capacitor, C1-a second capacitor, a G-grid electrode, a D1-a first diode and a Z1-a second diode.

Detailed Description

To facilitate an understanding of the utility model, the utility model is described more fully below with reference to the accompanying drawings. Preferred embodiments of the present invention are shown in the drawings. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. These embodiments are provided so that this disclosure will be thorough and complete.

Referring to fig. 1, in the present embodiment, a rectifying pre-charge control circuit includes a control circuit and a rectifying circuit, where the rectifying circuit includes a rectifying bridge BR, an inductor L, a second MOS transistor Q2, a first capacitor E1, a first diode D1, a PO terminal, and a ground terminal GND1, and an input side of the rectifying bridge BR is connected to an alternating current. The second MOS transistor Q2 includes a second drain D2 and a second source S2, and the second drain D2 is connected to the anode of the first diode D1. The rectifying circuit comprises a second capacitor C1, a first resistor R1, a second resistor R2, a second diode Z1 and a first MOS tube Q1, wherein the first MOS tube Q1 comprises a first drain D11, a first source S1 and a gate G. The output positive electrode of the rectifier bridge BR is connected to one end of the inductor L. The other end of the inductor L and the anode of the first diode D1 are connected to the first drain D11. The first source S1, the second source S2, the cathode of the output of the rectifier bridge BR, one end of the second resistor R2, one end of the second capacitor C1, the anode of the second diode Z1, and the first drain D11 of the first MOS transistor Q1 are connected to the ground GND 1. One end of the first resistor R1, the other end of the second resistor R2, the other end of the second capacitor C1, and the other end of the second diode Z1 are connected to the gate G. The first drain D11 is connected to one end of the first capacitor E1; the other end of the first capacitor E1, one end of the first resistor R1, and the cathode of the first diode D1 are connected to the PO terminal.

In this embodiment, when the circuit is powered on, a current flows to the second capacitor C1 and the gate G through the first resistor R1, the second capacitor C1 is charged, and the capacitor between the first source S1 and the gate G is charged, so that the voltage between the first source S1 and the gate G gradually increases, at this time, the first drain D11 and the first source S1 are disconnected, and the first MOS transistor Q1 is in an off state. When the voltage between the first source S1 and the gate G rises to the threshold of the turn-on voltage of the first MOS transistor Q1, the first MOS transistor Q1 enters a linear amplification state, at which time, a current can flow from the first drain D11 to the first source S1, and the first drain D11 and the first source S1 are equivalent to a variable resistor with a large resistance, so that the current between the first drain D11 and the first source S1 is small, the current flowing to the first capacitor E1 is small, and the charging speed of the first capacitor E1 is slow. Further, when the voltage between the first source S1 and the gate G continues to increase after reaching the turn-on voltage of the first MOS transistor Q1, at this time, the resistance between the first drain D11 and the first source S1 decreases with the increase of the voltage between the first source S1 and the gate G, so that the current between the first drain D11 and the first source S1 increases, that is, the current flowing to the first capacitor E1 increases, so that the charging speed of the first capacitor E1 increases.

In this embodiment, when the voltage of the second capacitor C1 increases to equal to Vpo × R2/(R1 + R2), the voltage between the first source S1 and the gate G increases to the saturation turn-on voltage of the first MOS transistor Q1, and the first MOS transistor Q1 enters the saturation turn-on state, at which time, the resistance between the first drain D11 and the first source S1 decreases to the minimum, so that the current flowing to the first capacitor E1 increases to the maximum current value of the first capacitor E1, and the charging speed of the first capacitor E1 increases to the maximum. The current flowing to the first capacitor E1 is gradually increased from zero through the first MOS tube, so that the current limitation of the circuit is realized, and the current generated at the moment of power-on of the circuit is prevented from being overlarge. In this embodiment, Vpo is the voltage at the PO terminal.

In this embodiment, when the circuit is powered off when the charging speed of the first capacitor E1 reaches a maximum, the voltage Vpo at the PO terminal decreases continuously, and the voltage between the first source S1 and the gate G decreases correspondingly with the decrease of Vpo, so that the first MOS transistor Q1 enters a linear amplification state from a saturation conduction state, and then the first MOS transistor Q1 enters a cut-off state from the linear amplification state.

In this embodiment, the second MOS transistor Q2 and the first MOS transistor Q1 are both mosfets 1T, and belong to the existing common electronic components. In this embodiment, the body diodes are preset in both the second MOS transistor Q2 and the first MOS transistor Q1.

In the present embodiment, the voltage between the first source S1 and the gate G is prevented from exceeding the maximum voltage that the first MOS transistor Q1 can bear by the second diode Z1.

In the embodiment, the first MOS transistor Q1 may be replaced by an IGBT transistor, which belongs to the existing common electronic components; the IGBT tube comprises a gate electrode, an emitting electrode and a collecting electrode, wherein when the IGBT tube replaces the first MOS tube Q1, the gate electrode of the IGBT tube corresponds to the gate electrode G, the emitting electrode of the IGBT tube corresponds to the first drain electrode D11, and the collecting electrode of the IGBT tube corresponds to the first source electrode S1.

The above-described embodiments are merely preferred embodiments of the present invention, which is not intended to limit the present invention in any way. Those skilled in the art can make many changes, modifications, and equivalents to the embodiments of the utility model without departing from the scope of the utility model as set forth in the claims below. Therefore, equivalent changes made according to the spirit of the present invention should be covered within the protection scope of the present invention without departing from the contents of the technical scheme of the present invention.

Claims (10)

1. The utility model provides a rectification precharge control circuit, is including control circuit and rectifier circuit, wherein, rectifier circuit includes rectifier bridge, first electric capacity, PO end and earthing terminal, its characterized in that: the control circuit comprises a first resistor and a first MOS tube, wherein the first MOS tube comprises a first drain electrode, a first source electrode and a grid electrode; the grid electrode is connected to one end of the first resistor, and the first source electrode and the output negative electrode of the rectifier bridge are connected to the grounding end in parallel; the first drain electrode is connected to one end of the first capacitor; the other end of the first capacitor is connected to the PO end; the first MOS tube is used for limiting the current flowing to the first capacitor.

2. A rectifying precharge control circuit as claimed in claim 1, wherein: the control circuit further comprises a second resistor, wherein one end of the second resistor is connected with the first source electrode in parallel, and the other end of the second resistor is connected with the grid electrode in parallel.

3. A rectifying precharge control circuit as claimed in claim 1, wherein: the control circuit further comprises a second diode, wherein the anode of the second diode is connected with the first source electrode in parallel, and the cathode of the second diode is connected with the grid electrode in parallel.

4. A rectifying precharge control circuit as claimed in claim 1, wherein: the control circuit further comprises a second capacitor, wherein one end of the second capacitor is connected with the first source electrode in parallel, and the other end of the second capacitor is connected with the grid electrode in parallel.

5. A rectifying precharge control circuit as claimed in claim 1, wherein: the rectifying circuit further comprises a first diode, and the negative electrode of the first diode, one end of the first resistor and the other end of the first capacitor are connected to the PO end in parallel.

6. A rectifying precharge control circuit as claimed in claim 5, wherein: the rectifier circuit further comprises an inductor, and the inductor is connected between the rectifier bridge and the first diode.

7. A rectifying precharge control circuit as claimed in claim 5, wherein: the rectifier circuit further comprises a second MOS tube, the second MOS tube comprises a second source electrode and a second drain electrode, the second drain electrode is connected to the anode of the first diode, and the second source electrode and the output cathode of the rectifier bridge are connected to the grounding end in parallel.

8. A rectifying precharge control circuit as claimed in claim 7, wherein: and a body diode is preset in the second MOS tube.

9. A rectifying precharge control circuit as claimed in claim 1, wherein: and a body diode is preset in the first MOS tube.

10. A rectifying precharge control circuit as claimed in claim 1, wherein: and the input side of the rectifier bridge is connected with alternating current.

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