CN211929505U

CN211929505U - Crystalline silicon solar cell

Info

Publication number: CN211929505U
Application number: CN202020027708.7U
Authority: CN
Inventors: 周公庆; 姚骞; 张家峰; 吴帅; 赵沙桐; 王秀鹏
Original assignee: Tongwei Solar Meishan Co Ltd
Current assignee: Tongwei Solar Meishan Co Ltd
Priority date: 2020-01-07
Filing date: 2020-01-07
Publication date: 2020-11-13
Anticipated expiration: 2030-01-07

Abstract

The utility model relates to a crystalline silicon solar cell. The method for manufacturing the crystalline silicon solar cell comprises the steps of groove type alkali texturing and is completed by utilizing a texturing groove with a stirring mechanism, wherein the stirring mechanism works continuously in the texturing step to uniformly stir texturing liquid in the texturing groove, each P-type silicon wafer is reduced by 0.9-1.1 g in the texturing step, and the reflectivity of the P-type silicon wafer is 9-12%. The utility model discloses a manufacturing approach that crystalline silicon solar wafer corresponds has optimized basic back of the body polishing process flow, reduces the unit consumption, and cost reduction, and because basic texturing groove is provided with stirring function, can accelerate solution circulation, and the silicate that reduces the texturing and generate is attached to the matte surface, so can guarantee that the matte is more even. Therefore, the texture of the crystalline silicon solar cell prepared by the process is uniform, the weight is light and the performance is excellent.

Description

Crystalline silicon solar cell

Technical Field

The utility model relates to an energy field especially relates to a crystalline silicon solar cell piece.

Background

With the increasing consumption of conventional fossil energy such as global coal, oil, natural gas and the like, the ecological environment is continuously deteriorated, and particularly, the sustainable development of the human society is seriously threatened due to the increasingly severe global climate change caused by the emission of greenhouse gases. Various countries in the world make respective energy development strategies to deal with the limitation of conventional fossil energy resources and the environmental problems caused by development and utilization. Solar energy has become one of the most important renewable energy sources by virtue of the characteristics of reliability, safety, universality, long service life, environmental protection and resource sufficiency, and is expected to become a main pillar of global power supply in the future.

In a new energy revolution process, the photovoltaic industry in China has grown into a strategic emerging industry with international competitive advantages. However, the development of the photovoltaic industry still faces many problems and challenges, and the conversion efficiency and reliability are the biggest technical obstacles restricting the development of the photovoltaic industry, while the cost control and the scale-up are economically restricted.

At present, the most cell type in the industry is an SE-PERC solar cell, and the size is between 156 and 158mm, so that many process flows aim at cells with the size of 156 and 158 mm. However, according to the development of market conditions, in order to save silicon materials, reduce the unit consumption of silicon wafers and manufacture battery pieces more suitable for cutting, 166mm or even 210mm or more batteries are developed in the future, and even larger batteries are about to become the most mainstream battery piece type in the industry.

The current main single crystal cell production process is basically an SE + PERC cell structure, and the front laser heavy doping technology (SE) and the local contact back passivation technology (PERC) are combined, so that the efficiency of the solar cell is greatly improved. The existing cell preparation method of the SE + PERC superposition back polishing process is divided into two methods, one is an acid etching preparation method, and the other is an alkali etching method. In the preparation process of the SE + PERC battery, the efficiency of the SE + PERC battery is influenced by the etching and polishing method; although the acid polishing process is simple, the reflectivity is low, the light projection loss is large, and the conversion efficiency is low; alkaline polishing, while achieving an increase in back reflectance through alkaline polishing, does not significantly increase solar cell conversion efficiency.

On the other hand, for large-size batteries, higher requirements are put forward for each process, not only the equal-scale enlargement of a tool clamp, but also the existing processing process cannot meet the requirements for manufacturing high-quality large-size batteries. In particular, the large area of the wafer makes it difficult to achieve uniform temperatures at the edge and the center, so that the temperature-affected processes are severely affected. The large-size silicon wafers are transversely arranged, and gaps are deeper, so that the results of over-high edge concentration and over-low center concentration are also generated in various source diffusion processes, and the source concentration balance is not easy to achieve. Moreover, large-sized silicon wafers are more prone to warping, abrasion and contamination in the work station, in the furnace tube and on the conveying rail, so that the overall electrical performance and appearance are also affected by the factors. In fact, large size cells also require larger size stations and chambers to meet the required vacuum, uniformity, and ramp-up and ramp-down rates.

There is therefore a need to provide a crystalline silicon solar cell to at least partially solve the above problems.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to provide a crystalline silicon solar cell, this crystalline silicon solar cell's manufacturing method has optimized basic back of the body polishing process flow, reduces the unit consumption, and cost reduction, and because basic flocking groove is provided with the stirring function, can accelerate the solution circulation, and the silicate that reduces the flocking and generate is attached to the matte surface, so can guarantee that the matte is more even. Therefore, the texture of the crystalline silicon solar cell prepared by the process is uniform, the weight is light and the performance is excellent.

And in the corresponding manufacturing method of the crystalline silicon solar cell, the acid discharge amount is extremely low, and the environmental protection discharge requirement is met more.

Additionally, the utility model discloses still provide a great deal of preferred setting in other each item processes, the conversion efficiency that the homoenergetic promoted jumbo size crystalline silicon solar cell piece, optimize its performance.

According to the utility model discloses an aspect provides a crystalline silicon solar wafer.

In one embodiment, the size of the crystalline silicon solar cell sheet is 166mm or more, and the crystalline silicon solar cell sheet includes:

the top surface of the P-type silicon wafer is a pyramid suede, and the bottom surface of the P-type silicon wafer is a polished plane;

a phosphorus diffusion layer on the top surface of the P-type silicon wafer;

a silicon oxide layer on a top surface of the phosphorus diffusion layer;

an antireflective film on a top surface of the silicon oxide layer;

the passivation layer is positioned on the bottom surface of the P-type silicon wafer;

an aluminum back field on a bottom surface of the passivation layer;

the top surface grid line is arranged at the top surface of the crystalline silicon solar cell and burns through the antireflection film and the silicon oxide layer and is in direct contact with the phosphorus diffusion layer.

In one embodiment, the phosphorus diffusion layer has a sunken SE laser drive-in region having a sheet resistance of 65 Ω/□ -85 Ω/□.

In one embodiment, the antireflective film is a laminated layer of a silicon oxynitride layer and a silicon nitride layer, the antireflective film has a thickness of 71-80nm, and the antireflective film has a refractive index of 2% -2.5%.

In one embodiment, the passivation layer is a stack of an aluminum oxide layer and a silicon nitride layer, and the thickness of the passivation layer is 110nm to 140 nm.

In one embodiment, the silicon nitride layer is disposed on a bottom surface of the aluminum oxide layer.

In one embodiment, the passivation layer is provided with a laser-machined hole therethrough, a portion of the aluminum back field extending upwardly into the hole.

The utility model discloses a manufacturing approach has optimized basic back of body polishing process flow, reduces the unit consumption, and cost reduction, and because basic texturing groove is provided with stirring function, can accelerate the solution circulation, and the silicate that reduces the texturing and generate is attached to the matte surface, so can guarantee that the matte is more even.

In addition, in the method provided by the utility model, the acid discharge amount is also extremely low, which meets the environmental protection discharge requirement.

Drawings

For a better understanding of the above and other objects, features, advantages and functions of the present invention, reference should be made to the preferred embodiments illustrated in the accompanying drawings. Like reference numerals in the drawings refer to like parts. It will be appreciated by persons skilled in the art that the drawings are intended to illustrate preferred embodiments of the invention without any limiting effect on the scope of the invention, and that the various components in the drawings are not to scale.

Fig. 1 to 12 are schematic diagrams of a solar cell during a manufacturing method corresponding to a crystalline silicon solar cell according to a preferred embodiment of the present invention, wherein fig. 12 is a schematic diagram of the crystalline silicon solar cell according to the preferred embodiment.

Detailed Description

Referring now to the drawings, specific embodiments of the present invention will be described in detail. What has been described herein is merely a preferred embodiment in accordance with the present invention, and those skilled in the art will appreciate that other ways of implementing the present invention on the basis of the preferred embodiment will also fall within the scope of the present invention.

The utility model provides a method for manufacturing a crystalline silicon solar cell and the crystalline silicon solar cell. Fig. 1 to 12 are schematic cross-sectional views of a crystalline silicon solar cell in a manufacturing process. The steps of the manufacturing method of a preferred embodiment of the present invention will be described below with reference to fig. 1 to 12.

The manufacturing method may include steps S1-S12. Fig. 1 to 12 correspond to the solar cell after steps S1 to S12 are completed, respectively.

The step S1 is a step of setting the P-type silicon wafer 4, and the P-type silicon wafer 4 is a P-type silicon wafer having a size of 166mm, preferably a size of 210mm or more.

Step S2 is a step of texturing the P-type silicon wafer 4, in which the texturing step is performed by a groove-type alkali texturing and is performed by a texturing groove having a stirring mechanism, and the stirring mechanism is continuously operated to uniformly stir the texturing solution in the texturing groove in the texturing step. The special cleaning tank body with stirring function is adopted in the texturing step, and special proportion is adopted, so that the circulation of the solution can be accelerated, the adhesion of silicate generated by texturing on the surface of the textured surface is reduced, and the textured surface can be ensured to be more uniform. The texturing step makes each P-type silicon wafer 4 lose weight by 0.9g-1.1g (more preferably, each piece loses weight by 0.9g-1g), and makes the reflectivity of the P-type silicon wafer 4 be 9% -12% (more preferably, the reflectivity is 10% -11%). The reflectivity of the P-type silicon wafer 4 after texturing is controlled, so that the reflectivity of the solar cell to sunlight can be controlled in the later period, the sunlight absorption rate of the solar cell is effectively increased, and the conversion efficiency of the solar cell is improved. After texturing, a pyramid textured surface 41 shown in fig. 2 can be formed on the P-type silicon wafer 4.

Step S3 is: phosphorus-containing vapor is introduced into the P-type silicon wafer 4 through a plurality of phosphorus source inlets to effect phosphorus diffusion to produce the phosphorus diffusion layer 3. Preferably, the number of the phosphorus source inlets is two or three, and each phosphorus source inlet has an independent flow control mechanism and a temperature control mechanism. More preferably, in the process of phosphorus diffusion, the flow rate of the phosphorus-containing vapor corresponding to each phosphorus source inlet is gradually changed, and the temperature of the phosphorus-containing vapor corresponding to each phosphorus source inlet is gradually increased, so that the diffused sheet resistance can be more uniform by means of gradual source opening and gradual temperature rise. After the step is finished, the sheet resistance of the P-type silicon chip 4 is 130 omega/□ -180 omega/□, and the sheet resistance is more preferably 160 omega/□ -170 omega/□. The surface sheet resistance of the P-type silicon chip 4 is improved, the surface doping concentration can be reduced, the short wave effect of the battery can be improved, the short circuit current is improved, the dark saturation current caused by surface recombination can be reduced, the open-circuit voltage is increased, and the battery performance is optimized. In general, each item of setting of this step can avoid appearing the too big phenomenon of edge and the too big difference of center sheet resistance of solar wafer, can guarantee that final junction depth and surface concentration are more even, avoids marginal contact resistance too big, improves the electrical property of solar wafer.

Step S4 is: laser drive-in (i.e., SE process) is performed on a specific region (i.e., SE laser drive-in region 8) of the top surface of the P-type silicon wafer 4, and the difference in the sheet resistance of the specific region from the other regions is 65 Ω/□ to 85 Ω/□, preferably 70 Ω/□ to 80 Ω/□. Laser drive-in (namely laser doping) improves the doping concentration of the electrode area, reduces ohmic contact between the grid line and the silicon wafer, and further improves the filling factor. The sheet resistance of the specific area can improve the conversion efficiency of the solar cell in the range.

Step S5 is: the P-type silicon wafer 4 is chain annealed using a chain furnace with pure oxygen as the oxidation source to grow an oxide layer (e.g., silicon oxide layer 2) having a thickness of 0.5nm to 3nm, more preferably 2nm to 3nm, on the top and bottom surfaces of the P-type silicon wafer 4. In the step, the laser driving procedure is used for covering and protecting the scratch laser line made on the surface of the phosphorosilicate glass by a thin silicon oxide layer.

Step S6 is: and a chain cleaning step, wherein the oxidation layer and the diffusion layer on the top surface of the P-type silicon wafer 4 are protected by a water film, and the bottom surface of the P-type silicon wafer 4 is subjected to acid corrosion to remove phosphosilicate glass and the oxidation layer on the bottom surface of the P-type silicon wafer 4.

Step S7 is: and polishing the back surface of the P-type silicon wafer 4 by adopting a groove type cleaning machine and alkali and additives to remove a phosphosilicate glass layer and an oxide layer on the top surface of the P-type silicon wafer 4, so that each P-type silicon wafer 4 is reduced by 0.3g-0.45g, and the reflectivity of the P-type silicon wafer 4 is 42% -48%. Preferably, the additive is potassium hydroxide solution, and the mass concentration of the potassium hydroxide solution is 5% -20%, preferably 10% -20%. The potassium hydroxide solution has strong alkalinity and more obvious polishing effect. The reflectivity of the P-type silicon wafer 4 after the step is 43-47%, and the weight loss is 0.3-0.45 g/wafer. The alkali polishing can effectively improve the reflectivity of the back of the P-type silicon wafer 4, so that the long-wave-band transmissivity is obviously reduced, the light transmission loss is reduced, the short-circuit current is increased, and the conversion efficiency of the solar cell is improved. Preferably, the oxide layers on the top and bottom surfaces of the P-shaped silicon wafer are all washed away after polishing using a hydrofluoric acid rinse.

Step S8 is: the top surface of the P-type silicon wafer 4 is subjected to a tube-type high-temperature anneal to form an oxide layer (e.g., silicon oxide layer 2) having a thickness of 1-5nm, more preferably 2-4 nm. The annealing temperature is controlled between 500 ℃ and 780 ℃, and is preferably controlled between 550 ℃ and 700 ℃. The top surface of the P-type silicon wafer 4 can be effectively oxidized in the annealing process to play a role in passivation, so that the junction area recombination can be reduced, the open-circuit voltage can be improved, the product yield can be improved, and the good PID resistance effect can be achieved.

Step S9 is: and generating a passivation layer 56 on the bottom surface of the P-type silicon wafer 4 by using a plasma chemical vapor deposition method, wherein the passivation layer is a lamination of an aluminum oxide layer 5 and a silicon nitride layer 6, and the thickness of the passivation layer 56 is 110nm-140 nm. In the step, the laminated passivation of aluminum oxide and silicon nitride is used, so that the passivation effect (670-. Preferably, the refractive index of the silicon nitride can be gradually changed to achieve the effect of lower light attenuation. Meanwhile, the step can also reduce the back recombination of the silicon wafer, improve the open-circuit voltage and improve the conversion efficiency of the solar cell. The passivation process of the step adopts a multilayer gradual change passivation layer process, and the problem of the difference of the film thickness of the edge and the inner film thickness of the P-type silicon wafer 4 can be solved.

Step S10 is: generating an anti-reflection film 1 on the top surface of the P-type silicon wafer 4 by using a plasma chemical vapor deposition method, wherein the anti-reflection film 1 is a laminated layer of a silicon oxynitride layer and a silicon nitride layer, the thickness of the anti-reflection film 1 is 71-80nm, and the refractive index of the anti-reflection film 1 is 2% -2.5%. The top surface antireflection film can effectively improve the absorption rate of solar energy and improve the conversion efficiency of the solar cell.

Step S11 is: and (3) opening the passivation layer 56 on the bottom surface of the P-type silicon wafer 4 by using laser to form a hole 561 penetrating through the passivation layer 56, so as to realize aluminum-silicon ohmic contact. The size of the hole-forming light spot is 25-32 μm, the hole-forming rate is 1-3%, and the laser lines are parallel to each other or staggered with each other during the laser hole-forming process.

Step S12 is: a step of printing electrodes and a sintering step to form a back electrode, an aluminum back field 10 and top surface grid lines 7 on the P-type silicon wafer 4. Preferably, the sintering temperature is from 250 ℃ to 900 ℃, more preferably from 300 ℃ to 850 ℃. The step of printing the electrodes is preferably performed by using a screen suitable for a large-sized solar cell, and drying the screen after printing.

It can be seen that a plurality of oxidation steps are included in the above step, and preferably, the respective oxidation steps have oxidation parameters different from each other, the oxidation parameters including oxidation time, oxygen content of the introduced fluid, flow rate and flow velocity of the introduced oxygen-containing fluid. Due to the arrangement, impurities and defects close to the surface in the P-type silicon wafer can be fully passivated and adsorbed, and the silicon dioxide layer grown on the basis can fully realize the permeation of the blocking component EVA or other cross-linked materials into the silicon wafer, so that a better PID (proportion integration differentiation) resistant effect is achieved.

The steps fully consider to reduce the use amount of nitric acid and fluoric acid, and compared with the conventional acid etching, the method can greatly reduce the discharge of waste acid containing nitrogen and fluorine, reduce the treatment difficulty of peripheral waste acid and reduce the pollution to the environment.

It should be noted that "subsequent processing steps" mentioned herein actually include S3-S12, and the order of S3 and S12 may be implemented in the order of the present embodiment, or may be scrambled as necessary. In other embodiments, the subsequent processing steps may also include other steps.

Fig. 12 in fact also shows a crystalline silicon solar cell according to a preferred embodiment of the invention, having a size greater than 166mm, preferably greater than 210 mm. The crystalline silicon solar cell can be manufactured by the production process.

Referring to fig. 12, the crystalline silicon solar cell includes a P-type silicon wafer 4, a phosphorus diffusion layer 3, a silicon oxide layer 2, an antireflective film 1, a passivation layer, an aluminum back field 10, and a top surface grid line 7.

Wherein, the top surface of the P-type silicon chip 4 is a pyramid suede generated by texturing, and the bottom surface is a plane formed by polishing; the phosphorus diffusion layer 3 is located on the top surface of the P-shaped silicon wafer and preferably has a sunken SE laser drive-in region 8; a silicon oxide layer 2 on the top surface of the phosphorus diffusion layer 3; the antireflective film 1 is located on the top surface of the silicon oxide layer 2, and the antireflective film 1 is preferably a stack of a silicon oxynitride layer and a silicon nitride layer; a passivation layer 56 is located on the bottom surface of the P-shaped silicon wafer 4 and is preferably a stack 6 of an aluminum oxide layer 5 and a silicon nitride layer, with the silicon nitride layer 6 preferably located on the bottom surface of the aluminum oxide layer 5; the aluminum back field 10 is located on the bottom surface of the passivation layer 56; the top surface grid lines 7 are disposed at the top surface of the crystalline silicon solar cell sheet and the top surface grid lines 7 burn through the antireflective film 1 and the silicon oxide layer 2 to directly contact the phosphorus diffusion layer 3.

Preferably, the passivation layer 56 is provided with a laser-machined hole 561 therethrough, into which hole 561 a portion 9 of the aluminum back field extends upwardly.

According to the utility model discloses, manufacturing method has optimized basic back of body polishing process flow, reduces the unit consumption, and cost reduction, and sour emission is also extremely low moreover, accords with the environmental protection and discharges the requirement more.

The basic texturing groove has a stirring function, so that the circulation of the solution can be accelerated, the adhesion of silicate generated by texturing on the surface of the textured surface is reduced, and the textured surface can be ensured to be more uniform.

The foregoing description of various embodiments of the invention is provided to one of ordinary skill in the relevant art for the purpose of illustration. It is not intended to be exhaustive or to limit the invention to the precise form disclosed. As noted above, various alternatives and modifications of the present invention will be apparent to those skilled in the art of the above teachings. Thus, while some alternative embodiments are specifically described, other embodiments will be apparent to, or relatively easily developed by, those of ordinary skill in the art. The present invention is intended to embrace all such alternatives, modifications and variances of the present invention described herein, as well as other embodiments that fall within the spirit and scope of the present invention as described above.

Reference numerals:

antireflection film 1

Silicon oxide layer 2

Phosphorus diffusion layer 3

P-type silicon wafer 4

Pyramid matte 41

Passivation layer 56

Hole 561

Alumina layer 5

Silicon nitride layer 6

Top surface grid lines 7

SE laser drive-in region 8

Aluminum back surface field 10

A portion 9 of the aluminum back field

Claims

1. A crystalline silicon solar cell, characterized in that the size of the crystalline silicon solar cell is 166mm or more, and the crystalline silicon solar cell comprises:

a phosphorus diffusion layer on the top surface of the P-type silicon wafer;

a silicon oxide layer on a top surface of the phosphorus diffusion layer;

an antireflective film on a top surface of the silicon oxide layer;

an aluminum back field on a bottom surface of the passivation layer;

2. The crystalline silicon solar cell of claim 1, wherein the phosphorus diffusion layer has a sunken SE laser drive-in region having a sheet resistance of 65 Ω/□ -85 Ω/□.

3. The crystalline silicon solar cell as claimed in claim 1, wherein the antireflective film is a lamination of a silicon oxynitride layer and a silicon nitride layer, the antireflective film has a thickness of 71-80nm, and the refractive index of the antireflective film is 2-2.5%.

4. The crystalline silicon solar cell of claim 1, wherein the passivation layer is a stack of an aluminum oxide layer and a silicon nitride layer, and the thickness of the passivation layer is 110nm-140 nm.

5. The crystalline silicon solar cell of claim 4, wherein the silicon nitride layer is disposed on a bottom surface of the aluminum oxide layer.

6. The crystalline silicon solar cell of claim 1, wherein the passivation layer is provided with a laser-machined hole therethrough, a portion of the aluminum back field extending upwardly into the hole.