CN211700252U - Insulated gate bipolar transistor device and semiconductor chip - Google Patents
Insulated gate bipolar transistor device and semiconductor chip Download PDFInfo
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- CN211700252U CN211700252U CN202020415276.7U CN202020415276U CN211700252U CN 211700252 U CN211700252 U CN 211700252U CN 202020415276 U CN202020415276 U CN 202020415276U CN 211700252 U CN211700252 U CN 211700252U
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Abstract
The utility model relates to an insulated gate bipolar transistor device and a semiconductor chip, which comprises a bottom plate, at least two direct copper-clad base plates, at least two insulated gate bipolar transistor chips and at least two diode chips; the direct copper-clad substrates are arranged on the bottom plate, and each direct copper-clad substrate is at least provided with an insulated gate bipolar transistor chip and a diode chip; the diode chips are oppositely arranged, and the insulated gate bipolar transistor chips and the diode chips on the at least two directly-copper-clad substrates are arranged in a mirror image manner; insulation grooves are formed in the peripheries of the insulated gate bipolar transistor chip and the diode chip on the copper-clad substrate directly, so that heat dissipation areas between the insulated gate bipolar transistor chip and the diode chip and the insulation grooves are divided, and the width of the heat dissipation area between the insulated gate bipolar transistor and the diode chip is larger than a preset width. The insulated gate bipolar transistor device and the semiconductor chip have good heat dissipation performance.
Description
Technical Field
The utility model relates to a semiconductor package technical field especially relates to an insulated gate bipolar transistor device and semiconductor chip.
Background
Among semiconductor chips, high power Insulated Gate Bipolar Transistor (IGBT) chips are increasingly widely used. Since the temperature of the semiconductor chip of the IGBT chip with high power density is increased if the IGBT chip cannot dissipate heat in time, when the semiconductor chip continuously operates in a high temperature environment, the insulating ability of the semiconductor chip is weakened, and the internal structure material is aged, thereby affecting the normal use of the device, and even causing the device to malfunction, it is very necessary to design a higher-thermal-performance insulated gate bipolar transistor device in a limited space laid on a Direct Bonded Copper (DBC) substrate of the semiconductor chip.
However, the conventional igbt device including the igbt chip has poor heat dissipation performance due to the unreasonable layout on the copper-clad substrate, which easily causes the semiconductor chip on which the igbt device is located to be damaged when the process parameters or the use environment are unreasonable.
SUMMERY OF THE UTILITY MODEL
In view of the above, it is desirable to provide an insulated gate bipolar transistor device and a semiconductor chip.
An insulated gate bipolar transistor device comprises a bottom plate, at least two substrates directly coated with copper, at least two insulated gate bipolar transistor chips and at least two diode chips;
the direct copper-clad substrates are arranged on the bottom plate, and each direct copper-clad substrate is at least provided with one insulated gate bipolar transistor chip and one diode chip; the diode chips on the at least two directly copper-clad substrates are oppositely arranged, and the insulated gate bipolar transistor chips and the diode chips on the at least two directly copper-clad substrates are arranged in a mirror image manner;
the direct copper-clad substrate comprises a direct copper-clad substrate, an insulated gate bipolar transistor chip and a diode chip, wherein an insulated groove is formed in the peripheries of the insulated gate bipolar transistor chip and the diode chip on the direct copper-clad substrate to divide a heat dissipation area between the insulated gate bipolar transistor chip and the diode chip and the insulated groove, the direct copper-clad substrate is exposed in the heat dissipation area, and the width of the heat dissipation area between the insulated gate bipolar transistor and the diode chip is larger than a preset width.
In one embodiment, the preset width is greater than or equal to 3 mm.
In one embodiment, the insulated gate bipolar transistor device further comprises a connecting bridge arranged between the at least two directly copper-clad substrates;
for the at least two directly copper-clad substrates, a signal terminal area is arranged between the insulation groove and the edge of the directly copper-clad substrate on one of the directly copper-clad substrates; the signal terminals on the at least two directly copper-clad substrates are connected through the connecting bridge and gathered to the signal terminal area.
In one embodiment, the signal terminal region is disposed opposite to both the insulated gate bipolar transistor chip and the diode chip on the direct copper clad substrate.
In one embodiment, for the at least two directly copper-clad substrates, a power terminal area is arranged between the insulation groove and the edge of the directly copper-clad substrate on the directly copper-clad substrate where the signal terminal area is not arranged, and the power terminal is arranged opposite to the signal terminal area;
and the power terminals on the at least two directly copper-clad substrates are connected through the connecting bridge and gathered to the power terminal area.
In one embodiment, for the at least two directly copper-clad substrates, a reserved area is further arranged between the insulation groove and the edge of the directly copper-clad substrate on the directly copper-clad substrate provided with the power terminal area;
the reserved area is arranged on one side, far away from the signal terminal area, of the power terminal area, and the reserved area and the insulated gate bipolar transistor chip are arranged oppositely.
In one embodiment, at least one top corner of the direct copper-clad substrate is chamfered.
In one embodiment, the chamfers of the at least two direct copper clad substrates are mirror images.
In one embodiment, the number of the direct copper-clad substrates, the number of the insulated gate bipolar transistor chips and the number of the diode chips are two, and the insulated gate bipolar transistor chips and the diode chips respectively positioned on the two direct copper-clad substrates form a half-bridge circuit.
A semiconductor chip comprising an insulated gate bipolar transistor device as claimed in any preceding claim.
The insulated gate bipolar transistor device comprises a bottom plate, at least two direct copper-clad substrates arranged on the bottom plate, at least two insulated gate bipolar transistor chips and at least two diode chips, wherein each direct copper-clad substrate is at least provided with one insulated gate bipolar transistor chip and one diode chip, the diode chips on the at least two copper-clad substrates are oppositely arranged, and the insulated gate bipolar transistor chips and the diode chips are arranged in a mirror image mode. Insulating grooves are formed outside the insulated gate bipolar transistor chip and the diode chip on the direct copper-clad substrate to divide a heat dissipation area which is located between the insulated gate bipolar transistor chip and the diode chip and the insulating grooves and exposes the direct copper-clad substrate, and a copper-clad surface of the heat dissipation area is more favorable for heat dissipation, so that the heat dissipation performance of the insulated gate bipolar transistor device is improved; meanwhile, the width of the heat dissipation area between the insulated gate bipolar transistor and the diode chip is limited to be larger than the preset width, so that the heat coupling between the insulated gate bipolar type chip and the diode chip is reduced, and the heat dissipation performance of the insulated gate bipolar transistor module is further improved. Even if the temperature of the insulated gate bipolar transistor chip is increased due to unreasonable process parameters or unreasonable use environment, the semiconductor chip containing the insulated gate bipolar transistor module is not easy to damage due to good heat dissipation performance of the insulated gate bipolar transistor device.
Drawings
Fig. 1 is a perspective view of an igbt device according to an embodiment.
Fig. 2 is a top view of an insulated gate bipolar transistor device in one embodiment.
Fig. 3 is a circuit diagram of a half-bridge circuit in an embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
In the description of the present application, it is to be understood that the terms "center", "lateral", "upper", "lower", "left", "right", "vertical", "horizontal", "top", "bottom", "inner" and "outer" etc. indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience in describing the present application and simplifying the description, but do not indicate or imply that the referred device or element must have a particular orientation, be constructed in a particular orientation, and be operated, and thus should not be construed as limiting the present application. Further, when an element is referred to as being "formed on" another element, it can be directly connected to the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" another element, there are no intervening elements present.
Among semiconductor chips, high power Insulated Gate Bipolar Transistor (IGBT) chips are increasingly widely used. Since the temperature of the semiconductor chip of the IGBT chip with high power density is increased if the IGBT chip cannot dissipate heat in time, when the semiconductor chip continuously operates in a high temperature environment, the insulating ability of the semiconductor chip is weakened, and the internal structure material is aged, thereby affecting the normal use of the device, and even causing the device to malfunction, it is very necessary to design a higher-thermal-performance insulated gate bipolar transistor device in a limited space laid on a Direct Bonded Copper (DBC) substrate of the semiconductor chip.
However, the conventional igbt device including the igbt chip has poor heat dissipation performance due to the unreasonable layout on the copper-clad substrate, which easily causes the semiconductor chip on which the igbt device is located to be damaged when the process parameters or the use environment are unreasonable.
The insulated gate bipolar transistor device can be reasonably distributed on a direct copper-clad substrate, so that the heat dissipation performance of the insulated gate bipolar transistor device is enhanced, and a semiconductor chip containing the insulated gate bipolar transistor device is not easy to damage even if the temperature of the insulated gate bipolar transistor chip rises when the process parameters or the use environment are unreasonable.
Fig. 1 is a perspective view of an igbt device according to an embodiment. Fig. 2 is a top view of an insulated gate bipolar transistor device in one embodiment. As shown in fig. 1 and 2, the igbt device 100 includes a base plate 110, at least two directly copper-clad substrates 120, at least two igbt chips 130, and at least two diode chips 140.
The substrate 110 may be made of a substrate material of a conventional semiconductor chip, such as a silicon material. The direct copper-clad substrate 120 is disposed on the base plate 110, and the direct copper-clad substrate 120 may be soldered on the base plate 110 using solder paste. For example, the direct copper-clad substrate 120 may be a ceramic copper-clad plate, and the size of the direct copper-clad substrate 120 may be 34mm, and the side opposite to the base plate 110 is a ceramic insulating layer, and the side away from the base plate 110 is a copper conductive layer or a copper alloy conductive layer.
At least one igbt chip 130 and one diode chip 140 are disposed on each of the directly copper-clad substrates 120. The diode chip 140 may be a fast recovery diode chip (FRD). The diode chips 140 on the at least two directly copper-clad substrates 120 are oppositely arranged, and the igbt chips 130 and the diode chips 140 on the two directly copper-clad substrates 120 are arranged in a mirror image.
Wherein, the periphery of the insulated gate bipolar transistor chip 130 and the diode chip 140 on the direct copper-clad substrate 120 is provided with an insulation trench 121, for example, the insulation trench 121 is formed by removing the conductive layer on the direct copper-clad substrate 120 and only remaining the insulation layer. The insulation trench 121 divides the heat dissipation region 122 (the region between the dotted lines in fig. 2) between the igbt chip 130 and the diode chip 140 and the insulation trench 121, and no device is provided on the direct copper clad substrate 120 in the heat dissipation region 122 around the igbt chip 130 and in the heat dissipation region 122 around the diode chip 140, thereby exposing the direct copper clad substrate 120. The width d of the heat dissipation region 122 between the igbt 130 and the diode chip 140 is greater than a predetermined width, for example, the predetermined width is greater than or equal to 3mm, and the predetermined width is smaller than or equal to the size of the direct copper-clad substrate 120, for example, the predetermined width is smaller than or equal to 28.6 mm.
It should be noted that the igbt device 100 provided in this embodiment may be compatible with any type of igbt 130 and diode chip 140.
The igbt device 100 includes a base plate 110, at least two directly copper-clad substrates 120 disposed on the base plate 110, at least two igbt chips 130, and at least two diode chips 140, where each directly copper-clad substrate 120 is at least provided with one igbt chip 130 and one diode chip 140, and the diode chips 140 on the at least two directly copper-clad substrates 120 are disposed opposite to each other, and the igbt chips 130 and the diode chips 140 are arranged in a mirror image. Insulating grooves 121 are formed in the peripheries of the insulated gate bipolar transistor chip 130 and the diode chip 140 on the direct copper-clad substrate 120 to divide a heat dissipation area 122, which is located between the insulated gate bipolar transistor chip 130 and the diode chip 140 and the insulating grooves 121 and exposes the direct copper-clad substrate 120, and the copper-clad surface of the heat dissipation area 122 is more favorable for heat dissipation, so that the heat dissipation performance of the insulated gate bipolar transistor device 100 is improved; meanwhile, since the width d of the heat dissipation region 122 between the igbt 130 and the diode chip 140 is limited to be larger than the preset width, the thermal coupling between the igbt 130 and the diode chip 140 is reduced, and the heat dissipation performance of the igbt device 100 is further improved. Even if the temperature of the igbt chip 130 rises due to unreasonable process parameters or operating environments, the semiconductor chip including the igbt device 100 is not easily damaged due to the good heat dissipation performance of the igbt device 100.
In one embodiment, the igbt device 100 further includes a connecting bridge 150 disposed between the at least two directly copper-clad substrates 120. For at least two directly copper-clad substrates 120, a signal terminal area 123 is provided between the insulation groove 121 on one directly copper-clad substrate 120 and the edge of the directly copper-clad substrate 120, the connecting bridge 150 is used for leading out a signal terminal (not shown in fig. 1 and 2) on the other directly copper-clad substrate 120, and the signal terminals on the two directly copper-clad substrates 120 are both connected to the signal terminal area 123. In this embodiment, the signal terminal region 123 may be a collector region of the igbt chip 130.
For example, when the igbt device 100 includes two directly copper-clad substrates 120, the two directly copper-clad substrates 120 may be arranged side by side on the base plate 110, and the distance between the two directly copper-clad substrates 120 may be set according to actual requirements, for example, set to 1 mm. A connecting bridge 150 is provided between the two directly copper-clad substrates 120, and the connecting bridge 150 is used to realize connection between devices on the two directly copper-clad substrates 120, for example, connection of signal terminals. Referring to fig. 2 and 3, the igbt chip 130 includes an igbt chip 131 disposed on the right-side copper-clad substrate 120 and an igbt chip 132 disposed on the left-side copper-clad substrate 120, and the diode chip 140 includes a diode chip 141 disposed on the right-side copper-clad substrate 120 and a diode chip 142 disposed on the left-side copper-clad substrate 120. The signal terminals 6 and 7 of the igbt chip 131 and the diode chip 141 on the right-hand side direct copper-clad substrate 120 are led to the direct copper-clad substrate 120 on the left-hand side via the connecting bridge 150, and the signal terminals 4 and 5 of the igbt chip 132 and the diode chip 142 on the left-hand side direct copper-clad substrate 120 and the signal terminals 6 and 7 of the igbt chip 131 and the diode chip 141 on the right-hand side direct copper-clad substrate 120 are connected to the signal terminal region 123. For example, a signal terminal connection terminal may be provided in the signal terminal region 123, so that an external device may be connected to the signal terminal of each device by being connected to the signal terminal connection terminal on the igbt device 100.
Further, on the direct copper-clad substrate 120 on the left side, the signal terminal region 123 is disposed opposite to both the igbt chip 130 and the diode chip 140, that is, the signal terminal region 123 can ensure a sufficiently large area, so that signal terminal leads of devices on the two direct copper-clad substrates 120 can be accommodated.
In an embodiment, still referring to fig. 2, for at least two of the directly copper-clad substrates 120, a power terminal region 124 is disposed between the insulation trench 121 and the edge of the directly copper-clad substrate 120 on the directly copper-clad substrate 120 where the signal terminal region 123 is not disposed, and the power terminal region 124 is disposed opposite to the igbt chip 130. The connection bridge 150 is also used to lead out power terminals (not shown in fig. 1 and 2) on the direct copper-clad substrate 120 that are not provided with the power terminal area 124, and the power terminals on both direct copper-clad substrates 120 are connected to the power terminal area 124.
Illustratively, in conjunction with fig. 2 and 3, the power terminals 3 of the igbt chip 132 and the diode chip 142 on the left-side copper-directly-coated substrate 120 are led to the right-side copper-directly-coated substrate 120 through the connection bridge 150, and the power terminals 1 and 2 of the igbt chip 131 and the diode chip 141 on the right-side copper-directly-coated substrate 120 and the power terminals 3 of the igbt chip 132 and the diode chip 142 on the left-side copper-directly-coated substrate 120 are connected to the power terminal region 124. For example, power terminal connection terminals may be provided in the power terminal region 124, so that external devices may be connected to the power terminals of the respective devices by connecting to the power terminal connection terminals on the igbt device 100, thereby enabling a reasonable layout of the power terminals of the respective devices on the direct copper-clad substrate 120.
In an embodiment, for at least two directly copper-clad substrates 120, a reserved area 125 is further disposed between the insulating trench 121 and the edge of the directly copper-clad substrate 120 on the directly copper-clad substrate 120 provided with the power terminal area 124, and the reserved area 125 is located between the signal terminal area 123 and the power terminal area 124, so as to leave enough area for welding signal terminals and ensure that the wire bonding of the gate of the igbt chip 130 and the igbt chip 130 is not damaged.
In one embodiment, at least one top corner of the direct copper-clad substrate 120 is a chamfer 126. Further, the chamfers 126 of at least two of the directly copper-clad substrates 120 are arranged in a mirror image, for example, the top corners of the directly copper-clad substrates 120 on the left and right sides in fig. 2 are the chamfers 126 in a mirror image, thereby preventing the directly copper-clad substrates 120 on the left and right sides from being placed incorrectly in the reflow soldering process and improving the yield of the insulated gate bipolar transistor device 100.
In one embodiment, the number of the direct copper-clad substrates 120, the number of the igbt chips 130, and the number of the diode chips 140 in the igbt device 100 are two, and the igbt chips 130 and the diode chips 140 respectively located on the two direct copper-clad substrates 120 form a half-bridge circuit. The stray inductance of the half-bridge circuit is obviously reduced compared with that of the full-bridge circuit, and a current path in the half-bridge circuit has a shorter current path and a larger current cross-sectional area, so that the stray inductance of the upper bridge and the stray inductance of the lower bridge are reduced to a certain degree. Higher stray inductance can form higher peak voltage values at the two ends of the insulated gate bipolar transistor switch, which easily causes the insulated gate bipolar transistor device 100 to be damaged, and the stray inductance is reduced in the embodiment, so that the higher peak voltage values formed at the two ends of the insulated gate bipolar transistor switch are avoided, and the insulated gate bipolar transistor device 100 can be better protected.
The present application further provides a semiconductor chip. The semiconductor chip comprises an insulated gate bipolar transistor device as described in any of the above embodiments.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only represent some embodiments of the present invention, and the description thereof is specific and detailed, but not to be construed as limiting the scope of the present invention. It should be noted that, for those skilled in the art, without departing from the spirit of the present invention, several variations and modifications can be made, which are within the scope of the present invention. Therefore, the protection scope of the present invention should be subject to the appended claims.
Claims (10)
1. The insulated gate bipolar transistor device is characterized by comprising a bottom plate, at least two directly-copper-clad substrates, at least two insulated gate bipolar transistor chips and at least two diode chips, wherein the bottom plate is provided with a plurality of through holes;
the direct copper-clad substrates are arranged on the bottom plate, and each direct copper-clad substrate is at least provided with one insulated gate bipolar transistor chip and one diode chip; the diode chips on the at least two directly copper-clad substrates are oppositely arranged, and the insulated gate bipolar transistor chips and the diode chips on the at least two directly copper-clad substrates are arranged in a mirror image manner;
the direct copper-clad substrate comprises a direct copper-clad substrate, an insulated gate bipolar transistor chip and a diode chip, wherein an insulated groove is formed in the peripheries of the insulated gate bipolar transistor chip and the diode chip on the direct copper-clad substrate to divide a heat dissipation area between the insulated gate bipolar transistor chip and the diode chip and the insulated groove, the direct copper-clad substrate is exposed in the heat dissipation area, and the width of the heat dissipation area between the insulated gate bipolar transistor and the diode chip is larger than a preset width.
2. The igbt device according to claim 1, wherein the predetermined width is 3mm or more.
3. The igbt device according to claim 1, further comprising a connecting bridge disposed between the at least two directly copper-clad substrates;
for the at least two directly copper-clad substrates, a signal terminal area is arranged between the insulation groove and the edge of the directly copper-clad substrate on one of the directly copper-clad substrates; the connecting bridge is used for leading out a signal terminal on the other direct copper-clad substrate, and the signal terminals on the at least two direct copper-clad substrates are connected to the signal terminal area.
4. The igbt device according to claim 3, wherein the signal terminal region is disposed opposite to both the igbt chip and the diode chip on the direct copper clad substrate.
5. The igbt device according to claim 3, wherein for the at least two directly copper-clad substrates, on the directly copper-clad substrate on which the signal terminal region is not provided, a power terminal region is provided between the insulation trench and an edge of the directly copper-clad substrate, and the power terminal region is disposed opposite to the igbt chip;
the connecting bridge is also used for leading out power terminals on the direct copper-clad substrates which are not provided with the power terminal areas, and the power terminals on the at least two direct copper-clad substrates are connected to the power terminal areas.
6. The IGBT device according to claim 5, wherein for the at least two directly copper-clad substrates, a reserved area is further provided between the insulation trench and the edge of the directly copper-clad substrate on the directly copper-clad substrate provided with the power terminal area; the reserved area is located between the power terminal area and the signal terminal area.
7. The igbt device according to claim 1, wherein at least one top corner of the direct copper clad substrate is chamfered.
8. The igbt device according to claim 7, wherein the chamfers of the at least two directly copper-clad substrates are mirror images.
9. The igbt device according to claim 1, wherein the number of the directly copper-clad substrates, the number of the igbt chips, and the number of the diode chips are two, and the igbt chips and the diode chips respectively located on the two directly copper-clad substrates constitute a half-bridge circuit.
10. A semiconductor chip comprising an insulated gate bipolar transistor device according to any of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020415276.7U CN211700252U (en) | 2020-03-27 | 2020-03-27 | Insulated gate bipolar transistor device and semiconductor chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020415276.7U CN211700252U (en) | 2020-03-27 | 2020-03-27 | Insulated gate bipolar transistor device and semiconductor chip |
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| Publication Number | Publication Date |
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| CN211700252U true CN211700252U (en) | 2020-10-16 |
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| CN202020415276.7U Active CN211700252U (en) | 2020-03-27 | 2020-03-27 | Insulated gate bipolar transistor device and semiconductor chip |
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