CN211670204U

CN211670204U - LED chip with DBR layered structure

Info

Publication number: CN211670204U
Application number: CN202020781423.2U
Authority: CN
Inventors: 张亚
Original assignee: Jiangxi Zhao Chi Semiconductor Co Ltd
Current assignee: Jiangxi Zhao Chi Semiconductor Co Ltd
Priority date: 2020-05-13
Filing date: 2020-05-13
Publication date: 2020-10-13
Anticipated expiration: 2030-05-13

Abstract

The utility model discloses a LED chip with a DBR layered structure, which comprises a P electrode, a PSS substrate, an LED epitaxial structure, a CBL current barrier layer, a TCL transparent conducting layer, an N-type semiconductor table-board, an N electrode and a DBR structure; wherein: an LED epitaxial structure grows on the PSS substrate, a CBL current blocking layer is deposited on the LED epitaxial structure, a TCL transparent conducting layer is deposited on the LED epitaxial structure, plasma dry etching (ICP) is conducted on the LED epitaxial structure by taking the MESA pattern layer as a mask to form an N-type semiconductor table top, and a P electrode and an N electrode are respectively manufactured on the TCL transparent conducting layer and the N-type semiconductor table top. The utility model has the advantages that: through optimizing the DBR structure of the LED chip, the DBR structure is divided into the contact layer and the alternate lamination, the manufacturing method adopts different methods, the reverse transmittance and the step coverage of the contact layer of the DBR structure are improved, the internal stress of the LED chip generated by the DBR structure manufactured by the conventional method is reduced, and therefore the light-emitting rate and the service life of the LED chip are improved.

Description

LED chip with DBR layered structure

Technical Field

The utility model relates to a semiconductor device technical field especially relates to a LED chip with DBR layered structure.

Background

With the continuous development of semiconductor light emitting technology, Light Emitting Diodes (LEDs) have been widely used in display devices and solid state lighting devices. Conventional LED chips, including a front-mounted structure and a flip-chip structure, have active layers emitting light in multiple directions, so that LED chip products have to rely on good specular reflection capability of bragg reflectors (DBRs) to improve light extraction efficiency, and therefore the performance of the DBRs is critical in LED chips.

At present, the DBR structure of the LED chip is usually manufactured by a one-step method, the process is simple, but the semiconductor structure manufactured by the conventional process is a crystal. Due to the anisotropy of the crystal, the uniformity of the film thickness on a non-platform is not high, especially the step coverage is poor, and the problems of limited light reflection of the DBR structure, short service life of an LED chip and the like exist. For the market with increasingly stringent quality pursuit, higher requirements are also placed on LED chip products, and the performance of LED chips obtained by conventional manufacturing methods is not enough to adapt to higher-standard display devices and solid-state lighting devices, so that the preparation process needs to be optimized to obtain LED chips with higher light-emitting efficiency and longer service life.

Disclosure of Invention

Technical problem to be solved

To prior art not enough, the utility model provides a LED chip with DBR layered structure has solved among the prior art because the anisotropy of crystal, and the film thickness homogeneity on non-platform is not high, and especially step drapability is poor, has that the DBR structure is limited and LED chip life weak point scheduling problem to the reflection of light.

(II) technical scheme

In order to achieve the above object, the utility model provides a following technical scheme: an LED chip with a DBR layered structure comprises a P electrode, a PSS substrate, an LED epitaxial structure, a CBL current blocking layer, a TCL transparent conducting layer, an N-type semiconductor table, an N electrode and a DBR structure; wherein: an LED epitaxial structure grows on a PSS substrate, a CBL current blocking layer is deposited on the LED epitaxial structure, a TCL transparent conducting layer is deposited on the LED epitaxial structure, plasma dry etching (ICP) is conducted on the LED epitaxial structure by taking an MESA pattern layer as a mask to form an N-type semiconductor table top, a P electrode and an N electrode are respectively manufactured on the TCL transparent conducting layer and the N-type semiconductor table top, the DBR structure is a layered structure, and the layered DBR structure comprises a DBR contact layer which is in contact with the TCL transparent conducting layer or the PSS substrate and a DBR alternate lamination layer which is formed by alternate deposition of high-low refractive index materials.

Further, a DBR contact layer in contact with the TCL transparent conductive layer or the PSS substrate is realized by a PECVD method, the thickness range of the DBR contact layer is 1000A-10000A, the DBR is alternately stacked to form a multi-layer film structure and is formed by alternately growing medium multi-layer films with high refractive index and low refractive index, and the thickness of each layer of the alternately stacked DBR is 1/4 of the wavelength of the light emitting diode chip.

Further, the TCL transparent conductive layer material includes, but is not limited to, ITO (indium tin oxide), GZO (gallium zinc oxide).

Further, the DBR alternating stack material includes, but is not limited to, TiO₂、Ti3O₅、SiO₂。

Further, the alternating stack thickness of the DBR ranges from 2 μm to 6 μm.

(III) advantageous effects

Compared with the prior art, the utility model provides a LED chip with DBR layered structure possesses following beneficial effect: the utility model discloses a DBR structure to the LED chip is optimized, divide into the contact layer with the DBR structure and stromatolite in turn, adopts different methods preparation, has improved the reflection transmissivity and the step drapability of DBR structure contact layer, has reduced the produced LED chip internal stress of the DBR structure of conventional method preparation to the light-emitting rate and the life of LED chip have been improved.

Drawings

Fig. 1 is a schematic cross-sectional view of a flip LED chip in embodiment 1 of the present invention.

Fig. 2 is a schematic cross-sectional view of a front-mounted LED chip in embodiment 2 of the present invention.

Reference numerals:

the LED light-emitting diode comprises a P electrode 101, a PSS substrate 102, an LED epitaxial structure 103, a CBL current blocking layer 104, a TCL transparent conducting layer 105, an N-type semiconductor mesa 106, an N electrode 107, a DBR contact layer 108, a DBR alternating lamination layer 109 and a pad 110.

The P-electrode 201, the PSS substrate 202, the LED epitaxial structure 203, the CBL current blocking layer 204, the TCL transparent conductive layer 205, the N-type semiconductor mesa 206, the N-electrode 207, the PV protective layer 208, the DBR contact layer 209, the DBR alternating stack 210.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.

Embodiment 1, as shown in fig. 1, is a schematic cross-sectional view of a flip LED chip according to this embodiment, where the LED chip of this embodiment is in a flip structure.

An LED chip with a DBR layered structure comprises a P electrode 101, a PSS substrate 102, an LED epitaxial structure 103, a CBL current blocking layer 104, a TCL transparent conductive layer 105, an N-type semiconductor mesa 106, an N electrode 107 and a DBR structure; wherein: an LED epitaxial structure 103 grows on a PSS substrate 102, a CBL current blocking layer 104 is deposited on the LED epitaxial structure 103, a TCL transparent conducting layer 105 is deposited on the LED epitaxial structure 103, plasma dry etching (ICP) is conducted on the LED epitaxial structure 103 by taking an MESA pattern layer as a mask to form an N-type semiconductor MESA 106, a P electrode 101 and an N electrode 107 are respectively manufactured on the TCL transparent conducting layer 105 and the N-type semiconductor MESA 106, and the DBR structure is a layered structure.

In this embodiment, the layered DBR structure comprises a DBR contact layer 108 in contact with the TCL transparent conductive layer 105, an alternating stack of DBRs 109 of alternately deposited high and low refractive index materials.

This embodiment explains the DBR layered structure growth method, and the DBR layered structure growth method specifically includes the following steps:

step S1, providing a substrate, and patterning the substrate to obtain a pss (patterned sapphire substrates) substrate 102;

step (ii) ofS2, growing an LED epitaxial structure 103 on the PSS substrate 102, and depositing a CBL current blocking layer 104 on the LED epitaxial structure 103, wherein the CBL current blocking layer 104 is made of SiO₂；

Step S3, depositing a TCL transparent conductive layer 105 on the LED epitaxial wafer, and performing plasma dry etching (ICP) on the LED epitaxial wafer by taking the MESA layer as a mask to form an N-type semiconductor MESA 106;

in step S4, isolation (iso) isolation trenches are formed. Performing ICP etching by taking the ISO layer as a mask to leak the bottom layer PSS material substrate 102 to form an ISO isolation groove;

in step S5, the P electrode 101 and the N electrode 107 are fabricated on the LED epitaxial wafer, and the DBR contact layer 108 and the DBR alternating stack 109 are fabricated, so that the P electrode 101 and the N electrode 107 leak:

specifically, when the manufacturing of the DBR structure 108 contact layer is carried out, a Plasma Enhanced Chemical Vapor Deposition (PECVD) method is adopted, and an amorphous SiO2 of 1000 a-10000 a is deposited as the contact layer in an environment of 150 ℃ to 250 ℃; after the DBR contact layer 108 is deposited, the DBR alternating stack 109 is fabricated by a conventional coating method;

in step S6, pads 110 are finally formed on the P-electrodes 101 and the N-electrodes 107.

Embodiment 2 is a schematic cross-sectional view of a front-mounted LED chip according to this embodiment, as shown in fig. 2, and the difference between this embodiment and embodiment 1 is that the LED chip of this embodiment is a front-mounted structure.

An LED chip with a DBR layered structure comprises a P electrode 201, a PSS substrate 202, an LED epitaxial structure 203, a CBL current blocking layer 204, a TCL transparent conducting layer 205, an N-type semiconductor mesa 206, an N electrode 207 and a DBR structure; wherein: an LED epitaxial structure 103 grows on the PSS substrate 202, a CBL current blocking layer 204 is deposited on the LED epitaxial structure 203, a TCL transparent conducting layer 205 is deposited on the LED epitaxial structure 203, and plasma dry etching (ICP) is carried out on the LED epitaxial structure 203 by taking the MESA pattern layer as a mask to form an N-type semiconductor MESA 206.

The difference between this embodiment and the embodiment in the manufacturing method is that no ISO isolation trench needs to be made, after the P electrode 201 and the N electrode 207 are made, the PV protection layer 208 is made, and then the DBR contact layer 209 and the DBR alternating stack 210 are deposited on the thinned PSS substrate 202.

It should be noted that the above manufacturing examples are examples of the preferred embodiments of the present invention, and there are many manufacturing schemes that can be actually adopted by the specific manufacturing method, and all the led structures designed and invented according to the concept of the present invention all belong to the scope covered by the present invention.

In this document, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.

Claims

1. An LED chip with a DBR layered structure comprises a P electrode, a PSS substrate, an LED epitaxial structure, a CBL current blocking layer, a TCL transparent conducting layer, an N-type semiconductor table, an N electrode and a DBR structure; the method is characterized in that: an LED epitaxial structure grows on a PSS substrate, a CBL current blocking layer is deposited on the LED epitaxial structure, a TCL transparent conducting layer is deposited on the LED epitaxial structure, plasma dry etching (ICP) is conducted on the LED epitaxial structure by taking an MESA pattern layer as a mask to form an N-type semiconductor table top, a P electrode and an N electrode are respectively manufactured on the TCL transparent conducting layer 10 and the N-type semiconductor table top, the DBR structure is a layered structure, and the layered DBR structure comprises a DBR contact layer which is in contact with the TCL transparent conducting layer or the PSS substrate and a DBR alternate lamination layer which is formed by alternate deposition of high-low refractive index materials.

2. An LED chip having a DBR layered structure as claimed in claim 1 wherein: the DBR contact layer in contact with the TCL transparent conductive layer or the PSS substrate is realized by a PECVD method, the thickness range of the DBR contact layer is 1000A-10000A, the DBR is alternately stacked to be a multi-layer film structure and is formed by alternately growing high-refractive-index and low-refractive-index alternating dielectric multi-layer films, and the thickness of each layer of the alternately stacked DBR films is 1/4 of the wavelength of the light-emitting diode chip.

3. An LED chip having a DBR layered structure as claimed in claim 1 wherein: the TCL transparent conductive layer material includes, but is not limited to, ITO (indium tin oxide), GZO (gallium zinc oxide).

4. An LED chip having a DBR layered structure as claimed in claim 1 wherein: the DBR alternating stack includes, but is not limited to, TiO₂、Ti3O₅、SiO₂。

5. An LED chip having a DBR layered structure as claimed in claim 1 wherein: the thickness range of the alternating lamination of the DBRs is 2-6 mu m.