CN211654815U

CN211654815U - Chip packaging structure

Info

Publication number: CN211654815U
Application number: CN202020477506.2U
Authority: CN
Inventors: 周立功; 袁正红
Original assignee: Guangzhou Zhiyuan Electronics Co Ltd
Current assignee: Guangzhou Zhiyuan Electronics Co Ltd
Priority date: 2020-04-03
Filing date: 2020-04-03
Publication date: 2020-10-09
Anticipated expiration: 2030-04-03

Abstract

The utility model relates to a chip package technical field specifically discloses a chip package structure, including base plate, the naked chip of microcontroller, the naked chip of wireless communication, packaging body and a plurality of pin pad. The substrate has a first surface and a second surface which are opposite; the micro-controller bare chip is arranged on the first surface; the wireless communication bare chip is arranged on the first surface and is connected with the microcontroller bare chip; the packaging body covers the first surface and covers the microcontroller chip and the wireless communication bare chip on the first surface; the plurality of pin bonding pads are arranged on the second surface and are respectively connected with the micro-controller bare chip and the wireless communication bare chip. The cost is lower by adopting a microcontroller bare chip and a wireless communication bare chip. The packaging body covers the first surface and covers the microcontroller bare chip and the wireless communication bare chip on the first surface, so that the waterproof, anti-falling and damp-proof grade can be improved, the effect of protecting the microcontroller bare chip and the wireless communication bare chip is achieved, and meanwhile, the confidentiality is improved.

Description

Chip packaging structure

Technical Field

The utility model relates to a chip package technical field especially relates to a chip package structure.

Background

For a wireless communication module with a microcontroller, a module assembly mode based on a PCB board level is commonly adopted in the industry, that is, a controller chip, a wireless communication chip (such chip is a packaged QFN or QFP) and the like are directly attached to a PCB, so as to form a whole with the functions of transceiving of a wireless communication protocol and external control. The module PCB is connected with the system circuit application board through the post mark hole, the specific structure is that the module PCB is attached above the system circuit application PCB, and the module PCB and the system circuit application board are fixed and electrically conducted through the post mark hole on the side surface of the module PCB. The above assembly method has the following defects: all materials, circuit designs and the like used in the module are exposed, the confidentiality is poor, the waterproof, anti-falling and damp-proof grades are low, and in addition, the packaged chips are adopted, so that the material cost is high, and the size is large.

SUMMERY OF THE UTILITY MODEL

Therefore, it is necessary to provide a chip package structure for solving the problems of poor security and high cost of the conventional wireless communication module package structure.

A chip package structure, comprising:

a substrate having opposing first and second surfaces;

the micro-controller bare chip is arranged on the first surface;

the wireless communication bare chip is arranged on the first surface and is connected with the microcontroller bare chip;

the packaging body covers the first surface and coats the microcontroller chip and the wireless communication bare chip on the first surface;

and the pin bonding pads are arranged on the second surface and are respectively connected with the micro-controller bare chip and the wireless communication bare chip.

In one embodiment, the first surface is provided with a first conductive layer, and the microcontroller die and the wireless communication die are both connected with the first conductive layer through bonding wires.

In one embodiment, the wireless communication bare chip is attached to the first surface by a conductive adhesive.

In one embodiment, a region of the first surface in contact with the wireless communication die is provided with a heat dissipation area.

In one embodiment, the wireless communication module further includes a plurality of via holes penetrating through the substrate in a thickness direction, the plurality of via holes are respectively and correspondingly disposed below the microcontroller bare chip and the wireless communication bare chip, and the second surface is provided with a heat dissipation pad connected to the via holes.

In one embodiment, the method further comprises the following steps:

and the crystal oscillator is arranged on the first surface and is connected with the wireless communication bare chip.

In one embodiment, the method further comprises the following steps:

the radio frequency matching circuit is arranged on the first surface and is connected with the wireless communication bare chip;

and the surface-mounted switch is arranged on the first surface and is connected with the radio frequency matching circuit.

In one embodiment, the wireless communication bare chip is a LoRa radio frequency bare chip, an NFC bare chip, a Zigbee bare chip, a bluetooth bare chip, or a WIFI bare chip.

In one embodiment, the periphery of the pin pad is covered with an ink layer.

In one embodiment, the pitch between each adjacent pin pad is 0.55 mm.

The chip packaging structure adopts the bare chip of the microcontroller and the bare chip of the wireless communication, and compared with the traditional packaged chip, the cost is lower; the packaging body covers the first surface and covers the microcontroller bare chip and the wireless communication bare chip on the first surface, so that on one hand, the waterproof, anti-falling and moisture-proof grade of the chip packaging structure can be improved, the effect of protecting the microcontroller bare chip and the wireless communication bare chip is achieved, and on the other hand, the confidentiality of the chip packaging structure is improved. And the pin bonding pad on the second surface of the substrate is used for leading out pins of the bare chip of the microcontroller and the bare chip of the wireless communication, so that a device on the chip packaging structure is connected with the pins on the system application PCB, and the purpose of signal transmission is realized.

Drawings

Fig. 1 is a schematic cross-sectional view of a chip package structure according to an embodiment of the present disclosure;

fig. 2 is a schematic plan view of a second surface of a chip package structure according to an embodiment of the present disclosure.

Description of reference numerals:

10. a substrate; 101. a first surface; 1011. a first conductive layer; 1012. a bonding wire; 1013. a conductive adhesive; 102. a second surface; 1021. a second conductive layer; 103. a via hole; 20. a microcontroller bare chip; 30. a wireless communication bare chip; 301. crystal oscillation; 302. a passive device; 40. a package body; 50. a pin pad; 60. a heat-dissipating pad; 70. anti-warping pad.

Detailed Description

In order to facilitate understanding of the present invention, the present invention will be described more fully hereinafter with reference to the accompanying drawings. The preferred embodiments of the present invention are shown in the drawings. The invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

It will be understood that when an element is referred to as being "secured to" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. As used herein, the terms "vertical," "horizontal," "left," "right," "upper," "lower," "front," "rear," "circumferential," and the like are based on the orientation or positional relationship shown in the drawings and are intended to facilitate the description of the invention and to simplify the description, but do not indicate or imply that the device or element so referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the invention.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

As mentioned in the background, the conventional wireless communication module generally mounts a packaged chip directly on a module PCB, then mounts the module PCB on a system circuit application PCB, and transmits and fixes signals with the system circuit application PCB through a post hole on a side surface of the module PCB. The method has a plurality of defects, such as chips and circuit designs on the module PCB are uniform and have no good confidentiality; the waterproof, anti-falling and damp-proof grade is poor, so that the service life of the wireless communication module is greatly shortened; the packaged chip is adopted, so that the material cost is high, and the packaged chip is large in size and needs to be connected with a system circuit application PCB through a post mark hole in the side face of the module PCB, so that the size of the whole structure is large.

In view of the above problems, embodiments of the present application provide a chip package structure to replace a conventional wireless communication module, and the chip package structure can be used for connecting to a system circuit application PCB.

The following are the annotations of the english vocabulary mentioned in this example:

long, short for Long distance communication;

PCB: print Circuit Board, printed Circuit Board;

LGA, Land Grid Array, Grid Array package;

I2C: inter Integrated Circuit, bidirectional two-wire synchronous serial bus;

UART: universal Asynchronous Receiver Transmitter, Universal Asynchronous Receiver;

PWM: pulse Width Modulation, Pulse Width Modulation;

ADC: analog to digital converter, Analog to digital converter;

DAC: digital to Analog Converter, Digital to Analog Converter;

SMT, Surface Mounted Technology, Surface assembly Technology;

I/O, Input/Output;

wifi, Wireless Fidelity, Wireless local area network;

zigbee, a short-range wireless technology;

NFC: near Field Communication, short-range wireless Communication technology.

As shown in fig. 1, the chip package structure provided in the embodiment of the present application includes a substrate 10, a micro controller die 20, a wireless communication die 30, a package body 40, and a plurality of pin pads 50. The micro-controller bare chip 20 is arranged on the first surface 101; the wireless communication bare chip 30 is arranged on the first surface 101 and connected with the microcontroller bare chip 20; the packaging body 40 covers the first surface 101 and covers the microcontroller bare chip 20 and the wireless communication bare chip 30 of the first surface 101; a plurality of pin pads 50 are disposed on the second surface 102 and respectively connected to the microcontroller die 20 and the wireless communication die 30.

The chip packaging structure adopts the microcontroller bare chip 20 and the wireless communication bare chip 30, and compared with the traditional packaged chip, the cost is lower; by covering the first surface 101 and covering the microcontroller bare chip 20 and the wireless communication bare chip 30 on the first surface 101 with the packaging body 40, on one hand, the waterproof, anti-falling and moisture-proof levels of the chip packaging structure can be improved, the microcontroller bare chip 20 and the wireless communication bare chip 30 are protected, and on the other hand, the confidentiality of the chip packaging structure is improved. The pin pads 50 on the second surface 102 of the substrate 10 are used to lead out the pins of the micro-controller die 20 and the wireless communication die 30, so that the devices on the chip package structure can be connected to the pins on the system application PCB board, and the purpose of signal transmission is achieved.

Specifically, the substrate 10 is in a regular shape, and has a first surface 101 and a second surface 102 opposite to each other, the first surface 101 and the second surface 102 are parallel to each other, and both the first surface 101 and the second surface 102 are smooth and flat surfaces, so as to prevent a device disposed on the surfaces from being damaged, and to improve adhesion between the substrate 10 and the device.

The micro controller die 20 is a die capable of providing a control function for the wireless communication die 30, wherein the die is a product form before a semiconductor device is manufactured and packaged, and thus the cost is low.

In this embodiment, both the micro controller die 20 and the wireless communication die 30 can be adhesively fixed on the first surface 101 of the substrate 10, and the wireless communication die 30 and the micro controller die 20 are connected to each other.

As an alternative embodiment, a first conductive layer 1011 is disposed on the first surface 101 of the substrate 10, the material of the first conductive layer 1011 is copper, the bare wireless communication chip 30 has an I/O pad, the I/O pad of the bare wireless communication chip 30 is connected to the first conductive layer 1011 of the first surface 101 by a bonding wire 1012 in a wire bonding manner, and the bonding wire 1012 may be a gold wire or a silver wire. For convenience of connection, pads are provided at corresponding positions of the first conductive layer 1011, i.e., the wireless communication bare chip 30I/O pads are connected to the corresponding pads. Likewise, the micro-controller bare chip 20 may also be connected to the first conductive layer 1011 in the same manner. In addition, the first conductive layer 1011 has a predetermined conductive trace, and the microcontroller bare chip 20 and the wireless communication bare chip 30 are interconnected through the predetermined conductive trace, so as to achieve the purpose of signal transmission.

As an alternative embodiment, the bare wireless communication chip 30 is adhered to the first surface 101 of the substrate 10 by the conductive adhesive 1013, and since the thermal conductivity coefficient of the conductive adhesive 1013 is high, rapid thermal conduction can be achieved to stabilize the performance of the bare wireless communication chip 30. Compared with the wireless communication bare chip 30, the micro-controller bare chip 20 has lower sensitivity to heat, so the micro-controller bare chip 20 can be adhered to the first surface 101 of the substrate 10 by the conductive adhesive 1013, or adhered to the first surface 101 of the substrate 10 by the non-conductive adhesive 1013, and the micro-controller bare chip 20 is adhered by the non-conductive adhesive 1013, thereby reducing the packaging cost to a certain extent.

As an alternative embodiment, the area of the first surface 101 of the substrate 10 in contact with the wireless communication bare chip 30 is provided with a heat dissipation area. Specifically, since the bare chip 30 for wireless communication has a high sensitivity to heat, heat dissipation needs to be considered during packaging, that is, a heat dissipation area is disposed on the first surface 101 of the substrate 10 in contact with the same, wherein the heat dissipation area is generally made of copper sheet, and may be a complete copper sheet or a dispersed copper sheet. The heat dissipation region is provided to accelerate the heat release of the wireless communication bare chip 30.

It should be noted that the first conductive layer 1011 on the first surface 101 of the substrate 10 can directly serve as a heat dissipation area, that is, when the wireless communication bare chip 30 is bonded, the first conductive layer 1011 at the corresponding position on the first surface 101 of the substrate 10 is remained, and the wireless communication bare chip 30 is directly bonded thereon.

The area of the first surface 101 of the substrate 10 that is in contact with the bare-chip microcontroller 20 may or may not be provided with a heat sink.

In one embodiment, a crystal oscillator 301 is further disposed on the first surface 101 of the substrate 10, and the crystal oscillator 301 is connected to the wireless communication bare chip 30 to provide a clock signal for the wireless communication bare chip 30. Generally, the crystal oscillator 301 is Mounted on the first surface 101 of the substrate 10, specifically, on the pads on the first surface 101 of the substrate 10, by smt (surface mount technology) surface mounting technology. As with the connection between the wireless communication die 30 and the microcontroller die 20, the crystal oscillator 301 is interconnected with the wireless communication die 30 by the first conductive layer 1011 on the first surface 101 of the substrate 10.

In this embodiment, the crystal oscillator 301 with a small size is selected to reduce the package volume.

In one embodiment, a radio frequency matching circuit is further disposed on the first surface 101 of the substrate 10, and the radio frequency matching circuit is connected to the wireless communication bare chip 30. Generally, the radio frequency matching circuit is an existing radio frequency transmitting matching circuit and an existing radio frequency receiving matching circuit, and is mainly used for filtering and matching transmitted or received signals, and the radio frequency matching circuit is an LC matching circuit, so that the simplification of circuit design is facilitated, and the size of the packaging body 40 is further reduced. Inductors and capacitors (hereinafter referred to as passive devices 302) in the rf matching circuit are attached to the first surface 101 of the substrate 10, specifically to pads on the first surface 101 of the substrate 10, by using smt (surface mount technology), and the connection between the passive devices 302 and the interconnection between the inductors and capacitors and the wireless communication bare chip 30 are realized through the first conductive layer 1011 on the first surface 101 of the substrate 10.

In this embodiment, a passive device 302 with a small size 0201 is selected to reduce the package volume.

In one embodiment, a surface-mounted switch is further disposed on the first surface 101 of the substrate 10, and the surface-mounted switch is connected to the rf matching circuit. The surface mount switch is mounted on the first surface 101 of the substrate 10 by smt (surface mount technology) surface mount technology, and is connected to the passive device 302 in the rf matching circuit through the first conductive layer 1011. The surface-mounted switch is used for controlling the sending and receiving of signals.

In one embodiment, the wireless communication bare chip 30 in this embodiment is a LoRa radio frequency bare chip, an NFC bare chip, a Zigbee bare chip, a bluetooth bare chip, a WIFI bare chip, or the like, as long as the bare chip can realize a wireless communication function. In this embodiment, the LoRa rf bare chip is preferred.

In one embodiment, the chip package structure further includes a plurality of vias 103 penetrating through the substrate 10 along a thickness direction, the plurality of vias 103 are respectively disposed below the microcontroller bare chip 20 and the wireless communication bare chip 30, and the second surface 102 is provided with the heat dissipation pad 60 connected to the vias 103. The above via hole 103 may be a solid copper via hole 103, and heat of the micro controller die 20 and the wireless communication die 30 is transferred to the heat dissipation pad 60 of the second surface 102 of the substrate 10 through the solid copper via hole 103. In practical application, the heat dissipation pad 60 is used to connect the system circuit application PCB, that is, the heat of the micro-controller bare chip 20 and the wireless communication bare chip 30 is transmitted to the system application PCB through the solid copper via 103, so as to reduce the junction temperature of the chips. In addition, the electrical property of the heat dissipation pad 60 is circuit ground, the ground of the first surface 101 of the substrate 10 is connected to the heat dissipation pad 60 through the vias 103, and the heat dissipation pad 60 is soldered on the system circuit application PCB, so that the impedance of the ground of the area where the wireless communication bare chip 30 is located can be reduced, and the radio frequency interference of the whole system can be reduced.

Generally, the plurality of vias 103 under the wireless communication die 30 are commonly connected to the same thermal pad 60, and the plurality of vias 103 under the microcontroller die 20 are commonly connected to the same thermal pad 60.

In one embodiment, as shown in fig. 2, a plurality of pin pads 50 are disposed on the second surface 102 of the substrate 10 near the outer edge, and the pin pads 50 are respectively connected to various devices disposed on the first surface 101 of the substrate 10 and are also used for connecting to a system circuit application PCB to implement signal transmission. The pin pads 50 correspond to antenna transmit and input pins, respectively, the crystal 301 signal pin, and a control pin of a microcontroller (e.g., I2C, UART, PWM, ADC, DAC, etc.).

Specifically, a second conductive layer 1021 is disposed on the second surface 102 of the substrate 10, the second conductive layer 1021 is made of copper, and each of the pin pads 50 is connected to the second conductive layer 1021. The second conductive layer 1021 can be connected with the first conductive layer 1011 on the first surface 101 through a connecting through hole provided on the substrate 10 for connecting the first surface 101 and the second surface 102, so as to connect with the device on the first surface 101. The second conductive layer 1021 also has a predetermined conductive circuit, and the above connections are performed according to the predetermined conductive circuit in the first conductive layer 1011 and the second conductive layer 1021.

In one embodiment, the periphery of each pin pad 50 is covered with an ink layer. Thereby increasing the bonding strength of the bonding pad.

In one embodiment, as shown in fig. 2, anti-warpage pads 70 are further disposed on the second surface 102 of the substrate 10, and the anti-warpage pads 70 are disposed at four corners of the second surface 102 for connecting to a system circuit application PCB to prevent the chip package structure from warpage.

In one embodiment, the pitch between adjacent ones of the lead pads 50 is 0.55mm, and the size of each of the lead pads 50 is 0.55 × 0.3 mm.

In one embodiment, the size of the thermal pad 60 is 1x1mm, and the size of the anti-warping pad 70 is 0.35x 0.35mm.

In this embodiment, the package 40 is generally a plastic package, and covers the entire first surface 101 and completely covers all devices on the first surface 101, i.e. plays a role in packaging and protecting the entire chip structure.

The volume of the chip packaging structure provided by the embodiment can reach 11x11x1mm, and the traditional packaging structure is 30x18x3mm, so that compared with the traditional packaging structure, the volume of the chip packaging structure provided by the embodiment is greatly reduced, and the chip packaging structure is convenient to apply to the field of portable space compact products.

In addition, the chip package structure provided by the embodiment is an LGA package, and can be directly mounted on a PCB board for system circuit application by using smt (surface mounted technology) surface mount technology, so that the production efficiency is improved, and the production difficulty is reduced.

The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.

The above-mentioned embodiments only represent some embodiments of the present invention, and the description thereof is specific and detailed, but not to be construed as limiting the scope of the present invention. It should be noted that, for those skilled in the art, without departing from the spirit of the present invention, several variations and modifications can be made, which are within the scope of the present invention. Therefore, the protection scope of the present invention should be subject to the appended claims.

Claims

1. A chip package structure, comprising:

a substrate having opposing first and second surfaces;

the micro-controller bare chip is arranged on the first surface;

a package covering the first surface and covering the microcontroller die and the wireless communication die of the first surface;

2. The chip packaging structure according to claim 1, wherein the first surface is provided with a first conductive layer, and the microcontroller die and the wireless communication die are both connected to the first conductive layer by a bonding wire.

3. The chip packaging structure according to claim 1, wherein the wireless communication bare chip is attached to the first surface by a conductive adhesive.

4. The chip package structure of claim 1, wherein a region of the first surface in contact with the wireless communication bare chip is provided with a heat dissipation region.

5. The chip package structure according to claim 1, further comprising a plurality of vias penetrating through the substrate in a thickness direction, wherein the plurality of vias are respectively disposed under the microcontroller bare chip and the wireless communication bare chip, and the second surface is provided with a heat dissipation pad connected to the vias.

6. The chip package structure according to claim 1, further comprising:

7. The chip package structure according to claim 1, further comprising:

8. The chip packaging structure according to any one of claims 1 to 7, wherein the wireless communication bare chip is a LoRa radio frequency bare chip, an NFC bare chip, a Zigbee bare chip, a Bluetooth bare chip, or a WIFI bare chip.

9. The chip package structure according to claim 1, wherein the periphery of the pin pad is covered with an ink layer.

10. The chip package structure according to claim 1, wherein a pitch between each adjacent ones of the pin pads is 0.55 mm.