CN211557268U - Multi-channel signal source - Google Patents

Multi-channel signal source Download PDF

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Publication number
CN211557268U
CN211557268U CN202020634382.4U CN202020634382U CN211557268U CN 211557268 U CN211557268 U CN 211557268U CN 202020634382 U CN202020634382 U CN 202020634382U CN 211557268 U CN211557268 U CN 211557268U
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radio frequency
frequency transformer
digital
signal source
port
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CN202020634382.4U
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Chinese (zh)
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王拾玖
程伟
王问
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Nanjing Weitong Electronic Technology Co ltd
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Nanjing Weitong Electronic Technology Co ltd
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Abstract

A multi-channel signal source. Digital signals are output by PL ends of PL ports of an XZC7045 chip, digital signals output by the PL ends are respectively received by a digital-to-analog converter and are converted into corresponding analog signals, the analog signals are respectively transmitted to a radio frequency transformer, and the radio frequency transformer performs coupling and impedance conversion on the analog signals and outputs stable signal source signals. The utility model discloses can be through 6 mutually independent digital analog converters who has two channel outputs of 6 way PL end output connection, realize totaling 12 way signal source outputs. The high-performance requirement can be met while the high-integration signal source is realized.

Description

Multi-channel signal source
Technical Field
The utility model relates to a signal generation device field especially relates to a multichannel signal source.
Background
In communication circuits, signal sources are widely used. Many devices are tested or used by providing a reference source or a signal analysis source using a signal source device. However, the conventional universal signal source generating device can only generate one stable signal source. Under the environment that a plurality of signal sources are required to be used simultaneously and the output signals of the signal sources have higher requirements, multiple paths of different devices are required to be used for respectively generating signals, so that the problems of high cost, complex structure and the like are caused.
SUMMERY OF THE UTILITY MODEL
In order to solve the defects existing in the prior art, the utility model aims to provide a multipath signal source. This application is through selecting for use the DDR storage, for the power sets up anti jamming circuit, cooperation SPI program memory, XZC7045 treater, AD9783 digital-to-analog conversion, realizes the multichannel signal source of high integration level, just satisfy the high performance requirement through a set of circuit.
In order to achieve the above object, the utility model provides a pair of multichannel signal source, it includes: a power supply outputting a power supply voltage; a digital signal port outputting a digital signal; a plurality of digital-to-analog converters, each of which is connected to each of the digital signal ports, respectively receives the digital signals output by each of the digital signal ports, and outputs analog signals corresponding to the digital signals; and the radio frequency transformer comprises a plurality of transformers which are respectively connected with the output end of each digital-to-analog converter, and is used for coupling and impedance conversion of each path of analog signal output by the digital-to-analog converter and outputting the analog signal as a stable signal source signal.
Optionally, in the foregoing multiple signal sources, the digital signal port is a PL port of an XZC7045 chip.
Optionally, in the foregoing multiple signal sources, the digital-to-analog converter is AD 9783.
Optionally, in the above multi-channel signal source, the digital-to-analog converter has two channel outputs, and the two channel outputs are respectively connected to mutually independent radio frequency transformers.
Optionally, in the foregoing multi-channel signal source, each of the digital-to-analog converters is respectively connected to a power input circuit, and the power input circuit includes 4 capacitors with different capacitance values and connected in parallel to each other, and the capacitors are connected between a power supply and a power supply end input of the digital-to-analog converter.
Optionally, in the foregoing multi-channel signal source, the capacitor is a ceramic patch capacitor, the ceramic patch capacitor is disposed close to the digital-to-analog converter, and capacitance values of the ceramic patch capacitors are 10uF, 0.1uF, 1nF, and 0.1nF, respectively.
Optionally, in the above multi-channel signal source, each channel output of each digital-to-analog converter includes a P port and an N port, and is connected to 4 rf transformers, where the P port and the N port are grounded through two resistors, the P port is connected to a third input end of a first rf transformer and a first input end of a second rf transformer, the N port is connected to a fifth input end of the first rf transformer and a third input end of the second rf transformer, a fourth input end of the first rf transformer and a second input end of the second rf transformer are grounded, a first output end of the first rf transformer is connected to a fourth output end of the second rf transformer, and a second output end of the first rf transformer is connected to a fifth output end of the second rf transformer; the second output end of the first radio frequency transformer is further connected to a third input end of a third radio frequency transformer and a first input end of a fourth radio frequency transformer, the first output end of the first radio frequency transformer is further connected to a fifth input end of the third radio frequency transformer and a third input end of the fourth radio frequency transformer, the fourth input end of the third radio frequency transformer and the second input end of the fourth radio frequency transformer are grounded, the second output end of the third radio frequency transformer is connected to a fifth output end of the fourth radio frequency transformer to output the signal source signal, and the first output end of the third radio frequency transformer is connected to the fourth output end of the fourth radio frequency transformer and grounded.
Optionally, in the multi-channel signal source, the first radio frequency transformer is ADTL 1-12; the second radio frequency transformer is TC 1-1-13M; the third radio frequency transformer is ADT 2-1T-1P; the fourth radio frequency transformer is TC 2-1T.
Optionally, in the above multi-channel signal source, the digital-to-analog converter includes 6 digital-to-analog converters respectively connected to PL terminals of the processors.
Compared with the prior art, the utility model has the following technical effects:
1. the utility model discloses by the PL end output digital signal of treater, receive respectively by digital analog converter the digital signal that PL end exported converts it into corresponding analog signal, transmits this analog signal to radio frequency transformer respectively again, by radio frequency transformer each way analog signal carries out coupling, impedance transformation, exports for stable signal source signal. The utility model discloses can be through 6 mutually independent digital analog converters who has two channel outputs of 6 way PL end output connection, realize totaling 12 way signal source outputs. The high-performance requirement can be met while the high-integration signal source is realized.
2. Further, for guaranteeing that the treater operation is stable, guarantee that signal source output signal is stable, the utility model discloses still further be provided with power input circuit for the power end of treater for interference and harmonic that can produce on the elimination power. And each channel output of the digital-to-analog converter is respectively matched with a corresponding radio frequency transformer, so that coupling and impedance conversion of each path of analog signals are realized, and the output is a stable signal source signal.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the invention.
Drawings
The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification, together with the embodiments of the invention for the purpose of explanation and not limitation of the invention. In the drawings:
fig. 1 is a circuit diagram of a waveform output unit in a multi-path signal source according to the present invention;
fig. 2 is a block diagram of the overall structure of a multipath signal source according to the present invention;
fig. 3 is a schematic diagram of a power input circuit in a multipath signal source according to the present invention.
Detailed Description
The preferred embodiments of the present invention will be described in conjunction with the accompanying drawings, and it will be understood that they are presented herein only to illustrate and explain the present invention, and not to limit the present invention.
The utility model provides a signal source module of high performance, including the power for output power supply voltage provides each circuit element electric energy, still includes processor unit, digital analog conversion unit, to external interface net gape and CAN bus, DDR storage, power and SPI program memory. The processor may be XZC7045 from Xilinx, Inc., and the digital-to-analog converter may be AD9783 from ADI, Inc. The circuit structure shown in fig. 2 forms a complete signal source circuit, so that high integration is realized and high performance requirements are also realized.
The processor model XZC7045 is a processor integrating an ARM and an FPGA, and is generally called an ARM core as a PS terminal (Processing System) and an FPGA core as a PL terminal (Programmable Logic). The PS end is provided with two ARM9 kernels with the same performance, and is integrated with interfaces such as a hardware network interface, a CAN bus interface, a DDR3 interface, a general IO port and the like, so that the PS end CAN be conveniently and practically used for controlling peripheral equipment of a data interaction kernel.
The utility model discloses a chooseing for use ZYNQ series's XZC7045 treater can effectively improve the integrated level of system, has saved and has additionally used the shared space on the board of a chip and peripheral device in other schemes to the design that makes whole signal source system can possess more space resources. Also, this choice of chips does not require consideration of the layout of the physical buses between chips in a multi-chip scheme. The physical bus between the original chips can realize high-speed transmission only through the internal bus of the XZC7045 processor chip, thereby reducing the development difficulty.
The utility model discloses utilize FLASH to deposit the program that the chip needs the operation. All programs of the PS terminal and the PL terminal of the processor can be stored in FLASH. FLASH is mounted on the PS end through an SPI interface, and the PL end is started through the PS end. The PS part and the PL part share the memory, data are interacted through an internal AXI high-speed bus, and the difficulty of software development is reduced. The PL terminal is connected with the FPGA core, so that the required functions can be freely realized by using the IP core, meanwhile, the complex algorithm and a large amount of data transmission can be realized by the powerful parallel function, the program stored in the FLASH memory is read and operated, and corresponding digital signals are correspondingly output at each PL terminal. The PS end is embedded into a Linux system, the two ARM cores can work simultaneously to process different tasks, and interaction with external data is easy to realize due to the perfect drive of Linux.
The utility model discloses adopt ADI company's AD9783 at analog-to-digital conversion, AD9783 has binary channels output, 16 DAC precision, high-speed LVDS interface and 500 MHz's sampling clock rate, and differential analog current output can be at 8.6mA to 31.7mA full scale within range programming. The two channel outputs can be respectively connected with mutually independent radio frequency transformers, the conversion of digital signals is realized through the circuit structure shown in figure 1, and the converted analog signals are correspondingly coupled and subjected to impedance conversion, so that the signals are output as stable signal source signals.
In a preferred implementation, each channel output of each digital-to-analog converter connected to the processor includes a P port and an N port, and the processor may be connected to 4 rf transformers: the P port can be connected to a third input end of a first radio frequency transformer and a first input end of a second radio frequency transformer, the N port can be connected to a fifth input end of the first radio frequency transformer and a third input end of the second radio frequency transformer, a fourth input end of the first radio frequency transformer and a second input end of the second radio frequency transformer are grounded, a first output end of the first radio frequency transformer is connected with a fourth output end of the second radio frequency transformer, and a second output end of the first radio frequency transformer is connected with a fifth output end of the second radio frequency transformer; the second output end of the first radio frequency transformer is further connected to a third input end of a third radio frequency transformer and a first input end of a fourth radio frequency transformer, the first output end of the first radio frequency transformer is further connected to a fifth input end of the third radio frequency transformer and a third input end of the fourth radio frequency transformer, the fourth input end of the third radio frequency transformer and the second input end of the fourth radio frequency transformer are grounded, the second output end of the third radio frequency transformer is connected to a fifth output end of the fourth radio frequency transformer to output the signal source signal, and the first output end of the third radio frequency transformer is connected to the fourth output end of the fourth radio frequency transformer and grounded.
Wherein, in each of the radio frequency transformers: the first radio frequency transformer can be selected as ADTL 1-12; the second radio frequency transformer can be selected as TC 1-1-13M; the third radio frequency transformer can be selected as ADT 2-1T-1P; the fourth radio frequency transformer can be selected as TC 2-1T.
In order to control the signal output to be stable, the P port and the N port can be grounded through two resistors respectively. The utility model discloses a multichannel signal source specifically adopts 6 AD9783, utilizes the 2 way outputs that every AD9783 has, can export 12 way signals simultaneously altogether. The FPGA core in the processor can simultaneously program any output waveform of the signal through abundant logic resources and strong parallel processing capability.
In order to realize the control of the digital-to-analog converter, the SPI port, the RESET pin and the differential parallel data port of the digital-to-analog converter AD9783 are connected to an FPGA core of the processor. The parallel data port comprises an LVDS high-speed differential port with a parallel data input clock and an output clock connected to the FPGA core, and a sampling clock of the AD9783 introduces a differential clock signal of 200Mhz to 500Mhz from the outside to realize the control of the output signal time sequence.
In order to ensure the stable operation of the digital-to-analog converter, the input power supply of each digital-to-analog converter is respectively connected with the ceramic chip capacitors with the capacitance values of 10uF, 0.1uF, 1nF and 0.1nF shown in fig. 3, and the capacitors are arranged as close as possible to the AD9783 to eliminate the interference and harmonic waves thereof which can be generated on the power supply.
Therefore, the AD9783 digital-to-analog converter outputs 2 paths of differential signals, and the signals are converted into single-ended signals through the radio frequency transformer; the direct current component in the radio frequency transformer is isolated, and the purposes of signal coupling and impedance conversion are realized simultaneously, so that an output signal with higher quality can be obtained.
Those of ordinary skill in the art will understand that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that modifications may be made to the embodiments described in the foregoing embodiments, or equivalents may be substituted for elements thereof. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (9)

1. A multiple signal source, comprising:
a power supply outputting a power supply voltage;
a digital signal port outputting a digital signal;
a plurality of digital-to-analog converters, each of which is connected to each of the digital signal ports, respectively receives the digital signals output by each of the digital signal ports, and outputs analog signals corresponding to the digital signals;
and the radio frequency transformer comprises a plurality of transformers which are respectively connected with the output end of each digital-to-analog converter, and is used for coupling and impedance conversion of each path of analog signal output by the digital-to-analog converter and outputting the analog signal as a stable signal source signal.
2. The multiple signal source of claim 1, wherein the digital signal port is a PL port of an XZC7045 chip.
3. The multiple signal source of claim 1, wherein the digital-to-analog converter is AD 9783.
4. The multi-channel signal source of claim 3, wherein the digital-to-analog converter has two channel outputs, and the two channel outputs are respectively connected to independent RF transformers.
5. The multiple signal source of claim 3, wherein each of said digital-to-analog converters is coupled to a respective power input circuit comprising 4 capacitors of different capacitance values coupled in parallel with each other between a power source and a power supply terminal input of said digital-to-analog converter.
6. The multi-channel signal source of claim 5, wherein the capacitors are ceramic patch capacitors, the ceramic patch capacitors are disposed proximate to the digital-to-analog converter, and the capacitance values of the ceramic patch capacitors are 10uF, 0.1uF, 1nF, and 0.1nF, respectively.
7. The multi-channel signal source of claim 3, wherein each channel output of each of said digital-to-analog converters comprises a P port and an N port, respectively, to which 4 RF transformers are connected, wherein the P port and the N port are respectively grounded through two resistors, the P port is connected to the third input end of the first radio frequency transformer and the first input end of the second radio frequency transformer, the N port is connected to the fifth input end of the first radio frequency transformer and the third input end of the second radio frequency transformer, the fourth input terminal of the first radio frequency transformer and the second input terminal of the second radio frequency transformer are grounded, the first output end of the first radio frequency transformer is connected with the fourth output end of the second radio frequency transformer, the second output end of the first radio frequency transformer is connected with the fifth output end of the second radio frequency transformer; the second output end of the first radio frequency transformer is further connected to a third input end of a third radio frequency transformer and a first input end of a fourth radio frequency transformer, the first output end of the first radio frequency transformer is further connected to a fifth input end of the third radio frequency transformer and a third input end of the fourth radio frequency transformer, the fourth input end of the third radio frequency transformer and the second input end of the fourth radio frequency transformer are grounded, the second output end of the third radio frequency transformer is connected to a fifth output end of the fourth radio frequency transformer to output the signal source signal, and the first output end of the third radio frequency transformer is connected to the fourth output end of the fourth radio frequency transformer and grounded.
8. The multi-channel signal source of claim 7, wherein the first rf transformer is ADTL 1-12; the second radio frequency transformer is TC 1-1-13M; the third radio frequency transformer is ADT 2-1T-1P; the fourth radio frequency transformer is TC 2-1T.
9. The multiple signal source of claim 2, wherein said digital-to-analog converter comprises 6 digital converters respectively connected to each of said PL terminals of a XZC7045 chip.
CN202020634382.4U 2020-04-23 2020-04-23 Multi-channel signal source Expired - Fee Related CN211557268U (en)

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CN202020634382.4U CN211557268U (en) 2020-04-23 2020-04-23 Multi-channel signal source

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Application Number Priority Date Filing Date Title
CN202020634382.4U CN211557268U (en) 2020-04-23 2020-04-23 Multi-channel signal source

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CN211557268U true CN211557268U (en) 2020-09-22

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