CN210955055U - Display control computer motherboard framework based on soar - Google Patents

Display control computer motherboard framework based on soar Download PDF

Info

Publication number
CN210955055U
CN210955055U CN202020176392.8U CN202020176392U CN210955055U CN 210955055 U CN210955055 U CN 210955055U CN 202020176392 U CN202020176392 U CN 202020176392U CN 210955055 U CN210955055 U CN 210955055U
Authority
CN
China
Prior art keywords
bus
pcie
cpcie
connector
cpcie connector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202020176392.8U
Other languages
Chinese (zh)
Inventor
朱凯
吴之光
沈忱
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shandong Chaoyue CNC Electronics Co Ltd
Original Assignee
Shandong Chaoyue CNC Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shandong Chaoyue CNC Electronics Co Ltd filed Critical Shandong Chaoyue CNC Electronics Co Ltd
Priority to CN202020176392.8U priority Critical patent/CN210955055U/en
Application granted granted Critical
Publication of CN210955055U publication Critical patent/CN210955055U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Abstract

A display control computer motherboard architecture based on Feiteng includes: the system comprises a Feiteng processor, an PCIE SWITCH chip, a CPCIE connector and a BMC management controller connected with the CPCIE connector. The JM7200 display chip of Jingjiawei is connected with the processor through the PCIE X8 bus, so that the connection structure of the domestic CPU and the domestic GPU is realized, and two JM7200 display chips can be arranged to realize the interconnection of the double display cards. The USB controller and the network controller are arranged to realize USB communication and network communication, and high speed and high bandwidth of various data buses are ensured.

Description

Display control computer motherboard framework based on soar
Technical Field
The utility model relates to a computer field, concretely relates to show accuse computer motherboard framework based on feiteng.
Background
Information security is an important index in future information-based warfare, and in the environment of network combat, places where enemies can initiate information attacks are ubiquitous, so that the enemies cannot defend the warfare. The graphic processing of modern computers becomes more and more important, and a special graphic processor is needed to undertake the display task so as to meet the requirements of various fields such as aerospace navigation, satellite data processing, biomedical research and the like on high-performance display and control.
The research of high-performance display control computers in foreign countries is very deep, mature software and hardware products are more, and the research in this respect in China is started later, and particularly the high-performance display control computers completely based on domestic CPUs and domestic GPUs are still a blank.
Disclosure of Invention
The utility model discloses an overcome not enough of above technique, provide a show accuse computer motherboard framework based on flying based on domestic flying CPU and the little GPU of scene.
The utility model overcomes the technical scheme that its technical problem adopted is:
a display control computer motherboard architecture based on Feiteng includes:
the device comprises a Feiteng processor, PCIE SWITCH chips, a CPCIE connector and a BMC management controller connected with the CPCIE connector, wherein the PCIE SWITCH chip is connected with the Feiteng processor through a PCIE X16 bus, the CPCIE connector is connected with the CPCIE connector through a plurality of PCIE X4 buses, and the BMC management controller is connected with a PCIESWITCH chip through a PCIE X1 bus;
the SO-DIMM memory slots are connected with the Feiteng processor;
the system comprises a plurality of JM7200 chips, wherein the input ends of the JM7200 chips are connected to a Feiteng processor through a PCIE X8 bus, and the output ends of the JM7200 chips are connected to a CPCIE connector through an HDMI bus;
the input end of the USB controller is connected to the Feiteng processor through a PCIE X1 bus, and the output end of the machine is connected to the CPCIE connector through a USB bus;
the input end of the network controller is connected to the PCIE SWITCH chip through a PCIE X4 bus, the output end of the network controller is connected to the input end of the network transformer, and the output end of the network transformer is connected to the CPCIE connector; and
and the input end of the level shifter is connected to the Feiteng processor, the output end of the level shifter is connected to the CPCIE connector, and the level shifter converts the TTL level sent by the Feiteng processor into 232 level.
Further, the Feiteng processor is an FT2000-4 processor.
Furthermore, the device also comprises an M.2 slot which is connected with the PCIE SWITCH chip through a PCIE X4 bus.
Further, the level shifter is a TPT3232 type level shifter.
Furthermore, the device also comprises a CAN transceiver, wherein the input end of the CAN transceiver is connected to the Feiteng processor through a CAN bus, and the output end of the CAN transceiver is connected to the CPCIE connector through the CAN bus.
The technical scheme includes that the device comprises a power amplifier, a loudspeaker and an LIN IN/OUT interface, wherein the power amplifier is connected with the CPCIE connector through a loudspeaker, the LIN IN/OUT interface is connected with the CPCIE connector, and the loudspeaker is connected with the power amplifier.
The utility model has the advantages that: the JM7200 display chip of Jingjiawei is connected with the processor through a PCIEX8 bus, so that the connection structure of the domestic CPU and the domestic GPU is realized, and two JM7200 display chips can be arranged to realize the interconnection of the double display cards. The USB controller and the network controller are arranged to realize USB communication and network communication, and high speed and high bandwidth of various data buses are ensured.
Drawings
Fig. 1 is a system architecture diagram of the present invention.
Detailed Description
The present invention will be further explained with reference to fig. 1.
A display control computer motherboard architecture based on Feiteng includes: the device comprises a Feiteng processor, PCIE SWITCH chips, a CPCIE connector and a BMC management controller connected with the CPCIE connector, wherein the PCIE SWITCH chip is connected with the Feiteng processor through a PCIE X16 bus, the CPCIE connector is connected with the CPCIE connector through a plurality of PCIE X4 buses, and the BMC management controller is connected with a PCIE SWITCH chip through a PCIE X1 bus; the SO-DIMM memory slots are connected with the Feiteng processor; the system comprises a plurality of JM7200 chips, wherein the input ends of the JM7200 chips are connected to a Feiteng processor through a PCIE X8 bus, and the output ends of the JM7200 chips are connected to a CPCIE connector through an HDMI bus; the input end of the USB controller is connected to the Feiteng processor through a PCIE X1 bus, and the output end of the machine is connected to the CPCIE connector through a USB bus; the input end of the network controller is connected to the PCIE SWITCH chip through a PCIEX4 bus, the output end of the network controller is connected to the input end of the network transformer, and the output end of the network transformer is connected to the CPCIE connector; and the input end of the level shifter is connected with the Feiteng processor, the output end of the level shifter is connected with the CPCIE connector, and the level shifter converts the TTL level sent by the Feiteng processor into 232 level. The JM7200 display chip of Jingjiawei is connected with the processor through the PCIE X8 bus, so that the connection structure of the domestic CPU and the domestic GPU is realized, and two JM7200 display chips can be arranged to realize the interconnection of the double display cards. The USB controller and the network controller are arranged to realize USB communication and network communication, and high speed and high bandwidth of various data buses are ensured.
Further, the Feiteng processor is an FT2000-4 type processor. FT2000-4 is the latest desktop treater of Feiteng, and the performance is excellent, can satisfy each index.
The device also comprises an M.2 slot which is connected with the PCIE SWITCH chip through a PCIE X4 bus. The solid state disk or other equipment of the M.2 interface can be installed through the M.2 structure.
Preferably, the level shifter is a TPT3232 type level shifter.
Furthermore, the device also comprises a CAN transceiver, wherein the input end of the CAN transceiver is connected to the Feiteng processor through a CAN bus, and the output end of the CAN transceiver is connected to the CPCIE connector through the CAN bus. By arranging the CAN transceiver, CAN bus communication CAN be realized.
The technical scheme includes that the device comprises a power amplifier, a loudspeaker and an LIN IN/OUT interface, wherein the power amplifier is connected with the CPCIE connector through a loudspeaker, the LIN IN/OUT interface is connected with the CPCIE connector, and the loudspeaker is connected with the power amplifier. Thereby realizing the input and output of audio and the output of sound through the loudspeaker.
The above description is only a preferred embodiment of the present invention, and is only used to illustrate the technical solutions of the present invention, and not to limit the protection scope of the present invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention shall fall within the protection scope of the present invention.

Claims (6)

1. The utility model provides a show accuse computer motherboard framework based on it is soar, includes:
the device comprises a Feiteng processor, PCIE SWITCH chips, a CPCIE connector and a BMC management controller connected with the CPCIE connector, wherein the PCIE SWITCH chip is connected with the Feiteng processor through a PCIE X16 bus, the CPCIE connector is connected with the CPCIE connector through a plurality of PCIE X4 buses, and the BMC management controller is connected with a PCIESWITCH chip through a PCIE X1 bus;
the SO-DIMM memory slots are connected with the Feiteng processor;
the system comprises a plurality of JM7200 chips, wherein the input ends of the JM7200 chips are connected to a Feiteng processor through a PCIE X8 bus, and the output ends of the JM7200 chips are connected to a CPCIE connector through an HDMI bus;
the input end of the USB controller is connected to the Feiteng processor through a PCIE X1 bus, and the output end of the machine is connected to the CPCIE connector through a USB bus;
the input end of the network controller is connected to the PCIE SWITCH chip through a PCIE X4 bus, the output end of the network controller is connected to the input end of the network transformer, and the output end of the network transformer is connected to the CPCIE connector; and
and the input end of the level shifter is connected to the Feiteng processor, the output end of the level shifter is connected to the CPCIE connector, and the level shifter converts the TTL level sent by the Feiteng processor into 232 level.
2. The FT-based display and control computer motherboard architecture of claim 1, wherein: the Feiteng processor is an FT2000-4 type processor.
3. The FT-based display and control computer motherboard architecture of claim 1, wherein: the chip also comprises an M.2 slot which is connected with the PCIE SWITCH chip through a PCIE X4 bus.
4. The FT-based display and control computer motherboard architecture of claim 1, wherein: the level shifter is a TPT3232 type level shifter.
5. The FT-based display and control computer motherboard architecture of claim 1, wherein: the input end of the CAN transceiver is connected to the Feiteng processor through a CAN bus, and the output end of the CAN transceiver is connected to the CPCIE connector through the CAN bus.
6. The FT-based display and control computer motherboard architecture of claim 1, wherein: the technical scheme is that the device comprises a power amplifier, a loudspeaker and an LIN IN/OUT interface, wherein the power amplifier is connected with the CPCIE connector through a loudspeaker, the LIN IN/OUT interface is connected with the CPCIE connector, and the LIN IN/OUT interface is connected with the CPCIE connector.
CN202020176392.8U 2020-02-18 2020-02-18 Display control computer motherboard framework based on soar Active CN210955055U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202020176392.8U CN210955055U (en) 2020-02-18 2020-02-18 Display control computer motherboard framework based on soar

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202020176392.8U CN210955055U (en) 2020-02-18 2020-02-18 Display control computer motherboard framework based on soar

Publications (1)

Publication Number Publication Date
CN210955055U true CN210955055U (en) 2020-07-07

Family

ID=71377123

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202020176392.8U Active CN210955055U (en) 2020-02-18 2020-02-18 Display control computer motherboard framework based on soar

Country Status (1)

Country Link
CN (1) CN210955055U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112579517A (en) * 2020-12-30 2021-03-30 合肥市卓怡恒通信息安全有限公司 CPCIE main control board based on Feiteng platform

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112579517A (en) * 2020-12-30 2021-03-30 合肥市卓怡恒通信息安全有限公司 CPCIE main control board based on Feiteng platform

Similar Documents

Publication Publication Date Title
MX2012014354A (en) Systems and methods for dynamic multi-link compilation partitioning.
CN204009696U (en) A kind of Godson mainboard with PCIE expanded function
US9529743B2 (en) Flexible PCIe routing
US20130173838A1 (en) Bridge between a peripheral component interconnect express interface and a universal serial bus 3.0 device
CN110908475A (en) Shenwei 1621CPU ICH-free 2 suite server mainboard
CN211427336U (en) Embedded VPX calculation module
CN202383569U (en) Mainboard with multifunctional extensible peripheral component interconnect express (PCIE) interface device
CN210955055U (en) Display control computer motherboard framework based on soar
CN109410117B (en) Graphics processor system
CN109213717B (en) Double-bridge-plate framework of domestic Feiteng processor
EP3637270A1 (en) External electrical connector and computer system
EP2696292A1 (en) Expansion module
CN217880139U (en) Notebook computer
CN218213983U (en) Data computing system and server with built-in data computing system
CN111124973A (en) Reinforced server mainboard based on FT-1500A-16 processor
CN213581897U (en) Novel display control calculation module
CN213987493U (en) Machine vision system mainboard supporting multi-network-port and PCI-E golden finger expansion
EP2693342A1 (en) Data routing system supporting dual master apparatuses
US20140317320A1 (en) Universal serial bus devices supporting super speed and non-super speed connections for communication with a host device and methods using the same
US8688875B2 (en) Host electronic device and host determination method
CN211454416U (en) VPX 3U computer mainboard based on explain 121 treater
CN214151687U (en) Many serial ports extension, many USB's special mainboard of finance based on godson platform
CN212694410U (en) Novel display control calculation module
CN211293931U (en) Embedded CPCI calculation module
US10860058B2 (en) Expandable electronic computing system

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant