CN210837767U - GaN-based HEMT device - Google Patents

Abstract

The utility model discloses a gaN base HEMT device, supreme in proper order is mixed with gaN neutralization layer, intrinsic Al in drain electrode, substrate, current barrier layer, conduction through-hole, Mg and Si from down followed to the structure_xGa_1‑xThe N-GaN-based light-emitting diode comprises an N gradual change layer, an N-GaN cap layer, a source electrode, a passivation layer and a grid electrode. The intrinsic Al_xGa_1‑xTwo-dimensional electron gas channels are distributed in the N gradient layer, the source electrode is electrically connected with the N-GaN cap layer, the grid electrode is located on the passivation layer, and the drain electrode is located on the back of the substrate. The current blockThe layer is an insulating layer, the corresponding area under the grid of the insulating layer is an N-type current conduction through hole with high electron concentration, the cross section of the conduction through hole is in an inverted trapezoid shape, the structure is favorable for healing, and the problems of electric leakage of a gap area and the like can be effectively relieved. The utility model provides a pair of gaN base HEMT device has high withstand voltage, low electric leakage and advantages such as simple process.

Description

A GaN-based HEMT device

technical field

The utility model relates to the technical field of semiconductor manufacturing, in particular to a GaN-based HEMT device.

Background technique

GaN-based HEMT is a development hotspot at home and abroad, and has made breakthroughs in many fields, especially in high temperature, high power and high frequency, and has broad application prospects. At present, in the power electronics industry, silicon and sapphire substrates occupy the mainstream position, but sapphire material is a thermal insulating material, which cannot meet the heat dissipation requirements of GaN-based HEMTs, and both substrates have lattice mismatch in epitaxial growth, etc. problems, making it difficult to obtain high-quality heterojunctions. Therefore, it is urgent to find a suitable substrate. In addition, the conventional horizontal structure GaN-based HEMT has problems such as current collapse, high voltage resistance and poor reliability, so the vertical structure GaN-based HEMT is a major focus of current research.

GaN-based HEMT works by controlling the two-dimensional electron gas in the channel by Schottky gate voltage. When low-composition AlGaN is used as the buffer layer instead of the traditional GaN buffer layer, the Al _x Ga _1-x N graded layer can be formed. The multi-heterojunction increases the concentration of the two-dimensional electron gas in the channel, which is beneficial to the realization of enhancement mode devices. In addition, current blocking layers and vias have always been the difficulties in the development of vertical structure GaN-based HEMTs. On the one hand, the current blocking layer can be formed by Mg implantation or Mg doping to form P-GaN. P-GaN has a higher potential barrier and can inhibit leakage and thus act as a current blocking layer, but Mg has a low activation efficiency and has a memory effect. , which hinders secondary epitaxial growth; on the other hand, materials with better insulating properties, such as SiO ₂ , etc., need to be solved, but problems such as voids generated during the healing process caused by lateral epitaxial growth need to be solved, which is also a research hotspot today. one.

Utility model content

The utility model aims to provide a GaN-based HEMT device and a manufacturing method thereof, so as to overcome the deficiencies in the prior art and obtain a HEMT device with high withstand voltage, low leakage and simple process.

In order to achieve the above purpose, the present invention is achieved through the following technical solutions.

The utility model provides a GaN-based HEMT device, which comprises a substrate, a current blocking layer, a conductive through hole, a Mg-Si co-doped GaN neutralization layer, an intrinsic AlxGa1 _{- xN} graded layer, N-GaN cap layer, passivation layer, source, gate and drain, the intrinsic AlxGa1 _{- xN} graded layer includes intrinsic _AlxGa1 with Al composition _x increasing sequentially from 0.01 to 0.28 _-x N graded layer and two-dimensional electron gas channel in the heterojunction; the drain is located on the back side of the substrate; the current blocking layer, Mg-Si co-doping layer is arranged on the front side of the substrate sequentially from bottom to top GaN neutralization layer, intrinsic AlxGa1 _{- xN} graded layer, N-GaN cap layer and passivation layer; the intrinsic AlxGa1 _{- xN} graded layer in Mg-Si co-doped GaN neutralization layer Arranged sequentially from top to bottom, the intrinsic Al _x Ga _1-x N graded layer is distributed with a two-dimensional electron gas channel; the source includes a first source and a second source on both sides of the passivation layer the first source electrode and the second source electrode are electrically connected to the N-GaN cap layer through the passivation layer; the gate electrode is located between the first source electrode and the second source electrode, and is in contact with the passivation layer; The via hole is located in the corresponding area under the gate of the current blocking layer, the cross section of the via hole is in the shape of an inverted trapezoid, the height of the via hole is the same as the thickness of the current blocking layer, and the bottom hole of the via hole is in the shape of an inverted trapezoid. In contact with the front side of the substrate, the upper surface of the via hole is in contact with the second semiconductor layer.

Preferably, the substrate is an N-type GaN free-standing substrate.

Preferably, the current blocking layer is a SiO ₂ layer, and the thickness of the current blocking layer is d ₁ , and 100 nm<d ₁ <700 nm.

Preferably, the conduction through hole is an N-type current conduction through hole with high electron concentration, the carrier concentration is greater than 10 ¹⁸ cm ⁻³ , and is doped with Si ions.

Preferably, the pore diameter of the upper surface hole of the through hole is R, 1 μm<R<20 μm, and the pore diameter of the lower surface hole is r, 50nm<r<500nm.

Preferably, the thickness of the Mg and Si co-doped GaN neutralization layer is 1-10 nm.

Preferably, the total thickness of the intrinsic AlxGa1 _{- xN} graded layer is 1-3 μm.

Preferably, the carrier concentration of the N-type GaN cap layer is greater than 10 ¹⁸ cm ^-3 , and the thickness of the N-type GaN cap layer is 1-10 nm; the passivation layer is a Si ₃ N ₄ layer, and the passivation layer has a thickness of 1-10 nm. The thickness is 30 to 100 nm.

Preferably, the value of Al composition x from bottom to top in the intrinsic AlxGa1 _{- xN} graded layer gradually increases from 0.01 to 0.28, and the corresponding thickness of the AlxGa1 _{- xN} layer gradually decreases .

Preferably, a two-dimensional electron gas is formed in the two-dimensional electron gas channel.

In a GaN-based HEMT device provided by the present invention, the diameters R and r of the through holes, the thickness of the current blocking layer, the thickness of the Mg and Si co-doped GaN neutralization layer, the intrinsic Al _x Ga _1-x N The total thickness of the graded layer, the thickness of the N-GaN cap layer, the thickness of the passivation layer, the distance between the gate and the source, and the gate width and length are all variable.

Compared with the prior art, the utility model has the following beneficial effects:

First, the device adopts an N-GaN self-supporting substrate, which can effectively alleviate the problem of low heterojunction quality caused by lattice mismatch and thermal mismatch in epitaxial growth, and is conducive to the connection with the backside of the substrate. The drain forms an ohmic contact;

Second, the device is a vertical conductance structure, which can effectively solve the problems of current collapse, inability to withstand high voltage, and poor reliability of conventional horizontal structure HEMTs;

Third, the current blocking layer is made of SiO ₂ , and the corresponding area under the gate is an N-type current conduction through hole with high electron concentration, and the cross section of the conduction through hole is in the shape of an inverted trapezoid. This structure is conducive to healing and can Effectively alleviate problems such as leakage in the void area;

Fourth, a low-Al composition AlGaN layer is used to replace the GaN buffer layer in the traditional structure. This structure can form a multi-heterojunction, increase the concentration of two-dimensional electron gas in the channel, and thus improve the current density.

Description of drawings

In order to illustrate the technical solutions in the present invention or the prior art more clearly, the following briefly introduces the accompanying drawings that are required in the description of the present utility model or the prior art. On the premise of paying creative work, other drawings can also be obtained based on these drawings.

Fig. 1 is the overall structure schematic diagram of a kind of GaN-based HEMT device provided by the utility model;

FIG. 2 is a schematic diagram of the specific structure of the intrinsic Al _x Ga _1-x N graded layer provided by the present invention.

Detailed ways

In order to make the objectives, technical solutions and advantages of the present utility model more clear, the specific embodiments of the present utility model are described in detail below with reference to the accompanying drawings. The embodiments of the present invention shown in the drawings and described with reference to the drawings are merely exemplary, and the present invention is not limited to these embodiments. All other embodiments obtained by those of ordinary skill in the art without creative work fall within the protection scope of the present invention.

Figure 1, a GaN-based HEMT device, the structure is neutralized from bottom to top by drain 1, N-type GaN free-standing substrate 2, current blocking layer 3, via 4, Mg and Si co-doped GaN Layer 5, intrinsic AlxGa1 _{- xN} graded layer 6, N-GaN cap layer 7, passivation layer 8, source 9 and gate 10, the gate 10 is located at the first source 901 and the second source Between 902. The thickness of the current blocking layer 3 is 400 nm, the upper surface diameter R of the high electron concentration N-type current conduction through hole 4 is 1 μm, the lower surface diameter r is 400 nm, the thickness of the Mg and Si co-doped GaN neutralization layer 5 is 6 nm, and the N - The thickness of the GaN cap layer 7 is 3 nm, and the thickness of the passivation layer 8 is 60 nm.

Figure 2 shows the specific structure of the intrinsic AlxGa1 _{- xN} graded layer, there are 10 layers from bottom to top, marked as 601, 602, 603, 604, 605, 606, 607, 608, 609 and 610, respectively, The dotted line part refers to the two-dimensional electron gas channel 611, and the two-dimensional electron gas channel 611 contains the two-dimensional electron gas. The x values (corresponding thickness of each layer) in layers 601, 602, 603, 604, 605, 606, 607, 608, 609 and 610 are: 0.01 (500nm), 0.04 (300nm), 0.07 (250nm), 0.10 (230nm), 0.13(200nm), 0.16(160nm), 0.19(80nm), 0.22(40nm), 0.25(20nm), 0.28(10nm), namely the total thickness of the intrinsic AlxGa1 _{- xN} graded layer is 1790nm.

The utility model provides a manufacturing method of a GaN-based HEMT device, comprising the following steps:

S1, using PECVD equipment to deposit and grow a layer of SiO ₂ with a thickness of 400 nm on the front side of the N-type GaN self-supporting substrate 2 as the current blocking layer 3;

S2. After pretreatment, spin coating adhesive, gluing, developing, and wet etching to form a mesa in the via area with an inverted trapezoidal cross-section, a patterned substrate epitaxial wafer is obtained;

S3. The formed patterned substrate epitaxial wafer is first pretreated, and placed in a 200°C oven for 2 hours before the MOCVD epitaxial growth is performed to remove the surface moisture and impurities to prepare for the MOCVD epitaxial growth, and then the patterned lining The bottom epitaxial wafer is placed in the reaction chamber of the MOCVD system, a layer of Si heavily doped GaN layer is epitaxially grown, and it is filled with the via hole 4 whose cross section is in the shape of an inverted trapezoid;

S4. The epitaxial wafer obtained after being processed by S3 is pretreated, and the surface moisture and impurities are removed after drying in an oven at 200° C. for 2 hours. ) as group III source, ammonia as group V source, dipentamagnesium Cp ₂ Mg and high-purity silane SiH ₄ as P-type and N-type dopants, respectively, and high-purity hydrogen as carrier gas to grow Mg and Si co-doped GaN neutralization layer 5;

S5, then feed ammonia, trimethyl aluminum and trimethyl gallium, and MOCVD epitaxially grows the intrinsic Al _x Ga _1-x N graded layer 6;

S6, an N-GaN cap layer 7 is epitaxially grown on the intrinsic AlxGa1 _{- xN} graded layer 6, so that it can form an ohmic contact with the source electrode 9 later;

S7. The epitaxial wafer after the S6 treatment is firstly cleaned with an organic solution, rinsed with deionized water and purged with high-purity nitrogen, and then a passivation layer 8 such as silicon nitride is deposited by PECVD equipment;

S8, source ohmic contact: perform photolithography and etching on the epitaxial wafer on which the silicon nitride passivation layer 8 is deposited to form a source 9, and put it into an electron beam deposition platform to deposit ohmic contact metal Ti/Al/Ni/Au ( 20nm/110nm/40nm/130nm) and peel off cleaning;

S9. Drain ohmic contact: After the source ohmic contact, make the drain ohmic contact on the back of the substrate 2, and also use electron beam deposition of Ti/Al/Ni/Au (20nm/110nm/40nm/130nm) and peel off cleaning, complete The metal is alloyed later to obtain ohmic contact, the alloying temperature is 750°C, and the alloying time is 40 seconds;

S10. After the alloying treatment of the sample is completed, photolithography and development are performed, the active region is protected by a photoresist mask, and fluorine ions are implanted to form device isolation;

S11. Gate Schottky contact: After the mesa isolation is completed, the gate 10 is formed by cleaning and photolithography, and Ni/Au (30nm/130nm) is also deposited by electron beam and stripped and cleaned. The annealing temperature is 400°C in a nitrogen atmosphere. , annealing under the condition of 10min annealing time to form Schottky contact, and complete the fabrication of the whole device.

The embodiment of the present invention adopts a novel vertical structure and utilizes a self-supporting GaN substrate, which can effectively solve the problems of current collapse, high voltage resistance and poor reliability existing in conventional horizontal structure GaN-based HEMT devices. The use of SiO ₂ as the current blocking layer can reduce the leakage of vertical conductance HEMTs through the current blocking layer under high leakage voltage conditions, thereby increasing the device breakdown voltage to 1.8kV. In addition, the cross section of the conduction through hole is in the shape of an inverted trapezoid, which is beneficial to healing and can effectively alleviate problems such as leakage of the current blocking layer. A low Al composition AlGaN layer is used to replace the GaN buffer layer in the traditional structure, and a multi-heterojunction can be formed in the intrinsic Al _x Ga _1-x N graded layer, which increases the two-dimensional electron gas concentration in the channel and increases the current density to 2kA/cm ² .

The above descriptions are only preferred embodiments of the present invention, and do not limit the present invention in any form. Any equivalent changes, modifications or evolutions made by those skilled in the art to the above embodiments by utilizing the technical solutions of the present invention still fall within the scope of the technical solutions of the present invention.

Claims (10)

1. The GaN-based HEMT device is characterized by comprising a substrate (2), a current blocking layer (3), a through via (4), a Mg-Si co-doped GaN neutralizing layer (5) and intrinsic Al_xGa_1-xAn N gradual change layer (6), an N-GaN cap layer (7), a passivation layer (8), a source electrode (9), a grid electrode (10) and a drain electrode (1), wherein the intrinsic Al is_xGa_1-xThe N-graded layer (6) comprises intrinsic Al with Al components x increasing from 0.01 to 0.28_xGa_1-xA two-dimensional electron gas channel (611) in the N-graded layer and the heterojunction; the drain electrode (1) is positioned on the back surface of the substrate (2); a current barrier layer (3), a Mg-Si co-doped GaN neutralizing layer (5) and intrinsic Al are sequentially arranged on the front surface of the substrate (2) from bottom to top_xGa_1-xAn N gradual change layer (6), an N-GaN cap layer (7) and a passivation layer (8); the intrinsic Al_xGa_1-xThe N gradual change layers are sequentially arranged on the Mg-Si co-doped GaN neutralization layer (5) from bottom to top, and intrinsic Al_xGa_1-xTwo-dimensional electron air channels (611) are distributed in the N gradual change layer; the source electrode (9) comprises a first source electrode (901) and a second source electrode (902) which are arranged on two sides of the upper surface of the passivation layer (8), and the first source electrode (901) and the second source electrode (902) are electrically connected with the N-GaN cap layer (7) through the passivation layer (8); the gate (10) is positioned between the first source electrode (901) and the second source electrode (902) and is in contact with the passivation layer (8); the conducting through hole (4) is located in a corresponding area below a grid of the current blocking layer (3), the cross section of the conducting through hole (4) is in an inverted trapezoid shape, the height of the conducting through hole (4) is the same as the thickness of the current blocking layer (3), a lower surface hole of the conducting through hole (4) is in contact with the front surface of the substrate (2), and an upper surface hole of the conducting through hole (4) is in contact with the Mg-Si co-doped GaN neutralizing layer (5).

2. A GaN-based HEMT device according to claim 1, wherein said substrate (2) is an N-type GaN free-standing substrate.

3. The GaN-based HEMT device according to claim 1, wherein the current blocking layer (3) is SiO₂The thickness of the insulating layer and the current blocking layer (3) is d₁，100 nm＜d₁＜700 nm。

4. The GaN-based HEMT device according to claim 1, wherein the via (4) is a high electron concentration N-type current via with a carrier concentration greater than 10¹⁸cm^-3And doping with Si ions.

5. A GaN-based HEMT device according to claim 1, wherein said through via (4) has an upper surface hole with a pore size R of 1 μm < R <20 μm and a lower surface hole with a pore size R of 50nm < R <500 nm.

6. The GaN-based HEMT device according to claim 1, wherein the thickness of the Mg-Si co-doped GaN neutralizing layer (5) is 1 to 10 nm.

7. The GaN-based HEMT device of claim 1, wherein the intrinsic Al is_xGa_1-xThe total thickness of the N-graded layer (6) is 1 to 3 μm.

8. The GaN-based HEMT device according to claim 1, characterized in that the N-type GaN cap layer (7) has a carrier concentration greater than 10¹⁸cm^-3The thickness of the N-type GaN cap layer (7) is 1-10 nm; the passivation layer (8) is Si₃N₄The thickness of the passivation layer (8) is 30-100 nm.

9. The GaN-based HEMT device of claim 1, wherein the intrinsic Al is_xGa_1-xThe value of the Al component x in the N gradual change layer (6) from bottom to top is gradually increased from 0.01Increased to 0.28, corresponding intrinsic Al_xGa_1-xThe thickness of the N gradual change layer (6) is gradually reduced.

10. The GaN-based HEMT device according to claim 1, wherein a two-dimensional electron gas is formed within the two-dimensional electron gas channel (611).

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