CN210805734U - Ultra-thin small volume packaging structure of chip - Google Patents

Ultra-thin small volume packaging structure of chip Download PDF

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Publication number
CN210805734U
CN210805734U CN201921666477.8U CN201921666477U CN210805734U CN 210805734 U CN210805734 U CN 210805734U CN 201921666477 U CN201921666477 U CN 201921666477U CN 210805734 U CN210805734 U CN 210805734U
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China
Prior art keywords
chip
base
base chip
ultra
pin
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Expired - Fee Related
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CN201921666477.8U
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Chinese (zh)
Inventor
谢云云
闫世亮
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Shanghai Bei Xin Semiconductor Technology Co ltd
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Shanghai Bei Xin Semiconductor Technology Co ltd
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Priority to CN201921666477.8U priority Critical patent/CN210805734U/en
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Abstract

The utility model discloses an ultra-thin small volume packaging structure of chip, including encapsulation shell, base chip and upper chip, the inner wall bottom veneer of encapsulation shell has the base chip, and the upper surface avris symmetrical welding of base chip has the connection pin, and the one end that the connection pin deviates from the pin feeler has the conducting resin seat with the hookup location department veneer of base chip, and the one end welding that the connection pin deviates from the base chip has the pin feeler, the lower surface soldering of upper chip has the tin ball, the tin ball soldering is on the upper surface of base chip, and the hookup location department of base chip and upper chip and tin ball all scribbles and has helped the soldering paste, and the upper surface of upper chip and the inner wall top of encapsulation shell contact each other, has seted up flutedly on the encapsulation shell, and the recess is located the outer wall upper surface intermediate position department of encapsulation shell. The utility model discloses, compact structure, the principle is simple, reduces the thickness of packaging body, makes its volume more miniaturized, satisfies consumer group's user demand.

Description

Ultra-thin small volume packaging structure of chip
Technical Field
The utility model relates to a chip package technical field specifically is an ultra-thin small volume packaging structure of chip.
Background
IC packaging refers to the routing of circuit pins on a silicon die to external connections for connection to other devices. The package form refers to a housing for mounting a semiconductor integrated circuit chip. The chip is not only used for mounting, fixing, sealing, protecting the chip and enhancing the electric heating performance, but also connected to pins of the packaging shell through the connection points on the chip by leads, and the pins are connected with other devices through the leads on the printed circuit board, thereby realizing the connection of the internal chip and an external circuit. Because the chip must be isolated from the outside to prevent the electrical performance degradation caused by the corrosion of the chip circuit by impurities in the air.
Ball mounting, i.e., ball grid array packaging.
At present, aiming at the requirements of miniaturization and intelligent products of market products, an IC packaging body is required to be smaller and smaller, and the existing chip packaging can not meet the use requirements of personnel.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide an ultra-thin little volume packaging structure of chip possesses compact structure, and the principle is simple, lowers the thickness of packaging body, makes its volume miniaturize more, satisfies consumer groups's user demand's advantage, solves at present to market product miniaturization, intelligent product demand, requires that the IC packaging body is more and more little, and current chip package can not satisfy personnel's user demand's problem.
In order to achieve the above object, the utility model provides a following technical scheme: the utility model provides an ultra-thin small size packaging structure of chip, is including encapsulation shell, base chip and upper chip, the inner wall bottom veneer of encapsulation shell has the base chip, and the upper surface avris symmetric welding of base chip has the connection pin, and the one end welding that the connection pin deviates from the base chip has the pin touch multitouch, the lower surface tin soldering of upper chip has the tin ball, the tin ball tin soldering is at the upper surface of base chip, and the upper surface of upper chip and the inner wall top of encapsulation shell contact each other.
Preferably, the packaging shell is provided with a groove, and the groove is located in the middle of the upper surface of the outer wall of the packaging shell.
Preferably, a conductive adhesive base is glued at the connecting position of one end of the connecting pin, which is far away from the pin contact block, and the base chip.
Preferably, the solder paste is coated on the connecting positions of the base chip, the upper chip and the solder balls.
Preferably, the connection pins are distributed symmetrically and equidistantly relative to the package shell, and the lower surfaces of the connection pins and the lower surface of the package shell are positioned on the same horizontal plane.
Compared with the prior art, the beneficial effects of the utility model are that: the utility model discloses the ultra-thin small volume packaging structure of chip makes its interconnection through the mode of planting the ball on the pad in the in-process of production, and the spheroid is the tin ball with the chip orientation of the inside not unidimensional of package cover facing each other, and its diameter can be adjusted by oneself according to the demand, like this greatly reduced the thickness of packaging body, make its volume miniaturization, compact structure, the principle is simple, satisfies consumer group's user demand.
Drawings
Fig. 1 is a schematic view of the structure of the present invention;
fig. 2 is a schematic top view of the present invention;
fig. 3 is a schematic view of the top-view appearance structure of the present invention.
In the figure: 1. a package housing; 2. a base chip; 3. tin balls; 4. an upper chip; 5. a conductive rubber base; 6. connecting pins; 7. a pin contact block; 8. and (4) a groove.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
In the description of the present invention, it should be noted that the terms "upper", "lower", "inner", "outer", "front end", "rear end", "both ends", "one end", "the other end" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplification of description, but do not indicate or imply that the device or element to which the reference is made must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "disposed," "connected," and the like are to be construed broadly, and for example, "connected" may be either fixedly connected or detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present invention can be understood in specific cases to those skilled in the art.
Referring to fig. 1 to fig. 3, the present invention provides an embodiment: an ultra-thin small-volume packaging structure of a chip comprises a packaging shell 1, a base chip 2 and an upper chip 4, wherein the base chip 2 is glued at the bottom end of the inner wall of the packaging shell 1, connecting pins 6 are symmetrically welded at the side edge of the upper surface of the base chip 2, one end of each connecting pin 6, which is far away from the base chip 2, is welded with a pin contact block 7, a solder ball 3 is welded on the lower surface of the upper chip 4, the solder ball 3 is soldered on the upper surface of the base chip 2, the connecting positions of the base chip 2, the upper chip 4 and the solder ball 3 are respectively coated with soldering paste, the upper surface of the upper chip 4 is in contact with the top end of the inner wall of the packaging shell 1, in the production process, the directions of chips with different sizes in the packaging shell 1 face each other, the chips are interconnected through a ball planting mode on a pad, the ball body is the solder ball 3, the diameter of the ball body can be automatically adjusted according to requirements, and the thickness, the volume is miniaturized, the structure is compact, the principle is simple, and the use requirements of consumer groups are met.
Connect pin 6 and deviate from pin feeler 7 one end and base chip 2's hookup location department veneer have conductive adhesive base 5, increase the inseparable degree of being connected of connecting pin 6 and base chip 2, connect pin 6 and be symmetrical equidistance distribution for encapsulation shell 1, and the lower surface of connecting pin 6 and the lower surface of encapsulation shell 1 are in same horizontal plane, and the structure of being convenient for keeps balance when placing.
The packaging shell 1 is provided with a groove 8, and the groove 8 is located in the middle of the upper surface of the outer wall of the packaging shell 1 and designates the position of printed product information.
The working principle is as follows: the utility model discloses the ultra-thin small volume packaging structure of chip makes its interconnection through the mode of planting the ball on the pad in the in-process of production, and the spheroid is tin ball 3 with the chip orientation of the inside not unidimensional of packaging shell 1 facing each other, and its diameter can be adjusted by oneself according to the demand, like this greatly reduced the thickness of packaging body, make its volume miniaturization.
It is obvious to a person skilled in the art that the invention is not restricted to details of the above-described exemplary embodiments, but that it can be implemented in other specific forms without departing from the spirit or essential characteristics of the invention. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.

Claims (5)

1. The utility model provides an ultra-thin small volume packaging structure of chip, includes encapsulation shell (1), base chip (2) and upper chip (4), its characterized in that: the inner wall bottom veneer of encapsulation shell (1) has base chip (2), and the upper surface avris symmetrical welding of base chip (2) has connection pin (6), and the one end welding that deviates from base chip (2) of connection pin (6) has pin touch multitouch (7), the lower surface tin welding of upper chip (4) has tin ball (3), tin ball (3) soldering is at the upper surface of base chip (2), and the upper surface of upper chip (4) and the inner wall top of encapsulation shell (1) contact each other.
2. The ultra-thin small volume package structure of a chip of claim 1, wherein: the packaging shell (1) is provided with a groove (8), and the groove (8) is located in the middle of the upper surface of the outer wall of the packaging shell (1).
3. The ultra-thin small volume package structure of a chip of claim 1, wherein: and a conductive adhesive base (5) is glued at the connecting position of one end of the connecting pin (6) departing from the pin contact block (7) and the base chip (2).
4. The ultra-thin small volume package structure of a chip of claim 1, wherein: and the connection positions of the base chip (2), the upper chip (4) and the solder balls (3) are coated with soldering paste.
5. The ultra-thin small volume package structure of a chip of claim 1, wherein: connect pin (6) and be symmetry equidistance distribution for encapsulation shell (1), and the lower surface of connecting pin (6) and the lower surface of encapsulation shell (1) are in on the same horizontal plane.
CN201921666477.8U 2019-10-08 2019-10-08 Ultra-thin small volume packaging structure of chip Expired - Fee Related CN210805734U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201921666477.8U CN210805734U (en) 2019-10-08 2019-10-08 Ultra-thin small volume packaging structure of chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201921666477.8U CN210805734U (en) 2019-10-08 2019-10-08 Ultra-thin small volume packaging structure of chip

Publications (1)

Publication Number Publication Date
CN210805734U true CN210805734U (en) 2020-06-19

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201921666477.8U Expired - Fee Related CN210805734U (en) 2019-10-08 2019-10-08 Ultra-thin small volume packaging structure of chip

Country Status (1)

Country Link
CN (1) CN210805734U (en)

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CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20200619

Termination date: 20201008