CN210670010U - Pulse width modulation multiplexing circuit - Google Patents
Pulse width modulation multiplexing circuit Download PDFInfo
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- CN210670010U CN210670010U CN201922244549.6U CN201922244549U CN210670010U CN 210670010 U CN210670010 U CN 210670010U CN 201922244549 U CN201922244549 U CN 201922244549U CN 210670010 U CN210670010 U CN 210670010U
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- multiplexing circuit
- pwm
- field effect
- effect transistor
- pulse width
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Abstract
The utility model discloses a pulse width modulation multiplexing circuit. This pulse width modulation multiplexing circuit includes triode, field effect transistor and filter circuit, and the pulse width modulation signal end of chip passes through filter circuit connects the base of triode, the collecting electrode of triode with the grid of field effect transistor is connected, the source electrode and the power supply of field effect transistor are connected, the drain electrode and the motor power supply line of field effect transistor are connected. The pulse width modulation multiplexing circuit multiplexes a motor PWM port and a motor power supply cut-off circuit driving port through a motor PWM port, low power consumption is realized, software is not changed, and chip resources are not increased.
Description
Technical Field
The utility model relates to a pulse width modulation circuit technique especially relates to a pulse width modulation multiplexing circuit.
Background
The low power consumption is more and more favored by the market, and the power consumption of motor is extremely big, even under the condition of standby, because the motor has self impedance, still can have the power consumption problem, needs to carry out the power supply to the motor power and cuts off the processing, and this will have independent chip mouth independent control power to cut off certainly. Dc motors generally have three connections: one is supply voltage, the second is ground wire, and the third is Pulse Width Modulation (PWM) speed regulation port. And the low power consumption requires that another IO (input/output) port (of the chip) needs to be added to cut off the power supply line of the motor, the software needs to be changed, and the chip resource needs to be increased.
SUMMERY OF THE UTILITY MODEL
The to-be-solved technical problem of the utility model is to provide a pulse width modulation multiplexing circuit, through motor PWM mouth and motor power supply cut-off circuit drive mouth multiplex, when realizing the low-power consumption, software does not change, the chip resource does not increase.
In order to solve the technical problem, the utility model adopts the following technical scheme:
the utility model provides a pulse width modulation multiplexing circuit. The pulse width modulation multiplexing circuit comprises a triode, a field effect transistor and a filter circuit, wherein the pulse width modulation signal end of a chip passes through the filter circuit and is connected with the base of the triode, the collector of the triode is connected with the grid of the field effect transistor, the source of the field effect transistor is connected with a power supply source, and the drain of the field effect transistor is connected with a motor power supply line.
Optionally, for the pwm multiplexing circuit, the filter circuit includes a diode and a capacitor, the capacitor is connected between the base and the emitter of the transistor, and the diode is connected between the pwm signal terminal and the capacitor.
Optionally, the pwm multiplexing circuit further includes a resistor connected in series with the diode between the pwm signal terminal and the capacitor.
Optionally, the pwm multiplexing circuit further includes a resistor connected between the base of the transistor and the capacitor.
Optionally, the pwm multiplexing circuit further includes a resistor connected between the collector of the transistor and the gate of the fet.
Optionally, the pwm multiplexing circuit further includes a resistor connected between the gate and the source of the fet.
Optionally, the pwm multiplexing circuit further includes a voltage regulator tube connected between the gate and the source of the fet.
Optionally, for the pwm multiplexing circuit, an emitter of the transistor is grounded.
Optionally, for the pwm multiplexing circuit, the fet is a VMOS fet.
Optionally, for the pwm multiplexing circuit, the power supply is 24V.
Compared with the prior art, the utility model discloses the main advantage of technical scheme as follows:
the utility model discloses pulse width modulation multiplexing circuit passes through motor PWM mouth and motor power supply cutting circuit drive mouth multiplex, when realizing the low-power consumption, does not change software, does not increase the chip resource.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to refer to like parts throughout the drawings. In the drawings:
fig. 1 is a schematic diagram of a pwm multiplexing circuit according to an embodiment of the present invention;
fig. 2 is a waveform diagram provided by an example of the present invention.
Detailed Description
Exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the invention are shown in the drawings, it should be understood that the invention can be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.
Fig. 1 is a schematic diagram of a pwm multiplexing circuit according to an embodiment of the present invention. As shown in fig. 1, the Pulse Width Modulation multiplexing (PWM) circuit provided in this embodiment includes a transistor Q1, a field effect transistor U1, and a filter circuit. The PWM end of the chip is connected with the base of a triode Q1 through a filter circuit, the collector of the triode Q1 is connected with the grid of a field effect tube U1, and the source of the field effect tube U1 is connected with a power supply VPower supplyAnd the drain electrode of the field effect tube U1 is connected with a motor power supply line. Wherein, the emitter of the triode can be grounded. Power supply VPower supplyMay be 24V.
V in FIG. 1MOTORThe signal is the signal of the motor power supply line, and V is obtained when the field effect tube U1 is turned onMOTORThe signal being equal to VPower supply. When the motor is required to be in standby state, namely no PWM signal exists, the field effect tube U1 can not be conducted, namely no voltage exists at two ends of the motor when the motor is in standby state, and the standby state is free of loss.
The PWM signal in fig. 1 is the motor speed regulation signal and the motor starts to rotate as soon as the PWM signal is available. The PWM signal is connected to the pulse width modulation multiplexing circuit, and is connected to the motor through the pulse width modulation multiplexing circuit, namely the PWM signal of the motor.
The filter circuit may include a diode D2 and a capacitor C1, among others. The capacitor C1 is connected between the base and emitter of the transistor Q1, and the diode D2 is connected between the PWM terminal of the PWM signal and the capacitor C1. The pulse width modulation multiplexing circuit of this embodiment may further include a resistor R3 connected in series with the diode D2 between the pulse width modulation signal PWM terminal and the capacitor C1. The pwm multiplexing circuit of this embodiment may further include a resistor R4 connected between the base of the transistor Q1 and the capacitor C1.
When the motor needs to rotate, the chip outputs a PWM signal, the PWM signal is filtered into a dc signal by the filter circuit, and the dc signal reaches the conduction voltage of the transistor Q1, as shown in fig. 2, the collector signal of the transistor Q1 is 0 bit, which indicates that the transistor Q1 is conducted and grounded. The resistor R4 is a current limiting resistor to prevent excessive current. The resistor R3 and the resistor R4 of the partial circuit can exist at the same time or at different times, namely only one resistor needs to exist. The diode D2 is used to stop the filtered voltage of the capacitor C1 from flowing back when the PWM is low, as shown in the low portion of the PWM motor speed control signal in fig. 2.
The pulse width modulation multiplexing circuit of this embodiment may further include a resistor R2 connected between the collector of the transistor and the gate (G-pole) of the field effect transistor. The pulse width modulation multiplexing circuit of this embodiment may further include a resistor R1 connected between the gate (G pole) and the source (S pole) of the field effect transistor. After the transistor Q1 is conducted, VPower supplyThe voltage is divided by the resistor R1 and the resistor R2, so that the voltage of the grid (G pole) and the source (S pole) of the field effect transistor U1 reaches the turn-on voltage of the field effect transistor U1, the field effect transistor U1 is turned on, and the power supply line V of the motor is connectedMOTORTo obtain VPower supplyThe motor has a power supply signal and a PWM signal, and the motor operates.
The pwm multiplexing circuit of this embodiment may further include a zener D1 connected between the gate (G pole) and the source (S pole) of the fet. The purpose of voltage regulation is to protect the voltage across the gate (G pole) and source (S pole) of fet U1. Of course, the zener D1 may not be provided. For example, assuming that the highest withstand voltage between the gate (G pole) and the source (S pole) of the fet U1 is 11V, the regulator D1 may select a regulated voltage value of 11V or less, and limit the highest voltage between the gate (G pole) and the source (S pole) of the fet U1 to be only the voltage of the regulator D1.
When the PWM has no signal, namely standby, the triode Q1 is turned off, the field effect transistor U1 is turned off, and the motor has no power supply signal.
Here, the field effect transistor may be a VMOS field effect transistor (VMOSFET), which is collectively referred to as a V-groove MOS field effect transistor.
The utility model discloses pulse width modulation multiplexing circuit passes through motor PWM mouth and motor power supply cutting circuit drive mouth multiplex, when realizing the low-power consumption, does not change software, does not increase the chip resource.
The above mentioned embodiments are only examples of the present invention, and not intended to limit the scope of the claims of the present invention, and all the equivalent structures or equivalent flow changes made by the contents of the specification and the drawings of the present invention or directly or indirectly applied to other related technical fields are also included in the scope of the claims of the present invention.
Claims (10)
1. The utility model provides a pulse width modulation multiplexing circuit, its characterized in that, includes triode, field effect transistor and filter circuit, and the pulse width modulation signal end of chip passes through filter circuit connects the base of triode, the collecting electrode of triode with the grid of field effect transistor is connected, the source electrode and the power supply of field effect transistor are connected, the drain electrode and the motor power supply line of field effect transistor are connected.
2. The pwm multiplexing circuit according to claim 1, wherein said filter circuit includes a diode and a capacitor, said capacitor is connected between a base and an emitter of said transistor, and said diode is connected between said pwm signal terminal and said capacitor.
3. The pwm multiplexing circuit according to claim 2, further comprising a resistor connected in series with said diode between said pwm signal terminal and said capacitor.
4. The pwm multiplexing circuit according to claim 2 or 3, further comprising a resistor connected between the base of said transistor and said capacitor.
5. The pwm multiplexing circuit according to claim 1, further comprising a resistor connected between the collector of said transistor and the gate of said field effect transistor.
6. The pwm multiplexing circuit according to claim 1, further comprising a resistor connected between the gate and the source of said field effect transistor.
7. The PWM multiplexing circuit according to claim 1 or 6 further comprising a stabilivolt connected between the gate and source of the FET.
8. The pwm multiplexing circuit of claim 1 wherein the emitter of said transistor is grounded.
9. The pwm multiplexing circuit of claim 1 wherein said fets are VMOS fets.
10. The pwm multiplexing circuit according to claim 1, wherein the power supply is 24V.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922244549.6U CN210670010U (en) | 2019-12-13 | 2019-12-13 | Pulse width modulation multiplexing circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922244549.6U CN210670010U (en) | 2019-12-13 | 2019-12-13 | Pulse width modulation multiplexing circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN210670010U true CN210670010U (en) | 2020-06-02 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201922244549.6U Active CN210670010U (en) | 2019-12-13 | 2019-12-13 | Pulse width modulation multiplexing circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN210670010U (en) |
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2019
- 2019-12-13 CN CN201922244549.6U patent/CN210670010U/en active Active
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