CN210296064U

CN210296064U - Concave piezoresistor chip

Info

Publication number: CN210296064U
Application number: CN201921361031.4U
Authority: CN
Inventors: 丁皓鹏; 欧阳华
Original assignee: Shenzhen Xinchi Technology Co ltd
Current assignee: Shenzhen Xinchi Technology Co ltd
Priority date: 2019-08-20
Filing date: 2019-08-20
Publication date: 2020-04-10
Anticipated expiration: 2029-08-20

Abstract

The utility model belongs to the technical field of the piezo-resistor chip technique and specifically relates to a spill piezo-resistor chip, the chip comprises a chip body, the surface coating of chip body has composite electrode layer, the chip body is rectangle structural design, just four corners of chip body are arcuation structural design, the lateral wall of chip body is arcuation structural design together, first recess has been seted up to the tip of chip body, the second recess has been seted up to the bottom of chip body, the height of first recess and second recess is between 0.5-1.5mm, the structure size homogeneous phase of first recess and second recess is the same, first recess and second recess are rectangle structural design together, just four of first recess and second recess are arcuation structural design, compare with current spill piezo-resistor chip, the utility model discloses a design can promote the security of spill piezo-resistor chip, Economy, service life, energization rate, and practicality.

Description

Concave piezoresistor chip

Technical Field

The utility model relates to a piezo-resistor chip technical field specifically is a spill piezo-resistor chip.

Background

The piezoresistor is a resistor device with nonlinear volt-ampere characteristics, mainly used for voltage clamping when the circuit is over-voltage to absorb excess current to protect the sensitive device, and its resistor body material is semiconductor, so that it is a kind of semiconductor resistor, and is a kind of zinc oxide (ZnO) piezoresistor which is extensively used, and its main body material is formed from divalent element zinc (Zn) and hexavalent element oxygen (O), so that from the material point of view, the zinc oxide piezoresistor is a "II-VI group oxide semiconductor", and in Taiwan, the piezoresistor is called "surge absorber" or "electric shock (surge) suppressor (absorber)", according to the different purposes of use, the piezoresistor can be divided into piezoresistor for protection and piezoresistor for circuit function, and integrated circuit or microcircuit also can be called microcircuit, The microchip and chip are a way of miniaturizing the circuit (mainly including semiconductor equipment, also including passive components, etc.) in the electronics, and are often manufactured on the surface of a semiconductor wafer, the application of the existing piezoresistor chip is more and more extensive with the scientific progress, in particular to a concave piezoresistor chip, in the existing structure of the concave piezoresistor chip, the concave structure is greatly exaggerated, the damage is often caused in the manufacturing process, the whole economy is low, and the corners in the existing concave piezoresistor chip are often designed to be sharp-shaped structures, the piezoresistor chip can be damaged carelessly in the transportation process and the use process, so that the whole manufacturing cost is greatly improved, the economic benefit is generally low, the practicability is not high, and therefore, the improvement of the existing concave piezoresistor chip is realized, the design of a novel concave piezoresistor chip to overcome the technical defects and improve the practicability of the whole concave piezoresistor chip is very important.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to provide a spill piezoresistor chip to solve the problem that proposes among the above-mentioned background art.

In order to achieve the above object, the utility model provides a following technical scheme:

a concave piezoresistor chip comprises a chip body, wherein a first groove is formed in the end of the chip body, and a second groove is formed in the bottom of the chip body.

Preferably, the surface of the chip body is coated with a composite electrode layer.

Preferably, the height of each of the first groove and the second groove is 0.5-1.5 mm.

Preferably, the first groove and the second groove are the same in structural size.

Preferably, the chip body is designed to be a rectangular structure, four corners of the chip body are designed to be arc-shaped structures, and the outer side wall of the chip body is designed to be the arc-shaped structure.

Preferably, the first groove and the second groove are both designed to be rectangular structures, and four corners of the first groove and the second groove are both designed to be arc-shaped structures.

Compared with the prior art, the beneficial effects of the utility model are that:

1. the utility model discloses in, be 0.5-1.5mm design through first recess and second recess height for spill piezoresistor chip preparation is simpler, requires to reduce technology production, makes spill piezoresistor chip be difficult for causing the damage in the preparation process, and the cost of manufacture reduces, and whole economic nature is higher.

2. The utility model discloses in, four corners through the chip body are ARC structure's design to and the design of the lateral wall ARC structure of chip body, make the chip body higher depositing and security in the transportation, corner and lateral wall can not cause the damage because of the collision, have avoided unnecessary economic loss, and whole economic nature and practicality are generally higher.

3. The utility model discloses in, through the design of chip body surface coating's composite electrode layer, increased the electric conductive property of chip body, manufacturing cost is lower simultaneously, reduces by a wide margin for current pure silver electrode layer manufacturing cost, and whole economic nature is higher.

Drawings

FIG. 1 is a schematic view of the overall structure of the present invention;

FIG. 2 is a top view of the overall structure of the present invention;

fig. 3 is a sectional view of the overall structure of the present invention.

In the figure: 1-chip body, 2-first groove, 3-second groove.

Detailed Description

The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, rather than all embodiments, and all other embodiments obtained by a person of ordinary skill in the art without creative work belong to the protection scope of the present invention based on the embodiments of the present invention.

Referring to fig. 1-3, the present invention provides a technical solution:

a concave piezoresistor chip comprises a chip body 1, wherein the surface of the chip body 1 is coated with a composite electrode layer, the electric conductivity of the chip body 1 is increased through the design of the composite electrode layer coated on the surface of the chip body 1, the manufacturing cost is low, the manufacturing cost is greatly reduced compared with the existing pure silver electrode layer, the overall economy is high, the chip body 1 is designed in a rectangular structure, four corners of the chip body 1 are all designed in an arc structure, the four corners of the chip body 1 are all designed in an arc structure, and the outer side wall of the chip body 1 is designed in an arc structure, so that the chip body 1 is higher in safety in the storage and transportation processes, the corners and the outer side wall cannot be damaged due to collision, unnecessary economic loss is avoided, the overall economy and the practicability are generally high, and the outer side wall of the chip body 1 is designed in an arc structure, first recess 2 has been seted up to the tip of chip body 1, second recess 3 has been seted up to the bottom of chip body 1, first recess 2 and second recess 3 highly be between 0.5-1.5mm, design between 0.5-1.5mm through first recess 2 and second recess 3 height, make spill piezoresistor chip preparation simpler, to technology production requirement reduction, make spill piezoresistor chip difficult to cause the damage in the preparation process, the cost of manufacture reduces, overall economy is higher, first recess 2 and second recess 3's structure size is the same, first recess 2 and second recess 3 are the same for rectangle structural design, and four corners of first recess 2 and second recess 3 are arcuation structural design.

The utility model discloses work flow: the concave piezoresistor chip increases the conductivity of the chip body 1 through the design of the composite electrode layer coated on the surface of the chip body 1, simultaneously has lower manufacturing cost, greatly reduces the manufacturing cost compared with the prior pure silver electrode layer, has higher overall economy, ensures that the chip body 1 has higher safety in the storage and transportation processes through the design that four corners of the chip body 1 are arc-shaped structures and the design of the arc-shaped structure of the outer side wall of the chip body 1, ensures that the corners and the outer side wall can not be damaged due to collision, avoids unnecessary economic loss, has generally higher overall economy and practicability, ensures that the concave piezoresistor chip is simpler to manufacture through the design that the heights of the first groove 2 and the second groove 3 are between 0.5 and 1.5mm, reduces the requirements on process production, and ensures that the concave piezoresistor chip is not easy to damage in the preparation process, the cost of manufacture reduces, and whole economic nature is higher, compares with current spill piezoresistor chip, the utility model discloses a design can promote security, economic nature, life, circular telegram speed and the practicality of spill piezoresistor chip.

Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.

Claims

1. A concave varistor chip, comprising a chip body (1), characterized in that: the chip comprises a chip body (1) and is characterized in that a first groove (2) is formed in the end of the chip body (1), and a second groove (3) is formed in the bottom of the chip body (1).

2. A concave varistor chip according to claim 1, characterized in that: the surface of the chip body (1) is coated with a composite electrode layer.

3. A concave varistor chip according to claim 1, characterized in that: the heights of the first groove (2) and the second groove (3) are both 0.5-1.5 mm.

4. A concave varistor chip according to claim 1, characterized in that: the first groove (2) and the second groove (3) are identical in structure size.

5. A concave varistor chip according to claim 1, characterized in that: the chip body (1) is designed to be of a rectangular structure, four corners of the chip body (1) are designed to be of arc structures, and the outer side wall of the chip body (1) is designed to be of an arc structure.

6. A concave varistor chip according to claim 1, characterized in that: the first groove (2) and the second groove (3) are both designed to be rectangular structures, and four corners of the first groove (2) and the second groove (3) are designed to be arc-shaped structures.