CN210261103U

CN210261103U - Photoelectric isolation universal chip type CAN bus micro-system packaging structure

Info

Publication number: CN210261103U
Application number: CN201921338438.5U
Authority: CN
Inventors: 高煜寒; 傅礼鹏; 杜浩铭; 刘林涛; 龚巧
Original assignee: China Electronics Technology Group Corp Chongqing Acoustic Optic Electronic Co ltd
Current assignee: China Electronics Technology Group Corp Chongqing Acoustic Optic Electronic Co ltd
Priority date: 2019-08-16
Filing date: 2019-08-16
Publication date: 2020-04-07
Anticipated expiration: 2029-08-16

Abstract

The utility model relates to a general piece formula CAN bus microsystem packaging structure of optoelectronic isolation belongs to the microelectronics field. The structure comprises an integrated tube shell, a CAN bus transceiver, a photoelectric coupling module, a digital signal processor, an SRAM and an EEPROM; the integrated tube shell is used for packaging and connecting other modules; the CAN bus transceiver provides differential signal sending and receiving capability; the photoelectric coupling module is arranged between the CAN bus transceiver and the digital signal processor and used for isolating signals; the digital signal processor provides control, processing and partial interfaces for the system; the SRAM is connected with the digital signal processor through an interface and provides a high-speed data cache; the EEPROM is connected with the digital signal processor through an interface and used for storing setting data. The utility model discloses the commonality is strong, the integrated level is high, small, the reliability is high, the peripheral hardware interface is abundant, but the wide application is in replacing the CAN bus control system among the existing equipment.

Description

Photoelectric isolation universal chip type CAN bus micro-system packaging structure

Technical Field

The utility model belongs to the technical field of microsystem, a general piece formula CAN bus microsystem packaging structure of optoelectronic isolation is related to.

Background

The micro system is a micro device which integrates five basic elements of micro electronics, photoelectron, MEMS, architecture and algorithm, integrates five functional units of sensing, communication, processing, execution and micro energy source and has multiple functions. A system-in-package structure is a module that integrates multiple electronic components with different functions into one package to achieve a substantially complete function.

At present, although a large number of system-in-package structures exist, the system-in-package structure can only realize a certain specific function and cannot be widely applied to various fields. The system with the control processing function usually welds chips with various functions on a carrier plate, and the system is large in size and high in power consumption, and cannot meet the current integration requirement of electronic equipment.

Therefore, a micro system with high modularity, high integration, miniaturization, low power consumption and high reliability is needed to be applied to a CAN bus processing system to meet the requirements of the new generation of electronic devices on modularization, high integration, miniaturization, low power consumption and high reliability.

SUMMERY OF THE UTILITY MODEL

In view of this, the utility model aims at providing a photoelectric isolation general piece formula CAN bus microsystem packaging structure CAN satisfy the demand of new generation electronic equipment to modularization, high integration, miniaturization, low-power consumption, high reliable, has extensive application prospect at machine year, missile-borne, high reliable industrial control occasion.

In order to achieve the above purpose, the utility model provides a following technical scheme:

a photoelectric isolation universal chip type CAN bus micro-system packaging structure comprises an integrated tube shell (1) and a micro-processing system; the micro-processing system comprises a CAN bus transceiver (2), a photoelectric coupling module (3), a digital signal processor (4), an SRAM (5) and an EEPROM (6);

the integrated tube shell (1) is used for packaging and connecting a micro-processing system; the CAN bus transceiver (2) is connected with the digital signal processor (4) through the photoelectric coupling module (3) and provides differential signal transmitting and receiving capacity; the photoelectric coupling module (3) is used for isolating signals in the system; the digital signal processor (4) provides control and processing functions and partial interfaces for the micro-processing system; the SRAM (5) is connected with the digital signal processor through an interface and provides a high-speed data cache; the EEPROM (6) is connected with the digital signal processor through an interface and used for storing setting data.

Furthermore, the integrated tube shell (1) adopts a cavity digging mode to provide a multichannel photoelectric coupling space for the micro-processing system.

Furthermore, the interconnection mode of each module in the micro-processing system adopts a multilayer ceramic wiring mode, and high-density electric connection wiring is provided for the system.

Furthermore, the photoelectric coupling module (3) adopts a multi-channel array cavity digging mode, the adjacent cavities share the cavity wall, and the typical channel number is more than or equal to 4.

Furthermore, microelectronic chips such as the CAN bus transceiver (2), the digital signal processor (4), the SRAM (5), the EEPROM (6) and the like are connected to the integrated tube shell (1) by adopting conductive adhesive bonding and bonding technology, and the typical mode is that the microelectronic chips are connected to surface layer bonding points of the integrated tube shell (1) by adopting bonding technology.

Further, the integrated tube shell (1) is manufactured by adopting an HTCC process and mainly comprises three materials, namely a ceramic material, a metal material and a conductor material; wherein the ceramic material is used for the main structure of the integrated tube shell; the metal material is used for processing part parts of the integrated tube shell, including a lead, a sealing ring, a cover plate, a heat sink and the like; conductor material is used for internal wiring of the integrated package and filling the interconnect holes for electrical interconnection.

The beneficial effects of the utility model reside in that: packaging structure has that the commonality is strong, the integrated level is high, small characteristics, has abundant peripheral hardware interface and signal processing ability. The utility model discloses be favorable to realizing miniaturized design, low-power consumption design, the high reliability design of electronic equipment system, in addition the utility model discloses also industrial control and detecting system's ideal selection, but wide application is in the CAN bus control system among the replacement existing equipment.

Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objectives and other advantages of the invention may be realized and attained by the means of the instrumentalities and/or combinations particularly pointed out in the appended claims.

Drawings

For the purposes of promoting a better understanding of the objects, features and advantages of the invention, reference will now be made to the following detailed description taken in conjunction with the accompanying drawings in which:

FIG. 1 is a schematic view of the microsystem package structure of the present invention;

FIG. 2 is a circuit block diagram of a microprocessor system according to the present invention;

FIG. 3 is a top view of the integrated tube shell;

FIG. 4 is a side view A-A' of FIG. 3;

FIG. 5 is a bottom view of the integrated cartridge;

reference numerals: 1-integrated tube shell, 2-CAN bus transceiver, 3-photoelectric coupling module, 4-digital signal processor, 5-SRAM, 6-EEPROM, 7-cavity and 8-sealing ring.

Detailed Description

The following description of the embodiments of the present invention is provided for illustrative purposes, and other advantages and effects of the present invention will be readily apparent to those skilled in the art from the disclosure herein. The present invention can also be implemented or applied through other different specific embodiments, and various details in the present specification can be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the drawings provided in the following embodiments are only for illustrating the basic idea of the present invention, and the features in the following embodiments and examples may be combined with each other without conflict.

Wherein the showings are for the purpose of illustrating the invention only and not for the purpose of limiting the same, and in which there is shown by way of illustration only and not in any way limiting the scope of the invention; for a better understanding of the embodiments of the present invention, some parts of the drawings may be omitted, enlarged or reduced, and do not represent the size of an actual product; it will be understood by those skilled in the art that certain well-known structures in the drawings and descriptions thereof may be omitted.

The same or similar reference numerals in the drawings of the embodiments of the present invention correspond to the same or similar parts; in the description of the present invention, it should be understood that if there are terms such as "upper", "lower", "left", "right", "front", "back", etc., indicating directions or positional relationships based on the directions or positional relationships shown in the drawings, it is only for convenience of description and simplification of description, but it is not intended to indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore, the terms describing the positional relationships in the drawings are only used for illustrative purposes and are not to be construed as limiting the present invention, and those skilled in the art can understand the specific meanings of the terms according to specific situations.

Referring to fig. 1 to 5, the present embodiment provides a package structure of a photo-electric isolation general chip type CAN bus micro-system, which includes an integrated tube case 1 and a micro-processing system; the micro-processing system comprises a CAN bus transceiver 2, a photoelectric coupling module 3, a digital signal processor 4, an SRAM 5 and an EEPROM 6;

the integrated tube shell 1 is an integrated CQFP ceramic tube shell which is a physical structure carrier and an electric high-density interconnection body of the whole microsystem, and is welded and sealed on the ceramic tube shell in parallel by adopting a metal cover plate, and a pin is led out in a CQFP form. The cavity digging mode is adopted in the micro-processing system, and a multi-channel photoelectric coupling space is provided for the micro-processing system. The CAN bus transceiver 2, the digital signal processor 4, the SRAM 5 and the EEPROM 6 are arranged in the cavity at the front side.

The structure is shown in fig. 3-5, the dimensions include but are not limited to those shown in the present embodiment, and the specific dimensions provided in the present embodiment are as follows: the cavity 7 is a square ring, the side length L is 23.5 +/-0.24 mm, and the height h7 is 2.6 +/-0.26 mm; the sealing ring 8 is a square ring, the length L3 of the inner edge is 23.9 +/-0.15 mm, the length L4 of the outer edge is 25.9 +/-0.15 mm, and the height h5 is 0.3 mm; the ceramic body is square, the side length L5 is 27 +/-0.27 mm, and the height h8 is 2.9 +/-0.3 mm; the center distance L10 of the peripheral pins is 1.27 +/-0.1 mm, the width L9 of the pins is 0.4 +/-0.05 mm, the projection length is less than or equal to 7mm, the overall height (including bending) h3 is 0.6 +/-0.1 mm, the thickness h4 of the pins is 0.2 +/-0.0.05 mm, and the total number of the pins is 76. The bent tail end distance L8 of the pins on the opposite surfaces of the integrated tube shell is 28.8 +/-0.4 mm.

The integrated tube shell 1 is manufactured by adopting an HTCC process and mainly comprises three materials, namely a ceramic material, a metal material and a conductor material; wherein the ceramic material is used for the main structure of the integrated tube shell; the metal material is used for processing part parts of the integrated tube shell, including a lead, a sealing ring, a cover plate, a heat sink and the like; conductor material is used for internal wiring of the integrated package and filling the interconnect holes for electrical interconnection. The lead resistance is less than or equal to 7 ohms; the insulation resistance between adjacent leads without interconnection is more than or equal to 1 multiplied by 10¹⁰Ω, DC 500V. The lead width, lead thickness, lead support height can be customized as desired. The shape and the size of the lead frame are also matched and customized according to requirements.

The CAN bus transceiver 2 comprises two CAN PHY chips, is connected to the surface bonding point of the integrated tube shell by adopting a bonding technology, and provides a CAN bus transceiving physical interface with 2 channels for the whole micro-processing system. EEPROM 6 provides setup data storage for the entire microsystem, and is sized in size to include, but is not limited to, 256K Bytes.

The photoelectric coupling module comprises four photoelectric coupling channels, each channel comprises an LED chip and a PDIC chip, and four paths of photoelectric isolation are provided for the whole system. The photoelectric coupling module is bonded at the corners of the integrated tube shell in a multi-channel array cavity digging mode, and the adjacent cavities share the cavity wall.

In this embodiment, as shown in fig. 3 to 4, a cavity width W1 of the whole photocoupling module is 5.2 ± 0.15mm, a length W2 of the photocoupling channel is 4 ± 0.15mm, a width L1 is 1.7 ± 0.15mm, a height h2 is 0.9 ± 0.08mm, and a remaining height h1 of the photocoupling channel is 0.7mm, so as to provide a space for installing the upper cover plate of the photocoupler. The spacing between the optical coupling channels L6 is 0.5mm and the outer sidewall thickness L7 is 0.7 mm.

The digital signal processor 4 provides processing capabilities for the entire system including, but not limited to, a domestic 28335DSP bare chip.

The SRAM 5 provides data caching for the entire system, with a size that includes, but is not limited to, 2M Bytes.

Finally, the above embodiments are only used for illustrating the technical solutions of the present invention and not for limiting, and although the present invention has been described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that modifications or equivalent substitutions may be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions, and all of them should be covered by the scope of the claims of the present invention.

Claims

1. A photoelectric isolation universal chip type CAN bus micro-system packaging structure is characterized by comprising an integrated tube shell (1) and a micro-processing system; the micro-processing system comprises a CAN bus transceiver (2), a photoelectric coupling module (3), a digital signal processor (4), an SRAM (5) and an EEPROM (6);

2. The micro-system packaging structure of the optoelectronic isolation universal chip CAN bus according to claim 1, wherein the integrated tube shell (1) adopts a cavity digging mode to provide a multi-channel optoelectronic coupling space for a micro-processing system.

3. The electrically isolated generic CAN bus microsystem package structure of claim 1, wherein the modules in the microprocessor system are interconnected by multilayer ceramic wires to provide high density electrical connections to the system.

4. The packaging structure of the optoelectronic isolation universal chip CAN bus microsystem as claimed in claim 1, wherein the optoelectronic coupling module (3) adopts a multi-channel array cavity digging mode, the adjacent cavities share a cavity wall, and the number of channels is greater than or equal to 4.

5. The package structure of the optoelectronic isolation generic chip CAN bus microsystem as claimed in claim 1, wherein the CAN bus transceiver (2), the digital signal processor (4), the SRAM (5) and the EEPROM (6) are connected to the integrated package (1) by conductive adhesive bonding and bonding techniques.