CN210129513U - Power module with power bus - Google Patents

Power module with power bus Download PDF

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Publication number
CN210129513U
CN210129513U CN201920266439.7U CN201920266439U CN210129513U CN 210129513 U CN210129513 U CN 210129513U CN 201920266439 U CN201920266439 U CN 201920266439U CN 210129513 U CN210129513 U CN 210129513U
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China
Prior art keywords
input
bus bar
power
electrode
output
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CN201920266439.7U
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Chinese (zh)
Inventor
周卫国
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Shenzhen Yitong Power Electronics Co ltd
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Shenzhen Yitong Power Electronics Co ltd
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Priority to CN201920266439.7U priority Critical patent/CN210129513U/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H01L2224/48139Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate with an intermediate bond, e.g. continuous wire daisy chain
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires

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Abstract

In order to overcome the problems that the inductance is introduced into the power electrode in the prior art, so that the inductance of the current conversion loop of the unit is very large, the peak voltage is very high, and the dynamic loss is very large, the utility model provides a power module with a power bus, which comprises a power module and a capacitor module, wherein the power module comprises a bottom plate, more than two power units arranged on the bottom plate, an output electrode corresponding to the power units and two input bus busbars; the two input bus bars comprise a first input bus bar and a second input bus bar; the utility model provides a power module, it is female arranging into first input bus with the integrative design of the first input electrode on each power unit on the former power module, arranges female the arranging into second input bus with the integrative design of second input electrode, so, parallelly connected three power unit's input electrode together, distributes three power unit to the power. The design is similar to the parallel connection of the inductors of the input electrodes of three groups of power supplies, so that the inductance of a module commutation loop is greatly reduced, and the loss of the module is reduced.

Description

Power module with power bus
Technical Field
The utility model relates to a power module field.
Background
The power module is a power switch formed by combining and packaging power electronic power devices such as MOS (Metal-Oxide-Semiconductor Field-Effect Transistor) transistors, IGBTs (insulated gate Bipolar Transistor) and FRDs (fast recovery diodes) according to certain functions, and is mainly used for power conversion of electric automobiles, photovoltaic power generation, wind power generation, industrial frequency conversion and other occasions.
Taking MOS transistors as an example, as shown in fig. 1a, it is usually composed of two MOS transistors connected in series up and down to form a bridge circuit. The drain electrode D of the MOS tube in the upper bridge is connected with the anode P + of the power supply, the source electrode S is connected with the drain electrode D of the MOS tube on the lower bridge, the source electrode of the MOS tube on the lower bridge is connected with the cathode P-, and the source electrode S of the MOS tube on the upper bridge and the drain electrode D of the MOS tube on the lower bridge are used as output ends Out. And the G poles of the upper bridge MOS tube and the lower bridge MOS tube are connected with a control signal.
However, as the power switches in the module are repeatedly switched, the inductance resulting from their structural configuration can reduce the reliability of the power module. The traditional power module has large area of the follow current loop, so that the inductance of the follow current loop of the module is large, the switching loss of the module is large, and the reliability is low.
As shown in fig. 1b and fig. 1c, the power module 1000 mainly includes a base plate 2 and power units 1 arranged on the base plate 2 (wherein, the power module 1000 may include a plurality of power units 1 according to the number of required control paths, for example, if used in a three-phase circuit as a control module, 3 power units 1 may be included, as shown in the figure, respectively marked as 1U, 1V, 1W), a conductive pattern layer is formed on the power unit 1 in a layout manner, and a power chip is arranged on the conductive pattern layer to implement bridge-type switching control, the power unit 1 is formed by connecting power electronic devices including upper and lower two groups of MOS transistors or IGBTs in series, and an electrode between the two groups of MOS transistors or IGBTs serves as an output electrode; the power unit 1 is connected with a first input electrode 3, a second input electrode 4 and an output electrode 5; usually, the first input electrode 3 and the second input electrode 4 are respectively used as positive and negative electrodes for connecting (further including fixing and leading out of each insulating frame, not shown in the figure) the positive electrode and the negative electrode of an external power supply.
As a preferred way, the current art refers to the arrangement of two input electrodes (the first input electrode 3 and the second input electrode 4) in a stacked arrangement, so as to reduce the inductance thereof. The applicant finds that this approach still has problems in the development process: because the power electrode can introduce inductance, the unit commutation loop has large inductance, high peak voltage and large dynamic loss.
SUMMERY OF THE UTILITY MODEL
For overcoming among the prior art because the inductance can all be introduced to the power electrode, lead to this unit change of current return circuit inductance very big, peak voltage is very high, the very big problem of dynamic loss, the utility model provides a power module with power bus.
The utility model discloses a power module with a power bus, which comprises a power module and a capacitor module;
the capacitor module comprises a first capacitor electrode and a second capacitor electrode, and a plurality of capacitors connected in parallel are clamped between the first capacitor electrode and the second capacitor electrode; the first capacitor electrode and the second capacitor electrode have lead-out portions arranged in a stacked manner;
the first capacitor electrode lead-out part is provided with a protruding first capacitor electrode connecting end; the second capacitor electrode lead-out part is provided with a protruding second capacitor electrode connecting end;
the power supply comprises a bottom plate, more than two power units arranged on the bottom plate, output electrodes corresponding to the power units and two input bus busbars; the two input bus bars comprise a first input bus bar and a second input bus bar;
the power unit comprises a substrate, a circuit copper layer and a power chip set, wherein the circuit copper layer is formed on the substrate, and the power chip set is arranged on the circuit copper layer; the circuit copper layer comprises a first input conductive layer, a second input conductive layer and an output conductive layer; the power chip set comprises a first bridge arm power chip set and a second bridge arm power chip set;
the first input bus bar and the second input bus bar are arranged in a stacked mode;
the first input bus bar comprises a first bus bar external connection part, a first bus bar main body part and a first bus bar internal connection part; the first busbar interconnection part is directly or indirectly connected to the first input conductive layer of each power unit,
the second input bus bar comprises a second bus bar external connection part, a second bus bar main body part and a second bus bar internal connection part; the second busbar interconnection part is directly or indirectly connected to the second input conductive layer of each power unit;
the first capacitor electrode connecting end is electrically connected with a first bus bar external connection end of the first input bus bar; the second capacitance electrode connecting end is electrically connected with a second busbar external connection end of the second input bus busbar.
The utility model provides a power module, it is female arranging into first input bus with the integrative design of the first input electrode on each power unit on the former power module, arranges female the arranging into second input bus with the integrative design of second input electrode, so, parallelly connected three power unit's input electrode together, distributes three power unit to the power. The design is similar to the parallel connection of the inductors of the input electrodes of three groups of power supplies, so that the inductance of a module commutation loop is greatly reduced, and the loss of the module is reduced.
Furthermore, the number of the first bus bar external connection parts on the first input bus bar is more than 2; the number of the second bus external connecting parts on the second input bus bar is more than 2.
Furthermore, the number of the first busbar external connection portions is the same as that of the second busbar external connection portions, and the number of the first busbar external connection portions corresponds to that of the power units.
Furthermore, a second bus external connection portion of the second input bus bar and a first bus external connection portion of the first input bus bar are arranged at intervals.
Furthermore, the first bus external connection portion of the first input bus bar, the second bus external connection portion of the second input bus bar and the output external connection portion of the output electrode are provided with external connection holes.
Furthermore, the first input bus bar and the second input bus bar are Z-shaped.
Further, the output electrode comprises an output interconnecting part, an output main body part and an output external part, wherein the output main body part is arranged between the output interconnecting part and the output external part; the output electrode is Z-shaped.
Furthermore, the power module further comprises an insulating frame, and the first input bus bar, the second input bus bar and the output electrode are fixed in the insulating frame.
Drawings
FIG. 1a is a schematic circuit diagram of a prior art power module;
FIG. 1b is a schematic top view of a prior art power module;
FIG. 1c is a schematic front view of a prior art power module;
fig. 2a is a schematic perspective view of a power module (without an insulating frame) of type a provided in an embodiment of the present invention;
fig. 2b is a schematic front view of a power module of type a provided in an embodiment of the present invention;
fig. 3 is a schematic perspective view of a power module (including an insulating frame) of type a according to an embodiment of the present invention;
fig. 4 is a schematic top view of a power module of type a according to an embodiment of the present invention;
FIG. 5 is an enlarged schematic view at A in FIG. 2 a;
FIG. 6 is an enlarged schematic view at B in FIG. 2 a;
FIG. 7 is an enlarged schematic view at C of FIG. 2 b;
FIG. 8 is an enlarged schematic diagram of the power cell of FIG. 4;
FIG. 9 is a schematic diagram of the second input conductive layer of FIG. 8;
FIG. 10 is a schematic diagram of the first input conductive layer of FIG. 8;
fig. 11 is a schematic layout of the first input conductive layer, the second input conductive layer, the output conductive layer, and the first input current guiding layer in the circuit layer of fig. 8;
fig. 12 is a schematic perspective view of a second input bus bar in fig. 2 a;
fig. 13 is a schematic perspective view of the first input bus bar in fig. 2 a;
FIG. 14 is a schematic perspective view of the output electrode of FIG. 2 a;
FIG. 15 is a perspective view of a lower bridge source connection;
FIG. 16 is a perspective view of an upper bridge source connection;
fig. 17 is a schematic perspective view of a power module (without encapsulation) of type a according to an embodiment of the present invention;
fig. 18 is a schematic perspective view of a power module (after packaging) of type a according to an embodiment of the present invention;
fig. 19A is an exploded schematic view of a power module model B (without an insulating frame) provided in an embodiment of the present invention;
fig. 19B is a schematic perspective view of a power module of type B (without an insulating frame) provided in an embodiment of the present invention;
fig. 20A is a schematic perspective view of a power module (including an insulating frame) of type B provided in an embodiment of the present invention;
fig. 20B is a schematic top view of a power module of type B with a power cell disposed on a bottom plate according to an embodiment of the present invention;
FIG. 20C is an enlarged schematic view of a single power cell of FIG. 20B;
fig. 20D is an enlarged schematic view of the second input conductive layer in the power cell of fig. 20C;
fig. 20E is an enlarged schematic view of the first input conductive layer in the power cell of fig. 20C;
fig. 21 is a schematic perspective view of a power module (without encapsulation) of type B provided in an embodiment of the present invention;
fig. 22 is a schematic perspective view of a power module (including an insulating frame) of type B according to an embodiment of the present invention;
fig. 23 is a schematic perspective view of a power module of type C (without an insulating frame) provided in an embodiment of the present invention;
fig. 24 is a schematic perspective view of a power module (without encapsulation) of type C provided in an embodiment of the present invention;
fig. 25 is a schematic perspective view of a power module of type C (after packaging) according to an embodiment of the present invention;
fig. 26 is a schematic perspective view of a power module (without an insulating frame) of type D provided in an embodiment of the present invention;
fig. 27 is a schematic perspective view of a power module (including an insulating frame) of type D according to an embodiment of the present invention;
fig. 28 is a schematic perspective view of a lower bridge source connector of type D according to an embodiment of the present invention;
fig. 29 is a schematic perspective view of an upper bridge source connection part of type D according to an embodiment of the present invention;
fig. 30 is a schematic perspective view of a power module (before packaging) of type D according to an embodiment of the present invention;
fig. 31 is a schematic perspective view of a power module (after packaging) of type D according to an embodiment of the present invention.
The reference numbers are as follows:
1000. a power module; 2000. a capacitive module;
1. a power unit; 11. a circuit copper layer; 12. a substrate; 13. a power chip; 13a, a lower bridge chip; 13b, an upper bridge chip; 14. a data pin;
111. a first input drainage layer; 112. a second input conductive layer; 113. a first input conductive layer; 114. An output conductive layer; 115. a control conductive layer;
1121. a second input connection; 1122. a second input path portion; 1123. a second input support arm; 1124. A first reserved area; 1125. a second reserved area; 1131. a first input connection; 1132. a first input support arm; 1133. a third reserved area;
2. a base plate;
3. a second input electrode; 31. a second outer connection portion; 32. a second main body portion; 33. a second interconnector portion; 311. A second external connection hole;
4. a first input electrode; 41. a first external connection part; 42. a first main body portion; 43. a first interconnector portion; 411. A first external connection hole;
30. a second input bus bar; 301. a second bus bar external connection part; 302. a second bus bar main body part; 303. A second busbar inner connection part; 3011. a second female row outreach hole;
40. a first input bus bar; 401. a first bus bar external connection part; 402. a first busbar main body part; 403. A first busbar interconnecting section; 4011. a first female row outreach hole;
5. an output electrode; 51. an output external connection part; 52. an output main body section; 53. an output interconnector; 511. an output outer connection hole;
6. an insulating frame;
7. a capacitor;
8. a second capacitance electrode; 81. a second capacitor electrode connection terminal; 810. a second capacitor electrode connection hole;
9. a first capacitance electrode; 91. a first capacitor electrode connection terminal; 910. a first capacitor electrode connection hole; 911. Avoiding holes;
10. a source electrode connecting member; 10a, a lower bridge source electrode connecting piece; 10b, an upper bridge source electrode connecting piece; 101. welding the bridge; 102. a confluence section; 102a, a negative electrode connecting end; 102b and a negative bus end; 103. an output electrode connecting end; 1011. welding the part; 1012. an avoidance part.
Detailed Description
In order to make the technical problem, technical solution and advantageous effects solved by the present invention more clearly understood, the following description is given in conjunction with the accompanying drawings and embodiments to further explain the present invention in detail. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
In this detailed description, the five power modules 1000 and their modules shown in the drawings of the specification are intended to be illustrated by way of example of various embodiments. An improved electrode structure, an optimized layout of the circuit copper layer 11 and an improved source connection in its power module 1000 are explained.
As shown in fig. 1a-1c, the utility model intended to be protected in the present invention has some well-known techniques in order to make the present invention known to those skilled in the art. Wherein, the utility model discloses in want power module 1000 of protection include bottom plate 2 and arrange power unit 1 on bottom plate 2, this bottom plate 2 is metal material usually, for example copper, copper alloy, aluminium, aluminum alloy, aluminium carborundum in any one make, its purpose distributes away the heat in the power unit 1 through this bottom plate 2.
The power unit 1 comprises a substrate 12, a circuit copper layer 11 is formed on the substrate 12 in a layout manner, power chips 13 are arranged on the circuit copper layer 11, the power chips 13 are divided into two groups, which are respectively called a first bridge arm power chip group and a second bridge arm power chip group, for short, the first power chip group and the second power chip group, or called an upper bridge power chip group and a lower bridge power chip group (for example, the second bridge arm power chip group is used as an upper bridge power chip group, and the first bridge arm power chip group is used as a lower bridge power chip group); the power unit 1 is formed by connecting power electronic devices comprising an upper MOS tube and a lower MOS tube or an IGBT in series, is respectively connected between two input electrodes, and takes an extraction electrode between the two MOS tubes or the IGBT as an output electrode 5;
MOS transistors are known, which comprise 3 electrodes: the grid G is used as an input control electrode and is used for inputting a control signal and controlling the connection and disconnection between the source S and the drain D. By output from the source S or the drain D. IGBTs are also known, which also comprise three electrodes: a gate G, a collector C and an emitter E; the gate G corresponds to the grid G of the MOS tube, and the collector C corresponds to the drain D of the MOS tube; the emitter E corresponds to a source S of the MOS tube; the gate G is used as an input control electrode and also controls the connection and disconnection between the emitter E and the collector C; both controls are also substantially the same. For convenience, the following embodiments will be specifically explained by taking MOS transistors as examples.
In the present invention, the application and the like are not specifically explained, but the layout of the electrode structure of the power module 1000 and the layout of the circuit copper layer 11 and the structure in which the source electrodes are electrically connected are optimally designed. Therefore, the following embodiments are also focused on specific explanations of the applications of the different power modules 1000 and the corresponding power modules.
Example 1
As shown in fig. 2a to fig. 18, the present embodiment will be described by a power module 1000 with a model a and a power module, so as to explain the following innovation points of the present invention, in which the core utility model points are as follows: regarding the improved design of the electrodes, the layout of the circuit copper layer 11 in the power module 1000 is optimized and the new utility model of the source connection 10.
As shown in fig. 2 a-7, this example discloses a power module 1000, which includes a base plate 2 and two or more power units 1 disposed on the base plate 2, wherein each power unit 1 includes a substrate 12, a circuit copper layer 11 and a power chip set, the circuit copper layer 11 is formed on the substrate 12, and the power chip set is disposed on the circuit copper layer 11; the power chip set comprises a first bridge arm power chip set and a second bridge arm power chip set, or an upper bridge power chip set and a lower bridge power chip set; usually, a power electrode (or a power pin) is also connected to the power unit 1, the power electrode is used for externally connecting an input power source and outputting a driving signal, and the power electrode generally comprises an input electrode and an output electrode 5 in function. In addition to the power electrodes (or power pins), the power unit 1 is provided with a data pin 14 for sampling or controlling. All of which are well known to those skilled in the art. In order to fix and insulate the power electrode and the data pin 14, the power electrode and the data pin 14 are packaged by an insulating frame 6. The input electrodes generally comprise a first input electrode 4 and a second input electrode 3; the first input electrodes 4 have one as a positive electrode and the other as a negative electrode. For example, if the first input electrode 4 is a positive electrode, the second input electrode 3 is a negative electrode. If the second input electrode 3 is a positive electrode, the first input electrode 4 is a negative electrode. Which is a positive electrode and which is a negative electrode is not particularly limited, and is often artificially defined. The polarity of one of the input electrodes is defined, and the polarity of the other input electrode is opposite, and so on. In this example, for convenience of description, the second input electrode 3 is a positive electrode, and the first input electrode 4 is a negative electrode.
Typically, the circuit copper layer 11 includes a first input conductive layer 113, a second input conductive layer 112, and an output conductive layer 114; a first input electrode 4, a second input electrode 3 and an output electrode 5 are connected to the power unit 1; the first input conductive layer 113 and the second input conductive layer 112 are also generally disposed with opposite polarities, for example, in this case, the first input conductive layer 113 is a negative conductive layer, and the second input conductive layer 112 is a positive conductive layer. Of course, the opposite polarity arrangement is also possible. The polarity of which is associated with the input electrode to which it is electrically connected, as is well known to those skilled in the art.
The upper bridge power chip set and the lower bridge power chip set are respectively arranged on any two copper foil layers of the first input conductive layer 113, the second input conductive layer 112 or the input conductive layer, as long as the result is that the upper bridge power chip set and the lower bridge power chip set are connected in series and drive signals are output from the output conductive layer 114. Typically, the upper bridge power chip set is typically disposed on a positive conductive layer, in this case, on the second input conductive layer 112, and the lower bridge power chip set is disposed on a negative or output conductive layer 114, in this case, on the first input conductive layer 113.
Typically one power cell 1 corresponds to one first input electrode 4 and one second input electrode 3; if there are 3 power cells 1 in the power module 1000, there are correspondingly 3 first input electrodes 4 and 3 second input electrodes 3 and 3 output electrodes 5 in the power module 1000.
The applicant has found during the development that this approach is problematic: because the power supply electrode can introduce inductance, the unit commutation loop has large inductance, high peak voltage and large dynamic loss.
To solve this problem, the inductance of the power supply electrodes is reduced, and the external structure of the module is not substantially changed. In the embodiment, the structure of the existing power electrode is improved, and the input electrodes with the same polarity in the original plurality of power electrodes are combined to form an input bus bar; for example, a plurality of first input electrodes 4 are combined to form a first input bus bar 40; and combining a plurality of second input electrodes 3 to form a second input bus bar 30. The first input bus bar 40 and the second input bus bar 30 are arranged in a laminated manner.
As shown in fig. 2a to 7, the first input bus bar 40 and the second input bus bar 30 are arranged in a stacked manner, i.e. in a manner that the first input bus bar 40 and the second input bus bar 30 are arranged in a stacked manner. In this embodiment, the first input bus bar 40 is located at the upper portion, and the second input bus bar 30 is located at the lower portion.
As shown in fig. 12, the second input bus bar 30 in this embodiment includes a second bar main body portion 302, a second bar internal connection portion 303, and a second bar external connection portion 301; the number of the second bus bar external connectors 301 may be one or more. Preferably, the number of the cells is 2 or more, for example, 2, 3, or 4 or more. In this example, the number of the second bus bar external connectors 301 corresponds to the number of the power cells 1, and if 3 power cells 1 (respectively labeled 1U, 1W, and 1V) are provided in the power module 1000 in this example, the number of the second bus bar external connectors 301 is also 3.
As shown in fig. 5, the second busbar interconnecting portion 303 is connected to the power unit 1, the second busbar external connecting portion 301 extends from the second busbar main body portion 302 to the outside of the power module 1000, and the second busbar external connecting portion 301 is used for electrically connecting with one of the electrodes of the power supply (in the lower embodiment, there is a specific explanation of the power unit 1, and the specific electrical connection thereof will be specifically explained in the following embodiments);
as shown in fig. 13, the first input bus bar 40 in this embodiment includes a first bar main body 402, a first bar internal connection portion 403, and a first bar external connection portion 401; the number of the first bus bar external connection portions 401 may be one or more. Preferably, the number of the cells is 2 or more, for example, 2, 3, or 4 or more. In this example, the number of the first bus bar external connection units 401 corresponds to the number of the power cells 1, and if 3 power cells 1 (respectively, 1U, 1W, and 1V) are provided in the power module 1000 in this example, the number of the first bus bar external connection units 401 is 3.
As shown in fig. 5, the first busbar interconnecting portion 403 is connected to the power unit 1, the first busbar external connecting portion 401 extends from the first busbar main body portion 402 to the outside of the power module 1000, and the first busbar external connecting portion 401 is used for electrically connecting with one of the electrodes of the power supply (the power unit 1 is specifically explained in the lower embodiment, and the specific electrical connection thereof will be specifically explained in the following embodiments);
as shown in fig. 13, the output electrode 5 includes an output main body portion 52, an output external connection portion 51, and an output internal connection portion 53; the output external part 51 is used for outputting a driving signal to the outside; the output interconnector 53 is used to electrically connect with the power unit 1 (in the lower embodiment, there is a specific explanation of the power unit 1, and its specific electrical connection will be specifically explained in the following embodiments). In this example, each input electrode corresponds to one power cell 1, and it is understood that the power module 1000 in this example includes 3 power cells 1. Correspondingly, 3 output electrodes 5 are included in the power module 1000.
Preferably, the first input bus bar 40 is provided with 3 first bus bar external connection portions 401. The second input bus bar 30 is provided with 3 second bus bar external connection parts 301. The first input bus bar 40 and the second input bus bar 30 are arranged in a vertically stacked manner, and meanwhile, from a horizontal space, 3 second bus bar external connectors 301 of the second input bus bar 30 and 3 first bus bar external connectors 401 of the first input bus bar 40 are arranged at intervals; in this embodiment, the first input bus bar 40 is a negative electrode, the second input bus bar 30 is a positive electrode, and as shown in fig. 2a, from right to left in the figure, the polarities of the electrodes of the second bus bar external portion 301 of the second input bus bar 30 and the first bus bar external portion 401 of the first input bus bar 40 that are spaced apart are as follows: positive electrode, negative electrode, positive electrode, negative electrode. (of course, the polarities of the input bus bars may be opposite, and the first input bus bar 40 may be a positive electrode, the second input bus bar 30 may be a negative electrode, and the polarities of the first bus bar external connection portion 401 and the second bus bar external connection portion 301 which are arranged at intervals therebetween are as follows: negative electrode, positive electrode, negative electrode, and positive electrode.)
In this embodiment, as a preferable mode, the first bus bar external connection portion 401 of the first input bus bar 40, the second bus bar external connection portion 301 of the second input bus bar 30, and the output external connection portion 51 of the output electrode 5 may be provided with external connection holes, and the external connection holes may be screwed with the bolts and nuts by matching, wherein the number of the external connection holes is not limited, and may be one or more. As shown in fig. 13, the first bus bar external connection portion 401 of the first input bus bar 40 is provided with a first bus bar external connection hole 4011, as shown in fig. 12, the second bus bar external connection portion 301 of the second input bus bar 30 is provided with a second bus bar external connection hole 3011, as shown in fig. 14, the output external connection portion 51 of the output electrode 5 is provided with an output external connection hole 511.
The shapes of the first input bus bar 40, the second input bus bar 30 and the output electrode 5 are not particularly limited, but preferably, as shown in fig. 12, the second input bus bar 30 is in a zigzag shape as a whole, as shown in fig. 13, the first input bus bar 40 is in a zigzag shape in this example, and as shown in fig. 14, the output electrode 5 is in a zigzag shape in this example.
With the preferred first input bus bar 40 and the preferred second input bus bar 30 in this example, the input electrodes of the three power units 1 are connected in parallel in a stacked arrangement as shown in the figure, and the power is distributed to the three power units 1. The design is similar to the parallel connection of the inductors of the input electrodes of three groups of power supplies, so that the inductance of a module commutation loop is greatly reduced, and the loss of the module is reduced.
As shown in fig. 8-11, this example will further explain the optimized layout of the circuit copper layer 11 of the present disclosure. The circuit copper layer 11 in this example includes a second input conductive layer 112, a first input conductive layer 113, and an output conductive layer 114; in the embodiment, the liquid crystal display device further comprises a first input drainage layer 111 and a control conductive layer 115; the first input current guiding layer 111 is used to facilitate electrical connection with the source of the lower bridge power chip 13 on the first input conductive layer 113, and the control conductive layer 115 is used to electrically connect with the gate of each power chip 13 through a bonding wire or other electrical connection for inputting control signals. Then, arranging a power chip 13 on the circuit copper layer 11 to form an upper bridge power chip set and a lower bridge power chip set, wherein the upper bridge power chip set comprises a plurality of upper bridge chips 13b, and the lower bridge power chip set comprises a plurality of lower bridge chips 13 a; the lower bridge power chip set is arranged on the negative conductive layer or output conductive layer 114; the upper bridge chip 13b is arranged on the positive conductive layer.
In this example, the power chip 13 (referred to as a lower bridge chip 13a) is provided on the first input conductive layer 113, and the power chip 13 (referred to as an upper bridge chip 13b) is provided on the second input conductive layer 112. When the power chip 13 is disposed on the circuit copper layer 11, it always has its drain electrode on the lower surface directly electrically connected to the circuit copper layer 11, and its source electrode on the upper surface of the power chip 13 is electrically connected by a bonding wire or other electrical connection member. The first input conductive layer 113 is provided with a plurality of first input connections 1131, and the first input connections 1131 are not connected to each other, so as to adjust the current distribution of each portion.
In the prior art, the second input conductive layer 112 is usually provided with a via for direct or indirect electrical connection with the second input electrode 3, and this way, there is only one current path, so that the current is concentrated on one side and the parasitic inductance is large. And the current distribution of each upper bridge chip cannot be reasonably adjusted by the method.
As shown in fig. 9, the second input conductive layer 112 disclosed in this example includes a plurality of second input connection portions 1121, a plurality of second input via portions 1122, and a second chip layout region, the second bridge arm power chip group is disposed on the second chip layout region, and the plurality of second input connection portions 1121 are electrically connected to the second input electrodes 4. The second chip layout area comprises a plurality of second input support arms 1123, and the second bridge arm power chip set is arranged on the plurality of second input support arms 1123. In this embodiment, two second input connection portions 1121 are provided for electrically connecting with the second bus bar interconnecting portion 303 of the second input bus bar 30 through the binding line; multiple second input connections 1121 may also be provided. The two second input connection portions 1121 at the left and right sides are respectively connected to second input path portions 1122, the second input path portions 1122 are in loop communication, and a plurality of second input arms 1123 are connected thereto, and the upper bridge chip 13b is disposed on the second input arms 1123. In this embodiment, since the second input bus bar 30 is used as a positive electrode for electrically connecting with an external power supply positive electrode, the current introduced from the second input conductive layer 112 leaves a source on the upper surface of the upper bridge chip 13b to the output electrode 5.
In this example, a first empty area 1124 is formed inside the second input conductive layer 112, and the first empty area 1124 is mainly used for disposing the first input conductive layer 113 and the other circuit copper layer 11. In this example, a second vacant region 1125 is further formed between the second input arms 1123 of the second input conductive layer 112, the second vacant region 1125 is used for arranging the control conductive layer 115, and the control conductive layer 115 is electrically connected to the gate electrode of the upper bridge chip 13b by using a bonding wire or other electrical connection member.
In this example, the positive electrode current is input through the multiple second input connection 1121 in order to adjust the current distribution of each portion. The current distribution between the second input conductive layer 112 and the second input electrode 3 can also be adjusted by adjusting the width of the second input connection portion 1121 and the number of binding lines, which directly affects the parasitic inductance thereon and the passing current distribution on each power chip 13.
As shown in fig. 10, the first input conductive layer 113 disclosed in this embodiment includes a first input connection portion 1131 and a first input arm 1132, the first input connection portion 1131 is used to connect the source of the upper bridge chip 13b in the output conductive layer 114 or the second input conductive layer 112 (because the source of the upper bridge chip 13b is also electrically connected to the output conductive layer 114), the lower bridge chip 13a is disposed on the first input arm 1132, the drain of the lower bridge chip 13a is directly and electrically connected to the first input conductive layer 113, and the source thereof is directly and indirectly electrically connected to an external negative electrode (in this embodiment, the first input electrode 4, preferably, the first bus bar interconnection 403 on the first input bus bar 40). In this example, a third empty area 1133 is left between the first input arms 1132, and the third empty area 1133 is used to arrange the corresponding control conductive layer 115.
In this embodiment, for convenience of wiring, a first input drainage layer 111 is first disposed, the first input drainage layer 111 is used as a connection layer between the lower bridge chip 13a and the first input bus bar 40, and the first input drainage layer 111 is used to be electrically connected to the source of the lower bridge chip 13a through a binding wire or other electrical connection member, and is electrically connected to the first bar interconnection portion of the first input bus bar 40 through the binding wire or other electrical connection member.
As shown in fig. 11, in this example, the first vacant area 1124 in the second input conductive layer 112 is mainly used to arrange the first input conductive layer 113 and the first input current guiding layer 111.
As shown in fig. 5, in an enlarged view, the second bus bar interconnecting portion 303 of the second input bus bar 30 is electrically connected to the multiple second input connecting portions 1121 on the second input conductive layer 112 through binding wires or other electrical connectors (not labeled); the first bus bar interconnector 403 of the first input bus bar 40 is electrically connected to the first input current guiding layer 111 by a binding wire or other electrical connector (not marked in the figure).
The applicant has found that the plurality of lower bridge chips 13a of the first input arm 1132 on the first input conductive layer 113 are all connected in parallel, and each lower bridge chip 13a is electrically connected to the first input electrode 4 or the first input bus bar 40 in this example through an electrical connection. Conventionally, a single binding wire or other metal foil is usually used as an electrical connector to electrically connect the source electrode of the single lower bridge chip 13a and the first input electrode 4 or the first input bus bar 40; this type of connection is very complex and prone to errors.
As shown in the enlarged view of fig. 6, the plurality of upper bridge chips 13b on the second input arm 1123 on the second input conductive layer 112 are also connected in parallel, and the source of each upper bridge chip 13b is electrically connected to the output electrode 5 or the first input conductive layer 113 directly or indirectly through an electrical connection member (if the first input conductive layer 113 is negative, the first input conductive layer 113 and the output conductive layer 114 must be electrically connected). It is common to use a single bonding wire or other metal foil as an electrical connection to electrically connect the source of the single upper bridge chip 13b and the output electrode 5 or the first input conductive layer 113; this type of connection is very complex and is also prone to errors.
In the research and development process, the applicant finds the connection commonality of each power chip 13, and based on the connection commonality, the following improved two source electrode connecting pieces 10 are provided; the two source connectors 10 are respectively used for realizing the parallel connection of the upper bridge chip 13b and the parallel connection of the lower bridge chip 13a, and are correspondingly connected with the corresponding input electrodes (or input bus bars) or the corresponding output electrodes 5. For the sake of distinction, the source connection 10 for achieving the parallel connection of the sources on the upper bridge chip 13b is referred to as an upper bridge source connection 10b, and the source connection 10 for achieving the parallel connection of the sources on the lower bridge chip 13a is referred to as a lower bridge source connection 10 a.
The sources of the upper bridge chip 13b in the upper bridge power chip set are connected in parallel through an upper bridge source connecting piece 10b, and the upper bridge source connecting piece 10b is directly or indirectly connected to the output electrode 5; the lower bridge chips 13a in the lower bridge power chip set are connected in parallel through a lower bridge source connecting piece 10a, and the lower bridge source connecting piece 10a is directly or indirectly connected to a negative electrode.
As shown in fig. 15 and 16, the two source connectors 10 disclosed in this example are each E-shaped. The bus bar comprises a bus bar part 102 and welding bridges 101 connected to the bus bar part 102, wherein each welding bridge 101 is provided with a welding part 1011 welded with the power chip 13 and an avoiding part 1012 arched between the welding parts 1011 to form an avoiding way. The upper bridge chip 13b can be connected in parallel by the solder bridge 101, and electrically connected to the external input electrode or output electrode 5 via the bus bar 102 or the solder bridge 101.
Specifically, as shown in fig. 15, this example discloses an E-shaped lower bridge source connection 10 a; the lower bridge source electrode connecting piece 10a comprises a bus portion 102 and welding bridges 101 connected to the bus portion 102, wherein a welding portion 1011 welded with the lower bridge chip 13a is formed on each welding bridge 101, and an avoiding portion 1012 formed by arching between the welding portion 1011. The bus bar 102 is provided with a negative electrode connection terminal 102a (or the negative electrode connection terminal 102a may be provided on the solder bridge 101), and as shown in an enlarged view of fig. 5, the negative electrode connection terminal 102a is soldered to the first input current guiding layer 111, so that the source of each lower bridge chip 13a is electrically connected to the first input current guiding layer 111 in parallel, and the first input current guiding layer 111 is electrically connected to the first input bus bar 40 through a binding line. Of course, it is also conceivable to eliminate the first input current guiding layer 111, and directly weld the negative electrode connection end 102a of the lower bridge source connection component 10a to the first input bus bar 40 or the first input electrode 4 (in this case, the first input bus bar 40 or the first input electrode 4 is a negative electrode).
As shown in fig. 16, this example discloses an E-shaped upper bridge source connection 10 b; the upper bridge source electrode connecting piece 10b comprises a bus part 102 and welding bridges 101 connected to the bus part 102, wherein a welding part 1011 welded with the upper bridge chip 13b and an avoiding part 1012 formed by arching between the welding part 1011 are formed on each welding bridge 101; the bus bar 102 or the solder bridge 101 is formed with an output electrode connection terminal 103 which is electrically connected to the output electrode 5 directly or indirectly.
In this case, the output electrode connection terminal 103, which is electrically connected directly or indirectly to the output electrode 5, is preferably provided at the upper end of the solder bridge 101.
In this example, as a preferable mode, the bus portion 102 is further provided with a negative bus terminal 102b, and as shown in fig. 6, the negative bus terminal 102b is soldered to the first input conductive layer 113, so that the sources of the respective lower bridge chips 13a are electrically connected in parallel to the first input conductive layer 113, the output electrode connection terminal 103 is soldered to the output conductive layer 114, and the output conductive layer 114 is electrically connected to the output electrode 5 through a bonding wire. Of course, it is also conceivable to dispense with the output conductive layer 114 and to solder the output electrode connection 103 of the upper bridge source connection 10b directly to the output electrode 5.
The source electrode connecting member 10 is integrally formed by using a metal foil. Which is generally integrally stamped and formed by a metal foil. The material of the metal foil is preferably aluminum foil or copper foil; preferably, copper foil is used, which is more ductile and solderable.
By adopting the source electrode connecting piece 10 disclosed by the embodiment, the mode that each power chip 13 is provided with the corresponding binding wire or other electric connecting pieces in the prior art can be replaced, the source electrode connecting piece 10 is integrally formed and is simultaneously connected with a plurality of power chips to form a current path, the wiring of the module is simplified, the wiring inductance of the module is reduced, the installation is convenient, the assembly process is simpler, the product manufacturing efficiency is improved, the connection reliability is enhanced, and the production cost is reduced.
As shown in fig. 17 and 18, this embodiment will specifically explain a power module formed by combining the first power module 1000 and the capacitor module 2000 of the present disclosure.
In the power module disclosed in this embodiment, as shown in fig. 17 and 18, the power module includes a power module 1000 and a capacitor module 2000;
the power module 1000 is the content described in the upper part of this embodiment, the capacitor module 2000 includes capacitor electrodes and capacitors 7, the capacitor electrodes include a first capacitor electrode 9 and a second capacitor electrode 8, a plurality of capacitors 7 connected in parallel are sandwiched between the first capacitor electrode 9 and the second capacitor electrode 8, and the capacitors 7 connected in parallel form a capacitor core group; the first capacitor electrode and the second capacitor electrode have lead portions arranged in a stacked manner; the first capacitor electrode 9 and the second capacitor electrode 8 are respectively connected with the anode and the cathode of the capacitor core group;
wherein, a first capacitance electrode connection end 91 is arranged on the leading-out part of the first capacitance electrode 9; the second capacitor electrode 8 is provided with a second capacitor electrode connection terminal 81 protruding therefrom at the lead portion. The first capacitor electrode connection end 91 and the second capacitor electrode connection end 81 are electrically connected to the first input bus bar 40 and the second input bus bar 30 in the power module 1000, respectively. Specifically, the first bus bar external connection end on the first input bus bar 40 is electrically connected to the first capacitor electrode connection end 91; the second bus bar external connection end on the second input bus bar 30 is electrically connected with the second capacitance electrode connection end 81.
The first capacitor electrode 9 and the second capacitor electrode 8 are arranged in a zigzag manner and are of a sheet (or plate type) structure, and the connecting end 81 of the first capacitor electrode 9 and the connecting end 81 of the second capacitor electrode are positioned in the middle of one side of the capacitor core group.
As shown in fig. 17 and 18, the first capacitor electrode connection end 91 is electrically connected to the first bus bar external connection end of the first input bus bar 40 through a fixing device (not shown in the figure); the second capacitor electrode connecting end 81 is electrically connected to the second bus bar external connection end of the second input bus bar 30 through a fixing device. The fixing means may for example be a combination of bolts, nuts, or any other alternative fastening means. Taking a bolt and nut combination as an example, the first capacitor electrode connection terminal 91 and the second capacitor electrode connection terminal 81 are both provided with connection holes (for the sake of distinction, the connection hole on the first capacitor electrode connection terminal 91 is referred to as a first capacitor electrode connection hole 910, the connection hole on the second capacitor electrode connection terminal 81 is referred to as a second capacitor electrode connection hole 810), the bolt is correspondingly inserted through the connection hole on the capacitor electrode and the external connection hole on the input electrode, and then the bolt is locked by the nut to electrically connect the corresponding capacitor electrode and the input electrode.
The working process is described as follows, the upper bridge chips 13b on the second input conductive layer 112 are connected in parallel to form an upper bridge power chip set, the lower bridge chips 13a on the first input conductive layer 113 are connected in parallel to form a lower bridge power chip set, and the on-off of the bridge arms is controlled by controlling the grid electrodes (G electrodes) of the power chips 13 in the upper bridge power chip set and the lower bridge power chip set; the working process is described as follows: the working current flowing from the second input electrode 3 flows into the upper bridge arm through the second input conductive layer 112 via the binding line, flows to the output conductive layer 114 via the power chip 13 (upper bridge chip 13b) on the upper bridge arm via the upper bridge source connecting piece 10b, and is retained to the output electrode 5 via the binding line by the output conductive layer 114; the free-wheeling current flowing from the first input electrode 4 (negative electrode) through the binding line flows into the first input lead layer 111, then flows into the power chip 13 (lower bridge chip 13a) on the lower bridge arm through the lower bridge source connector 10a, then flows to the output conductive layer 114, and finally flows from the output conductive layer 114 to the output electrode 5 through the binding line.
Example 2
As shown in fig. 19A to 22, this example will be described with reference to a power module 1000 and a power module of type B, which have similar designs as those of embodiment 1 in the overall structure, but different electrode designs from embodiment 1. The layout optimization design of the circuit layer in the power module 1000 and the improved design of the source connecting member 10 of the new utility model are further illustrated by the present embodiment.
As shown in fig. 19A, 19B, and 20A, this example discloses a power module 1000, where the power module 1000 includes a bottom plate 2, and a plurality of power units 1 disposed on the bottom plate 2, and each power unit 1 is connected to a first input electrode 4, a second input electrode 3, and an output electrode 5; the first input electrode 4, the second input electrode 3, and the output electrode 5 are connected to each power unit 1, which is different from the embodiment 1 in that the first input electrode 4 is integrated into the first input bus bar 40 and the second input electrode 3 is integrated into the second input bus bar 30.
When it is performed to connect the upper bridge chip 13b and the lower bridge chip 13a in the individual power unit 1, it is also electrically connected using the source connection member 10 as in the manner of embodiment 1 as an improvement. The two source connectors 10 are used to realize the parallel connection of the upper bridge chip 13b and the parallel connection of the lower bridge chip 13a, respectively, and are correspondingly connected to the corresponding input electrode or output electrode 5. For the sake of distinction, the source connection 10 for achieving the parallel connection of the sources on the upper bridge chip 13b is referred to as an upper bridge source connection 10b, and the source connection for achieving the parallel connection of the sources on the lower bridge chip 13a is referred to as a lower bridge source connection 10 a.
The upper bridge source connection 10b and the lower bridge source connection 10a are substantially the same as those in embodiment 1, and the difference is only how many bridges of the solder bridge 101, and therefore, the description thereof is omitted.
Similarly, the power unit disclosed in this example is similar to the concept of embodiment 1, and the specific structure is slightly different, and the words are specifically explained with reference to fig. 20B to 20E.
As shown in fig. 20B to 20E, this example will further explain the optimized layout of the circuit copper layer 11 of the present invention. As shown in fig. 20B, 20C, the circuit copper layer 11 in this example includes a second input conductive layer 112, a first input conductive layer 113, and an output conductive layer 114; in the embodiment, the liquid crystal display device further comprises a first input drainage layer 111 and a control conductive layer 115; the first input current guiding layer 111 is used to facilitate electrical connection with the source of the lower bridge power chip 13 on the first input conductive layer 113, and the control conductive layer 115 is used to electrically connect with the gate of each power chip 13 through a bonding wire or other electrical connection for inputting control signals. Then, arranging a power chip 13 on the circuit copper layer 11 to form an upper bridge power chip set and a lower bridge power chip set, wherein the upper bridge power chip set comprises a plurality of upper bridge chips 13b, and the lower bridge power chip set comprises a plurality of lower bridge chips 13 a; the lower bridge power chip set is arranged on the negative conductive layer or output conductive layer 114; the upper bridge chip 13b is arranged on the positive conductive layer.
In this example, the power chip 13 (referred to as a lower bridge chip 13a) is provided on the first input conductive layer 113, and the power chip 13 (referred to as an upper bridge chip 13b) is provided on the second input conductive layer 112. When the power chip 13 is disposed on the circuit copper layer 11, it always has its drain electrode on the lower surface directly electrically connected to the circuit copper layer 11, and its source electrode on the upper surface of the power chip 13 is electrically connected by a bonding wire or other electrical connection member. The first input conductive layer 113 is provided with a plurality of first input connections 1131, and the first input connections 1131 are not connected to each other, so as to adjust the current distribution of each portion.
In the prior art, the second input conductive layer 112 is usually provided with a via for direct or indirect electrical connection with the second input electrode 3, and this way, there is only one current path, so that the current is concentrated on one side and the parasitic inductance is large. And the current distribution of each upper bridge chip cannot be reasonably adjusted by the method.
As shown in fig. 20D, in the second input conductive layer 112 disclosed in this example, the second input conductive layer includes 3 paths of second input connection portions 1121, 3 paths of second input via portions 1122, and a second chip layout region, the second bridge arm power chip group is disposed on the second chip layout region, and the 3 paths of second input connection portions 1121 are electrically connected to the second input electrodes 4. The second chip layout area comprises 4 paths of second input support arms 1123, and the second bridge arm power chip set is arranged on the 4 paths of second input support arms 1123. In this embodiment, the 3-way second input connection portion 1121 is used for electrically connecting to the second bus bar interconnecting portion 303 of the second input bus bar 30 through a binding line; the 3-way second input connection portions 1121 are connected to the corresponding second input path portions 1122, respectively, and are connected to a plurality of second input arms 1123, and the upper bridge chip 13b is disposed on the second input arms 1123. In this embodiment, since the second input bus bar 30 is used as a positive electrode for electrically connecting with an external power supply positive electrode, the current introduced from the second input conductive layer 112 leaves a source on the upper surface of the upper bridge chip 13b to the output electrode 5.
In this example, two first vacant areas 1124 are formed inside the second input conductive layer 112, and the first vacant areas 1124 are mainly used for arranging the first input conductive layer 113 and other circuit copper layers 11 (such as the control conductive layer 115 and the first input current guiding layer 111). In this example, a second vacant region 1125 is further formed between the second input arms 1123 of the second input conductive layer 112, the second vacant region 1125 is used for arranging the control conductive layer 115, and the control conductive layer 115 is electrically connected to the gate electrode of the upper bridge chip 13b by using a bonding wire or other electrical connection member.
In this example, the positive electrode current is input through the 3-way second input connection 1121 in order to adjust the current distribution of each portion. The current distribution between the second input conductive layer 112 and the second input electrode 3 can also be adjusted by adjusting the width of the second input connection portion 1121 and the number of binding lines, which directly affects the parasitic inductance thereon and the passing current distribution on each power chip 13.
As shown in fig. 20E, the first input conductive layer 113 disclosed in this embodiment includes a first input connection portion 1131 and a first input arm 1132, the first input connection portion 1131 is used to connect the source of the upper bridge chip 13b in the output conductive layer 114 or the second input conductive layer 112 (because the source of the upper bridge chip 13b is also electrically connected to the output conductive layer 114), the lower bridge chip 13a is disposed on the first input arm 1132, the drain of the lower bridge chip 13a is directly and electrically connected to the first input conductive layer 113, and the source thereof is directly or indirectly and electrically connected to an external negative electrode (in this embodiment, the first input electrode 4, preferably, the first bus bar interconnection 403 on the first input bus bar 40). In this example, a third empty area 1133 is left between the first input arms 1132, and the third empty area 1133 is used to arrange the corresponding control conductive layer 115.
In this embodiment, for convenience of wiring, a first input drainage layer 111 is preferably provided, the first input drainage layer 111 is used as a connection layer between the lower bridge chip 13a and the first input bus bar 40, and the first input drainage layer 111 is used to be electrically connected to the source of the lower bridge chip 13a through a binding wire or other electrical connector and to be electrically connected to the first bar interconnection portion of the first input bus bar 40 through the binding wire or other electrical connector.
Similarly, with the power module 1000 disclosed in this embodiment, because the source connector 10 is adopted, a manner that each power chip 13 in the prior art is provided with a corresponding binding wire or other electrical connectors can be replaced, the source connector 10 is integrally formed and simultaneously connected with a plurality of chips to form a current path, wiring of the module is simplified, wiring inductance of the module is reduced, and meanwhile, the power module is convenient to install, so that the assembly process is simpler, product manufacturing efficiency is improved, connection reliability of the power module is enhanced, and production cost is reduced.
Similarly, as shown in fig. 21 and 22, the power module disclosed in this example includes a power module 1000 and a capacitor module 2000;
the power module 1000 is the content described in the upper part of this embodiment, the capacitor module 2000 includes capacitor electrodes and capacitors 7, the capacitor electrodes include a first capacitor electrode 9 and a second capacitor electrode 8, a plurality of capacitors 7 connected in parallel are interposed between the first capacitor electrode 9 and the second capacitor electrode 8, and the first capacitor electrode and the second capacitor electrode have lead-out portions arranged in a stacked manner; the capacitors 7 connected in parallel form a capacitor core group; the first capacitor electrode 9 and the second capacitor electrode 8 are respectively connected with the anode and the cathode of the capacitor core group;
wherein, a first capacitance electrode connection end 91 is arranged on the leading-out part of the first capacitance electrode 9; the second capacitor electrode 8 is provided with a second capacitor electrode connection terminal 81 protruding therefrom at the lead portion. The first and second capacitive electrode connection terminals 91 and 81 are electrically connected to the first and second input electrodes 4 and 3 in the power module 1000, respectively. Specifically, the first external connection end of the first input electrode 4 is electrically connected to the first capacitance electrode connection end 91; the second external terminal of the second input electrode 3 is electrically connected to the second capacitor electrode connection terminal 81.
The first capacitor electrode 9 and the second capacitor electrode 8 are arranged in a zigzag manner and are of a sheet (or plate type) structure, and the connecting end 81 of the first capacitor electrode 9 and the connecting end 81 of the second capacitor electrode are positioned in the middle of one side of the capacitor core group.
As shown in fig. 21 and 22, the first capacitor electrode connecting terminal 91 is electrically connected to the first external connection portion 41 of the first input electrode 4 through a fixing device (not shown); the second capacitor electrode connecting terminal 81 is electrically connected to the second external connection portion 31 of the second input electrode 3 by a fixing means.
The fixing means may for example be a combination of bolts, nuts, or any other alternative fastening means. Taking a bolt and nut combination as an example, the first capacitor electrode connection terminal 91 and the second capacitor electrode connection terminal 81 are both provided with connection holes (for the sake of distinction, the connection hole on the first capacitor electrode connection terminal 91 is referred to as a first capacitor electrode connection hole 910, the connection hole on the second capacitor electrode connection terminal 81 is referred to as a second capacitor electrode connection hole 810), the bolt is correspondingly inserted through the connection hole on the capacitor electrode and the external connection hole on the input electrode, and then the bolt is locked by the nut to electrically connect the corresponding capacitor electrode and the input electrode. Since the first capacitor electrode connecting end 91 and the second capacitor electrode connecting end 81 are stacked, the first capacitor electrode connecting end 91 located at the upper portion thereof shields the second capacitor electrode connecting end 81, and therefore, the avoiding hole 911 needs to be formed above the second capacitor electrode connecting hole 810.
Example 3
As shown in fig. 23 to 25, the present example will be described by a power module 1000 and a power module of model C, which have similar designs as those in embodiments 1 and 2 with respect to the input electrode and the output electrode 5, but the layout design of the circuit layers in the power module 1000 is different from those in embodiments 1 and 2, and the source connection member 10 in embodiments 1 and 2 is not used. The present embodiment mainly aims to provide another power module 1000 and power module that convert the original input electrodes into input bus bars.
As shown in fig. 23, in this example, as in embodiment 1, the structure of the existing power electrode is improved in this example, and the input electrodes with the same polarity in the original multiple power electrodes are combined to form an input bus bar; for example, a plurality of first input electrodes 4 are combined to form a first input bus bar 40; and combining a plurality of second input electrodes 3 to form a second input bus bar 30.
The first input bus bar 40 and the second input bus bar 30 are arranged in a stacked manner, that is, in a stacked manner, the first input bus bar 40 and the second input bus bar 30 are arranged in a manner that they are spatially disposed above and below each other. In this embodiment, the first input bus bar 40 is located at the upper portion, and the second input bus bar 30 is located at the lower portion.
The second input bus bar 30 in this example includes a second bus bar main body portion 302, a second bus bar internal connection portion 303, and a second bus bar external connection portion 301; the number of the second bus bar external connectors 301 may be one or more. Preferably, the number of the cells is 2 or more, for example, 2, 3, or 4 or more. In this example, the number of the second bus bar external connectors 301 corresponds to the number of the power cells 1, and if 3 power cells 1 (respectively labeled 1U, 1W, and 1V) are provided in the power module 1000 in this example, the number of the second bus bar external connectors 301 is also 3.
The first input bus bar 40 comprises a first bus bar main body part 402, a first bus bar internal connection part 403 and a first bus bar external connection part 401, the first bus bar internal connection part 403 is connected to the power unit 1, the first bus bar external connection part 401 extends from the first bus bar main body part 402 to the outside of the power module 1000, and the first bus bar external connection part 401 is used for being electrically connected with one electrode of a power supply;
wherein, the output electrode 5 comprises an output main body part 52, an output external connection part 51 and an output internal connection part 53; the output external part 51 is used for outputting a driving signal to the outside; the output interconnector 53 is used to electrically connect to the power unit 1. In this example, each input electrode corresponds to one power cell 1, and it is understood that the power module 1000 in this example includes 3 power cells 1. Correspondingly, 3 output electrodes 5 are included in the power module 1000.
Preferably, the first input bus bar 40 is provided with 3 first bus bar external connection portions 401. The second input bus bar 30 is provided with 3 second bus bar external connection parts 301. The first input bus bar 40 and the second input bus bar 30 are stacked up and down in a vertical view, and 3 second bus bar external connectors 301 of the second input bus bar 30 and 3 first bus bar external connectors 401 of the first input bus bar 40 are spaced apart from each other in a horizontal space
In this example, the first bus bar external connection portion 401 of the first input bus bar 40,
The second bus bar external connection portion 301 of the second input bus bar 30 and the output external connection portion 51 of the output electrode 5 may be provided with external connection holes, and the external connection holes are matched with bolts and nuts to perform threaded connection, wherein the number of the external connection holes is not limited, and may be one or more.
The shapes of the first input bus bar 40, the second input bus bar 30, and the output electrode 5 are not particularly limited, and in a preferred embodiment, the second input bus bar 30 is in a zigzag shape as a whole, the first input bus bar 40 is in a zigzag shape, and the output electrode 5 is in a zigzag shape.
The first input bus bar 40 and the second input bus bar 30 are modified according to the present embodiment. Similarly, it connects the input electrodes of the three power cells 1 in parallel, and distributes the power to the three power cells 1. The design is similar to the parallel connection of the inductors of the input electrodes of three groups of power supplies, so that the inductance of a module commutation loop is greatly reduced, and the loss of the module is reduced.
Similarly, as shown in fig. 24 and 25, the power module includes a power module 1000 and a capacitor module 2000;
the power module 1000 is the content described in the upper part of this embodiment, the capacitor module 2000 includes capacitor electrodes and capacitors 7, the capacitor electrodes include a first capacitor electrode 9 and a second capacitor electrode 8, a plurality of capacitors 7 connected in parallel are sandwiched between the first capacitor electrode 9 and the second capacitor electrode 8, and the capacitors 7 connected in parallel form a capacitor core group; the first capacitor electrode and the second capacitor electrode have lead portions arranged in a stacked manner; the first capacitor electrode 9 and the second capacitor electrode 8 are respectively connected with the anode and the cathode of the capacitor core group;
wherein, the lead-out part on the first capacitance electrode 9 is provided with a protruded first capacitance electrode connection end 91; the second capacitor electrode 8 has a second capacitor electrode connection 81 protruding from the upper lead portion. The first capacitor electrode connection end 91 and the second capacitor electrode connection end 81 are electrically connected to the first input bus bar 40 and the second input bus bar 30 in the power module 1000, respectively. Specifically, the first bus bar external connection end on the first input bus bar 40 is electrically connected to the first capacitor electrode connection end 91; the second bus bar external connection end on the second input bus bar 30 is electrically connected with the second capacitance electrode connection end 81.
The first capacitor electrode 9 and the second capacitor electrode 8 are arranged in a zigzag manner and are of a sheet (or plate type) structure, and the connecting end 81 of the first capacitor electrode 9 and the connecting end 81 of the second capacitor electrode are positioned in the middle of one side of the capacitor core group.
As shown in fig. 24 and 25, the first capacitor electrode connection end 91 is electrically connected to the first bus bar external connection end of the first input bus bar 40 through a fixing device (not shown in the figure); the second capacitor electrode connecting end 81 is electrically connected to the second bus bar external connection end of the second input bus bar 30 through a fixing device. The fixing means may for example be a combination of bolts, nuts, or any other alternative fastening means. Taking a combination of a bolt and a nut as an example, the first capacitor electrode connection end 91 and the second capacitor electrode connection end 81 are both provided with connection holes (for the sake of distinction, the connection hole on the first capacitor electrode connection end 91 is referred to as a first capacitor electrode connection hole 910, the connection hole on the second capacitor electrode connection end 81 is referred to as a second capacitor electrode connection hole 810), the bolt correspondingly penetrates through the connection hole on the capacitor electrode and the external connection hole on the input electrode, and then the bolt is locked by the nut so as to electrically connect the corresponding capacitor electrode and the input bus bar.
Example 4
As shown in fig. 26 to fig. 31, the present embodiment will be described by a power module 1000 and a power module of model D, which have similar designs as those of embodiment 1 in terms of the overall structure, but have a difference in layout design of the circuit layer in the power module 1000 in embodiment 1. To further illustrate the following innovative points that the present invention is intended to protect: regarding the optimal design of the source connection 10 and the optimal design of the input electrode.
As shown in fig. 26 and 27, the power module 1000 disclosed in this example also includes a base plate 2, and a power unit 1 disposed on the base plate 2, where the power unit 1 includes a substrate 12, a circuit copper layer 11, and a power chip group, the circuit copper layer 11 is formed on the substrate 12, and the power chip group is disposed on the circuit copper layer 11; the power chip set comprises an upper bridge power chip set and a lower bridge power chip set; the present example is similar to the embodiment 1 in design, and improves the structure of the existing power electrode, and combines the input electrodes with the same polarity in the original plurality of power electrodes to form an input bus bar; for example, a plurality of first input electrodes 4 are combined to form a first input bus bar 40; and combining a plurality of second input electrodes 3 to form a second input bus bar 30.
The first input bus bar 40 and the second input bus bar 30 are arranged in a stacked manner, i.e., in a stacked manner, that is, the first input bus bar 40 and the second input bus bar 30 are arranged in a manner that they are spatially disposed above and below each other. In this embodiment, the first input bus bar 40 is located at the upper portion, and the second input bus bar 30 is located at the lower portion.
The structure and connection mode of the first input bus bar 40 and the second input bus bar 30 are the same as those of the bus bar in embodiment 1, and are not described again.
Similarly, in this example, the input electrodes of the three power cells 1 are connected in parallel, and the power is distributed to the three power cells 1. The design is similar to the parallel connection of the inductors of the input electrodes of three groups of power supplies, so that the inductance of a module commutation loop is greatly reduced, and the loss of the module is reduced.
In this example, as in embodiment 1, two source connectors 10 are used to realize the parallel connection of the upper bridge chip 13b and the parallel connection of the lower bridge chip 13a, respectively, and are correspondingly connected to the corresponding input electrode (or input bus bar) or output electrode 5. Similarly, the source connection 10 for realizing the parallel connection of the sources on the upper bridge chip 13b is referred to as an upper bridge source connection 10b, and the source connection for realizing the parallel connection of the sources on the lower bridge chip 13a is referred to as a lower bridge source connection 10 a.
As shown in fig. 26 and 27, upper bridge source connector 10b and lower bridge source connector 10a are in a shape of a Chinese character 'wang'. Specifically, as shown in fig. 28, a wang-shaped lower bridge source connecting piece 10a is disclosed, which includes a bus bar portion 102 located in the middle and solder bridges 101 connected to the bus bar portion 102, and each solder bridge 101 is formed with a solder portion 1011 to be soldered to a lower bridge chip 13a and a relief portion 1012 formed by arching between the solder portions 1011. The specific connection method is similar to that in embodiment 1, and is not described again.
As shown in fig. 29, this example discloses a king-shaped upper bridge source connection member 10 b; the upper bridge source electrode connecting piece 10b comprises a bus part 102 and welding bridges 101 connected to the bus part 102, each welding bridge 101 is provided with a welding part 1011 welded with the upper bridge chip 13b and an avoiding part 1012 formed by arching between the welding parts 1011, a negative bus end 102b is arranged on the bus part 102, the negative bus end 102b is connected with an output conductive layer 114 in a welding mode, and the output conductive layer 114 is electrically connected with the output electrode 5 through a binding line. Of course, it is also conceivable to eliminate the output conductive layer 114, and directly solder the negative bus terminal 102b of the upper bridge source connector 10b to the output electrode 5, or connect it to the output electrode 5 through a bonding wire.
As shown in fig. 30 and fig. 31, a power module formed by packaging the power module 1000 in this embodiment is also disclosed in this embodiment, and this embodiment will specifically explain a power module formed by combining the first power module 1000 and the capacitor module 2000 disclosed in the present invention.
The source electrode connecting piece 10 disclosed by the embodiment can also replace the mode that each power chip is provided with a corresponding binding line or other electric connecting pieces in the prior art, the source electrode connecting piece 10 is integrally formed and is simultaneously connected with a plurality of chips to form a current path, so that the wiring of the module is simplified, the wiring inductance of the module is reduced, the installation is convenient, the assembly process is simpler, the product manufacturing efficiency is improved, the connection reliability is enhanced, and the production cost is reduced.
In the power module disclosed in this embodiment, as shown in fig. 30 and fig. 31, the power module includes a power module 1000 and a capacitor module 2000;
the power module 1000 is the content described in the upper part of this embodiment, the capacitor module 2000 includes capacitor electrodes and capacitors 7, the capacitor electrodes include a first capacitor electrode 9 and a second capacitor electrode 8, a plurality of capacitors 7 connected in parallel are sandwiched between the first capacitor electrode 9 and the second capacitor electrode 8, and the capacitors 7 connected in parallel form a capacitor core group; the first capacitor electrode and the second capacitor electrode have lead portions arranged in a stacked manner; the first capacitor electrode 9 and the second capacitor electrode 8 are respectively connected with the anode and the cathode of the capacitor core group;
wherein, the lead-out part on the first capacitance electrode 9 is provided with a protruded first capacitance electrode connection end 91; the second capacitor electrode 8 has a second capacitor electrode connection 81 protruding from the upper lead portion. The first capacitor electrode connection end 91 and the second capacitor electrode connection end 81 are electrically connected to the first input bus bar 40 and the second input bus bar 30 in the power module 1000, respectively. Specifically, the first bus bar external connection end on the first input bus bar 40 is electrically connected to the first capacitor electrode connection end 91; the second bus bar external connection end on the second input bus bar 30 is electrically connected with the second capacitance electrode connection end 81.
The first capacitor electrode 9 and the second capacitor electrode 8 are arranged in a zigzag manner and are of a sheet (or plate type) structure, and the connecting end 81 of the first capacitor electrode 9 and the connecting end 81 of the second capacitor electrode are positioned in the middle of one side of the capacitor core group.
As shown in fig. 30 and fig. 31, the first capacitor electrode connection end 91 is electrically connected to the first bus bar external connection end of the first input bus bar 40 through a fixing device (not shown in the figure); the second capacitor electrode connecting end 81 is electrically connected to the second bus bar external connection end of the second input bus bar 30 through a fixing device. The fixing means may for example be a combination of bolts, nuts, or any other alternative fastening means. Taking a bolt and nut combination as an example, the first capacitor electrode connection terminal 91 and the second capacitor electrode connection terminal 81 are both provided with connection holes (for the sake of distinction, the connection hole on the first capacitor electrode connection terminal 91 is referred to as a first capacitor electrode connection hole 910, the connection hole on the second capacitor electrode connection terminal 81 is referred to as a second capacitor electrode connection hole 810), the bolt is correspondingly inserted through the connection hole on the capacitor electrode and the external connection hole on the input electrode, and then the bolt is locked by the nut to electrically connect the corresponding capacitor electrode and the input electrode.
The above description is only exemplary of the present invention and should not be taken as limiting the scope of the present invention, as any modifications, equivalents, improvements and the like made within the spirit and principles of the present invention are intended to be included within the scope of the present invention.

Claims (8)

1. A power module with a power bus is characterized by comprising a power module and a capacitor module;
the capacitor module comprises a first capacitor electrode and a second capacitor electrode, and a plurality of capacitors connected in parallel are clamped between the first capacitor electrode and the second capacitor electrode; the first capacitor electrode and the second capacitor electrode have lead portions arranged in a stacked manner;
the upper lead-out part of the first capacitor electrode is provided with a protruding first capacitor electrode connecting end; the second capacitor electrode lead-out part is provided with a protruding second capacitor electrode connecting end;
the power module comprises a bottom plate, more than two power units arranged on the bottom plate, output electrodes corresponding to the power units and two input bus busbars; the two input bus bars comprise a first input bus bar and a second input bus bar;
the power unit comprises a substrate, a circuit copper layer and a power chip set, wherein the circuit copper layer is formed on the substrate, and the power chip set is arranged on the circuit copper layer; the circuit copper layer comprises a first input conductive layer, a second input conductive layer and an output conductive layer; the power chip set comprises a first bridge arm power chip set and a second bridge arm power chip set;
the first input bus bar and the second input bus bar are arranged in a stacked mode;
the first input bus bar comprises a first bus bar external connection part, a first bus bar main body part and a first bus bar internal connection part; the first busbar interconnection part is directly or indirectly connected to the first input conductive layer of each power unit;
the second input bus bar comprises a second bus bar external connection part, a second bus bar main body part and a second bus bar internal connection part; the second busbar interconnection part is directly or indirectly connected to the second input conductive layer of each power unit;
the first capacitor electrode connecting end is electrically connected with a first bus bar external connection end of the first input bus bar; the second capacitance electrode connecting end is electrically connected with a second busbar external connection end of the second input bus busbar.
2. The power module with the power bus as claimed in claim 1, wherein the number of the first bus bar external connections on the first input bus bar is more than 2; the number of the second bus external connecting parts on the second input bus bar is more than 2.
3. The power module with the power bus as claimed in claim 2, wherein the number of the first bus bar external connectors is the same as that of the second bus bar external connectors, and corresponds to that of the power units.
4. The power module with the power bus as claimed in claim 3, wherein the second bus bar external connection portion of the second input bus bar and the first bus bar external connection portion of the first input bus bar are disposed at an interval.
5. The power module with the power bus as claimed in claim 1, wherein the first bus bar external connection portion of the first input bus bar, the second bus bar external connection portion of the second input bus bar and the output external connection portion of the output electrode are provided with external connection holes.
6. The power module with the power bus as claimed in claim 1, wherein the first input bus bar and the second input bus bar are each zigzag-shaped.
7. The power module with a power bus of claim 1, wherein the output electrode comprises an output interconnector, an output body portion and an output interconnector, the output body portion being disposed between the output interconnector and the output interconnector; the output electrode is Z-shaped.
8. The power module with the power bus of claim 1, wherein the power module further comprises an insulating frame, and the first input bus bar, the second input bus bar and the output electrode are fixed in the insulating frame.
CN201920266439.7U 2019-03-01 2019-03-01 Power module with power bus Active CN210129513U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109887908A (en) * 2019-03-01 2019-06-14 深圳市慧成功率电子有限公司 A kind of power modules with power bus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109887908A (en) * 2019-03-01 2019-06-14 深圳市慧成功率电子有限公司 A kind of power modules with power bus

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