CN210110750U - 一种半导体桥开口封装结构 - Google Patents
一种半导体桥开口封装结构 Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
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Abstract
本实用新型提供了一种半导体桥开口封装结构,涉及半导体封装领域。一种半导体桥开口封装结构包括半导体桥芯片,引线,塑封材料,粘合剂,第一焊盘和第二焊盘。所述半导体桥芯片通过粘合剂粘接在第一焊盘上表面。半导体桥芯片上层包含金属电极和桥区。金属电极通过引线与第二焊盘连接获取电信号,其上表面的焊点远离桥区。塑封材料将半导体桥芯片的部分区域,引线,第一焊盘和第二焊盘封装在一起,使桥区裸露而焊点和引线被完全封装。本实用新型的封装结构解决了半导体桥引线保护的问题,同时可保证反应桥区外露。封装之后的半导体桥芯片可作为一个表贴元器件,使用方便。
Description
技术领域
本实用新型属于半导体封装领域,具体涉及一种半导体桥开口封装结构。
背景技术
半导体桥芯片是采用微电子制造技术开发的一种换能元器件,具有低发火能量,高安全性,高瞬发度以及抗静电和电磁干扰的特点,广泛应用于军用和民用领域,包括工业雷管,汽车安全气囊和预紧张器等等。在传统的封装结构中,半导体桥芯片的引线容易在点火爆炸过程中松动甚至断开,严重影响半导体桥芯片的性能,因此,有必要研发一种新的半导体桥封装结构,保护芯片引线的同时不影响半导体桥芯片的性能。
实用新型内容
针对以上现有的问题和需求,本实用新型提出一种半导体桥开口封装结构,该结构解决了半导体桥引线保护的问题,同时可保证反应桥区外露。封装之后的半导体桥芯片可作为一个表贴元器件,使用方便。
本实用新型解决其技术问题所采用的技术方案是:
一种半导体桥开口封装结构,包括:半导体桥芯片,引线,塑封材料,粘合剂,第一焊盘和第二焊盘。所述半导体桥芯片通过粘合剂粘接在第一焊盘上表面。半导体桥芯片上层包含金属电极和桥区。所述金属电极与第二焊盘通过引线连接,获取电信号。所述塑封材料将半导体桥芯片的部分区域,引线,第一焊盘和第二焊盘封装在一起
上述的一种半导体桥开口封装结构,所述金属电极位于所述桥区两侧,其上表面的焊点也位于桥区两侧,且远离所述桥区。
上述的一种半导体桥开口封装结构,所述半导体桥芯片的桥区形状包括但不仅限于“H”形和“V”形。
上述的一种半导体桥开口封装结构,所述半导体桥芯片的几何中心位置与所述第一焊盘的几何中心位置重合。
上述的一种半导体桥开口封装结构,所述第二焊盘位于远离所述桥区,且靠近所述焊点的一侧。
上述的一种半导体桥开口封装结构,所述第一焊盘的下表面和第二焊盘的上下表面有电镀区域,便于焊接引线和后续的工艺。
上述的一种半导体桥开口封装结构,所述的全部焊盘均不直接接触,通过所述塑封材料连接在一起。
上述的一种半导体桥开口封装结构,所述半导体桥芯片被封装的部分区域包含所述焊点,不包含所述桥区。
本实用新型的有益效果是,本实用新型实施例中一种半导体桥开口封装结构,重新设计了半导体桥芯片的金属电极上表面的焊点位置,通过引线连接半导体桥芯片的金属电极与焊板获取电信号,采用塑封材料将半导体桥芯片的部分区域,焊板和引线封装起来,使半导体桥芯片的桥区裸露而焊点和引线被完全封装。所述开口封装结构解决了半导体桥引线保护的问题,同时可保证桥区外露参与后续反应。封装之后的半导体桥芯片可作为一个表贴元器件,使用方便。
附图说明
下面结合附图和实施例对本实用新型进一步说明。
图1为本实用新型的一种半导体桥开口封装结构的一个实施例在未封装时的俯视图;
图2为本实用新型的一种半导体桥开口封装结构的一个实施例沿图1中AA’线的剖面图;
图3为本实用新型的一种半导体桥开口封装结构的一个实施例的俯视图。
图中 1.半导体桥芯片,11.金属电极,12.桥区,13.焊点,2.引线,3.塑封材料,4.粘合剂,5.第一焊盘,6.第二焊盘。
具体实施方式
本实施例提供的一种半导体桥开口封装结构如图1和图2所示,包括:半导体桥芯片(1),引线(2),塑封材料(3),粘合剂(4),第一焊盘(5)和第二焊盘(6)。所述半导体桥芯片(1)通过粘合剂(4)粘接在第一焊盘(5)上表面,且半导体桥芯片(1)与第一焊盘(5)中心位置重合。所述半导体桥芯片(1)上层包含金属电极(11)和桥区(12)。金属电极(11)与第二焊盘(6)通过引线(2)连接,获取电信号。所述的全部焊盘不直接接触,塑封材料(3)将半导体桥芯片(1)的部分区域,引线(2),第一焊盘(5)和第二焊盘(6)封装在一起,其中,半导体桥芯片(1)的焊点(13)及其附近区域被完全封装,桥区(12)裸露在外,参与后续反应。
在本实施例中,桥区(12)呈“H”形,金属电极(11)分别位于桥区(12)的两侧,其上表面的焊点(13)也在桥区(12)两侧且远离桥区。第一焊盘(5)的下表面和第二焊盘(6)的上下表面都有电镀区域,便于焊接引线(2)和后续的工艺。第二焊盘(6)位于靠近焊点(13)且远离桥区(12)的一侧,如图3所示。
Claims (8)
1.一种半导体桥开口封装结构,其特征在于,包括:半导体桥芯片(1),引线(2),塑封材料(3),粘合剂(4),第一焊盘(5)和第二焊盘(6),所述半导体桥芯片(1)通过粘合剂(4)粘接在第一焊盘(5)上表面,半导体桥芯片(1)上层包含金属电极(11)、桥区(12)和焊点(13),所述金属电极(11)与第二焊盘(6)通过引线(2)连接,获取电信号,所述塑封材料(3)将半导体桥芯片(1)的部分区域,引线(2),第一焊盘(5)和第二焊盘(6)封装在一起。
2.根据权利要求1所述的一种半导体桥开口封装结构,其特征在于,所述金属电极(11)位于所述桥区(12)两侧,其上表面的焊点(13)也位于桥区(12)两侧,且远离所述桥区(12)。
3.根据权利要求1所述的一种半导体桥开口封装结构,其特征在于,所述桥区(12)形状包括但不仅限于“H”形和“V”形。
4.根据权利要求1所述的一种半导体桥开口封装结构,其特征在于,所述半导体桥芯片(1)的几何中心位置与所述第一焊盘(5)的几何中心位置重合。
5.根据权利要求1所述的一种半导体桥开口封装结构,其特征在于,所述第二焊盘(6)位于远离所述桥区(12),且靠近所述焊点(13)的一侧。
6.根据权利要求1所述的一种半导体桥开口封装结构,其特征在于,所述第一焊盘(5)的下表面和第二焊盘(6)的上下表面有电镀区域,便于焊接引线(2)和后续的工艺。
7.根据权利要求1所述的一种半导体桥开口封装结构,其特征在于,所述的第一焊盘(5)和第二焊盘(6)不直接接触,通过所述塑封材料(3)连接在一起。
8.根据权利要求1所述的一种半导体桥开口封装结构,其特征在于,所述半导体桥芯片(1)被封装的部分区域包含所述焊点(13),不包含所述桥区(12)。
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Effective date of registration: 20220908 Address after: Room 1701, North Wing, Block B, New Zhongguancun Building, No. 19 Zhongguancun Street, Haidian District, Beijing 100190 Patentee after: BEIJING ZHIXIN SENSING TECHNOLOGY Co.,Ltd. Address before: Room 119-84, 1st Floor, Block B, Building 1, No. 9, Dazhongsi East Road, Haidian District, Beijing 100086 Patentee before: Beijing Zuzhi Technology Co.,Ltd. |