CN210073863U - Enhanced type heterogeneous metal gate AlGaN/GaN MOS-HEMT device - Google Patents
Enhanced type heterogeneous metal gate AlGaN/GaN MOS-HEMT device Download PDFInfo
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Abstract
The utility model discloses an enhancement mode heterogeneous metal gate AlGaN/GaN MOS-HEMT device, include: at Al2O3An AlN transition layer over the substrate; a multilayer buffer structure located above the AlN transition layer; an AlGaN barrier layer located on the multilayer buffer structure; a GaN cap layer located above the AlGaN barrier layer; the source electrode and the drain electrode are positioned on the first GaN layer and upwards penetrate through the AlGaN barrier layer and the GaN cap layer; the grid oxide layer is positioned above the GaN cap layer, the source electrode and the drain electrode; a heterogeneous gate structure located over the gate oxide layer. The utility model discloses can improve channel drive current, can carry out nimble adjustment, can prevent the worsening of channel carrier mobility to threshold voltage.
Description
Technical Field
The utility model belongs to the technical field of AlGaN/GaN HEMT device, concretely relates to enhancement mode heterogeneous metal gate AlGaN/GaN MOS-HEMT device.
Background
Conventional semiconductor materials, represented by silicon (Si) and gallium arsenide (GaAs), have become unable to meet the development of modern electronic technology due to the requirements of radiation resistance, high temperature, high voltage and high power. The wide bandgap semiconductor GaN electronic device can be applied to high temperature, high pressure, high frequency and severe environments, such as radar, base station of wireless communication and satellite communication. GaN is favored in high frequency, high power, high temperature electronic devices because of its large forbidden band width, high breakdown voltage, high electron saturation drift velocity, excellent electrical and optical properties, and good chemical stability. The widespread use of GaN devices promises the advent of the era of optoelectronic and even photonic information. Microelectronic devices are now expanding exponentially, and GaN devices are now used quite widely in military and civilian applications.
With the continuous maturation of AlGaN/GaN single heterojunction growth process and mechanism research, the performance of AlGaN/GaN HEMT devices as the main structure of GaN-based HEMTs has been improved. The mechanisms that have been driven by AlGaN/GaN HEMTs from 1993 to the end of the last century have been mainly the enhancement of heterojunction performance, the gradual evolution and improvement of process technologies (such as mesa etching, schottky contact, and ohmic contact), and the continuous maturation of thermal processing technologies. From 2000 to the present, the properties of AlGaN/GaN heterojunction materials tend to be basically stable, and the performance of AlGaN/GaN HEMTs is improved mainly by the improvement of the process level and the improvement of the device structure. From the viewpoint of device design and application, the conventional GaN-based HEMT is a depletion type (normally-open type), but power electronic devices are preferably of an enhancement type (normally-closed type), because the difficulty of integrated circuit design can be greatly reduced by offsetting a negative power supply.
Although much effort has been made in the industry to improve the device structure of the enhancement-mode AlGaN/GaN HEMT, the enhancement-mode AlGaN/GaN HEMT has poor performance in practical applications and conventional AlGaN/GaN HEMTs have inherent technical drawbacks. For example, a conventional concave grid HEMT device is difficult to manufacture, poor in process repeatability and poor in uniformity of threshold voltage; the use of fluorine ion implantation or plasma treatment generally causes damage and generates defects in the semiconductor material, thereby reducing carrier mobility and the like.
SUMMERY OF THE UTILITY MODEL
To the not enough that exists among the prior art, the utility model provides a can improve channel drive current, can carry out nimble adjustment, can prevent the enhancement mode heterogeneous metal gate AlGaN/GaN MOS-HEMT device of channel carrier mobility's deterioration to threshold voltage.
An enhanced hetero-metal gate AlGaN/GaN MOS-HEMT device, comprising:
at Al2O3An AlN transition layer over the substrate;
the multilayer buffer structure is positioned on the AlN transition layer, and the uppermost layer of the multilayer buffer structure is a first GaN layer;
the AlGaN barrier layer is positioned on the first GaN layer, and the thickness of the AlGaN barrier layer is 5 nm-10 nm;
a GaN cap layer located above the AlGaN barrier layer;
the source electrode and the drain electrode are positioned on the first GaN layer and upwards penetrate through the AlGaN barrier layer and the GaN cap layer;
the grid oxide layer is positioned above the GaN cap layer, the source electrode and the drain electrode;
and the heterogeneous grid structure is positioned on the grid oxide layer and comprises two metal grids which are mutually contacted and arranged in parallel and have different work functions.
Further, the multi-layer buffer structure includes:
a GaN buffer layer located above the AlN transition layer;
a low temperature GaN buffer layer located over the GaN buffer layer;
the first GaN layer is located above the low-temperature GaN buffer layer.
Further, the top ends of the source electrode and the drain electrode are higher than the GaN cap layer.
Compared with the prior art, the utility model discloses following beneficial effect has:
1. the AlGaN barrier layer with the thickness far smaller than the critical thickness of AlGaN is arranged, so that the capability of limiting the 2DEG is improved, and the area density and the channel driving current of the 2DEG are improved;
2. by designing a GaN cap layer below the grid oxide layer on the AlGaN barrier layer, the physical distance between the surface of the device and the 2DEG is increased, the interface scattering is reduced, the deterioration of the roughness scattering of the surface of the device on the mobility of a channel carrier is avoided, and the grid leakage current can be further reduced;
3. by arranging the heterogeneous grid structure consisting of two metal grids which are mutually contacted and arranged in parallel and have different work functions, the intrinsic technical defects of the conventional concave grid AlGaN/GaN HEMT can be overcome, the manufacturing process flow of the device is simplified, and the electrical characteristics of the device are improved; different channel potential distributions can be introduced into a 2DEG channel close to an AlGaN/GaN heterojunction interface by flexibly designing the work function difference between the work functions of the two metals and the work function difference of the GaN cap layer and the channel lengths corresponding to the two metal gates, so that the threshold voltage of the device can be adjusted;
4. the multilayer buffer structure consisting of the high-temperature GaN buffer layer, the low-temperature GaN buffer layer and the constant-temperature GaN layer (the first GaN layer) is arranged on the substrate, so that the defect density of the surface of the multilayer buffer structure is greatly reduced compared with the traditional GaN substrate grown on sapphire or silicon carbide (SiC), and the reliability of a device can be effectively improved;
5. the source electrode and the drain electrode are protruded out of the surface of the device to form a surrounding electrode, so that the threshold voltage of the device can be adjusted; the junction capacitance of the source and drain regions is also reduced without reducing the preferred value.
6. By using the MOS structure, the structure is compatible with the mainstream compound semiconductor process and the CMOS process, and the structure is simple; compared with the traditional GaN HEMT device, the material layer number is reduced, the substrate quality is better, the process repeatability is high, and the large-scale manufacturing is easy.
Drawings
Fig. 1 is a schematic structural diagram of a device according to the present invention after a first step of a manufacturing method;
FIG. 2 is a schematic structural diagram of a device according to the present invention after the second step of the manufacturing method;
fig. 3 is a schematic structural diagram of the device of the present invention after the third step of the manufacturing method;
fig. 4 is a schematic structural diagram of the device of the present invention after the fourth step of the manufacturing method;
fig. 5 is a schematic structural diagram of the device of the present invention after the fifth step of the manufacturing method;
fig. 6 is a schematic structural diagram of the device of the present invention after the sixth step of the manufacturing method;
fig. 7 is a schematic structural diagram of the device of the present invention after the seventh step of the manufacturing method;
fig. 8 is a schematic structural diagram of the device of the present invention after step eight of the manufacturing method;
fig. 9 is a schematic structural diagram of the device of the present invention after the ninth step of the manufacturing method;
fig. 10 is a schematic structural view of the device of the present invention;
wherein, 1-Al2O3The GaN-based light-emitting diode comprises a substrate, a 2-AlN transition layer, a 3-multilayer buffer structure, a 31-GaN buffer layer, a 32-low-temperature GaN buffer layer, a 33-first GaN layer, a 4-AlGaN barrier layer, a 5-GaN cap layer, a 6-grid oxide layer, a 71-first grid metal layer, a 72-second grid metal layer and 8-photoresist.
Detailed Description
In order to make the technical means, creation features, achievement purposes and functions of the utility model easy to understand and understand, the utility model is further explained by combining with the specific figures.
An enhanced hetero-metal gate AlGaN/GaN MOS-HEMT device, as shown in FIG. 10, comprising:
at Al2O3An AlN transition layer 2 over the substrate 1;
the multilayer buffer structure 3 is positioned on the AlN transition layer 2, and the uppermost layer of the multilayer buffer structure 3 is a first GaN layer 33;
an AlGaN barrier layer 4 located on the first GaN layer 33, wherein the thickness of the AlGaN barrier layer 4 is 5-10 nm;
a GaN cap layer 5 located on the AlGaN barrier layer 4;
a source and a drain located above the first GaN layer 33 and passing upward through the AlGaN barrier layer 4 and the GaN cap layer 5;
a grid oxide layer 6 positioned on the GaN cap layer 5, the source electrode and the drain electrode;
and the heterogeneous grid structure is positioned on the grid oxide layer 6 and comprises two metal grids which are mutually contacted and arranged in parallel and have different work functions.
The composition of Al in the AlGaN barrier layer can be 0.2-0.3, and the thickness of the AlGaN barrier layer is preferably 5 nm. The thickness of the GaN cap layer can be 1-2 nm. The ohmic contact of the source electrode and the drain electrode can be titanium, aluminum, nickel and gold, and the typical deposition or etching thicknesses of the four metals can be respectively 30nm, 180nm, 40nm and 100 nm. The multilayer buffer structure is characterized in that the buffer layer is at least two layers. The two metal gates with different work functions are the first gate metal layer and the second gate metal layer in the figure. The utility model provides a heterogeneous grid structure is actually not only limited to the different metal grid of two kinds of work functions, and three kinds or above set up side by side also.
First, the AlGaN barrier layer has a thickness much less than the critical thickness of AlGaN, which can better form a two-dimensional electron gas (2DEG) near the GaN surface at the AlGaN/GaN heterojunction interface. According to the scheme, the thin AlGaN barrier layer is utilized, the capability of limiting the 2DEG is improved, and the surface density and the channel driving current of the 2DEG are improved. Secondly, because the 2DEG at the AlGaN/GaN heterojunction interface is very close to the surface of GaN and the AlGaN barrier layer is very thin, the 2DEG is easily influenced by the scattering effect of the interface state and the surface roughness of the upper surface of the AlGaN close to the grid, the carrier mobility of the 2DEG is greatly reduced under the low-temperature condition, and the electrical performance of the device is adversely influenced; therefore, a GaN cap layer is designed on the AlGaN barrier layer, the physical distance between the surface of the device and the 2DEG is increased, and interface scattering is reduced. In addition, the cap layer can further reduce the gate leakage current. Thirdly, the heterogeneous grid structure consisting of two metal grids which are mutually contacted and arranged in parallel and have different work functions is arranged, so that the inherent technical defects of the conventional concave grid AlGaN/GaN HEMT can be overcome, the manufacturing process flow of the device is simplified, the electrical characteristics of the device are improved, different channel potential distributions can be introduced into the 2DEG channel close to the AlGaN/GaN heterojunction interface by flexibly designing the work function difference between the work functions of the two metals and the GaN cap layer and the channel lengths corresponding to the two metal grids, and the threshold voltage of the device is further adjusted. The selection of heterogeneous gate metal and the channel length ratio have multiple possibilities, and the design freedom of devices and circuits can be improved.
As an optimized solution, the multilayer buffer structure includes:
a GaN buffer layer 31 on the AlN transition layer 2;
a low-temperature GaN buffer layer 32 on the GaN buffer layer 31;
the first GaN layer 33 on the low temperature GaN buffer layer 32.
According to the scheme, a Metal Organic Chemical Vapor Deposition (MOCVD) method is adopted, the growth temperature of the GaN buffer layer can be 600-800 ℃, the growth temperature of the low-temperature GaN buffer layer can be 300-400 ℃, and the growth temperature of the first GaN layer can be constant at 700 ℃.
This scheme is described in Al2O3The method comprises the steps of firstly growing a high-temperature GaN buffer layer on a substrate, then continuing to grow a low-temperature GaN buffer layer on the GaN buffer layer, and finally growing a GaN layer under a constant temperature condition, wherein the GaN layer is used as an actual substrate of the AlGaN/GaN HEMT, the defect density of the surface of the GaN layer is greatly reduced compared with that of the GaN substrate grown on sapphire or silicon carbide (SiC), and the reliability of the device can be effectively improved.
Preferably, the top ends of the source electrode and the drain electrode are higher than the GaN cap layer 5.
The source electrode and the drain electrode in the scheme protrude out of the surface of the device to form a surrounding electrode, so that the threshold voltage of the device can be adjusted. Firstly, the source and drain metal is in the same plane with the GaN cap layer during preparation, and the source and drain electrodes protrude from the GaN cap layer because the GaN cap layer needs to be etched and thinned in the process, and the preferable value of the source and drain metal is not required to be reduced. And secondly, the thickness of the source and drain electrode metal is equal to the sum of the convex part and the metal embedded in the device, so that the optimal value is not reduced, and the junction capacitance of the source and drain electrode region is reduced.
The utility model discloses in an enhancement mode heterogeneous metal gate AlGaN/GaN MOS-HEMT device, its preparation method is shown in fig. 1-10, can include following step:
the method comprises the following steps: in the cleaned Al2O3Nitriding the upper surface of the substrate 1 to form an AlN transition layer 2;
depositing and growing a GaN buffer layer 31 on the AlN transition layer 2, wherein the growth temperature is 600-800 ℃;
depositing and growing a low-temperature GaN buffer layer 32 on the GaN buffer layer 31, wherein the growth temperature is 300-400 ℃;
depositing and growing a first GaN layer 33 on the low-temperature GaN buffer layer 32, wherein the growth temperature is constant at 700 ℃;
growing an AlGaN barrier layer 4 of 5nm on the first GaN layer 33;
growing a GaN cap layer 5 with the thickness of 20nm on the AlGaN barrier layer 4;
step two: a positive photoresist 8 is coated on the GaN cap layer 5 in a spinning mode, and the source electrode and the drain electrode are exposed through photoetching (a channel region is defined);
step three: forming holes for preparing a source electrode and a drain electrode by etching to the first GaN layer 33;
step four: performing metal deposition at the hole position to obtain a metalized source electrode and a metalized grid electrode, and forming ohmic contact; after removing the photoresist 8 and redundant metal in the gate region, etching the GaN cap layer 5 to 1-2 nm;
step five: carrying out high-temperature annealing treatment in a nitrogen atmosphere; depositing and growing a silicon dioxide layer at room temperature to serve as a grid oxide layer 6;
step six: a positive photoresist 8 is coated on the grid oxide layer in a spinning mode, and a grid region (a grid active region) is exposed through photoetching;
step seven: depositing and growing a first gate metal layer 71 (the gate metal is usually preferably titanium or gold), covering a positive photoresist 8 on the first gate metal layer 71 to serve as a protective layer, exposing a preset second gate metal region through photoetching, and removing the first gate metal layer 71 in the second gate metal region through etching;
step eight: depositing and growing a second grid metal layer 72 with the same thickness as the first grid metal layer 71 on the surface of the device, completely etching the redundant parts of the two metals and the residual photoresist 8, and carrying out chemical mechanical polishing to ensure that the two metal grid planes are arranged to form a heterogeneous grid structure;
step nine: coating positive photoresist 8 on the periphery of the heterogeneous grid structure, and etching off grid oxide layers 6 on two sides of the heterogeneous grid structure;
step ten: and removing the photoresist 8 at the periphery of the heterogeneous grid structure to expose the metal grid.
Cleaning Al by chemical cleaning in the step one2O3Removing excessive oxide from the substrate, drying, cleaving, cleaning with hydrogen plasma, adding nitrogen plasma into the reaction chamber, and treating Al2O3And nitriding the surface of the substrate to form an AlN transition layer. A thicker intrinsic GaN buffer layer with the thickness of about 2 mu m is generated on the transition layer by utilizing a Metal Organic Chemical Vapor Deposition (MOCVD) method, and the growth temperature is controlled to be 600-800 ℃; then continuing to grow a second intrinsic GaN buffer layer at a low temperature, wherein the thickness is about 1 mu m, and the growth temperature is controlled to be 300-400 ℃; and finally, growing a GaN substrate with the thickness of about 2 mu m at the constant temperature of 700 ℃, and growing an AlGaN thin layer serving as a barrier layer on the GaN substrate, wherein the thickness of the AlGaN thin layer can be 5-10 nm.
The depth of the etching in the third step is determined by the metal material selected for the ohmic contact. The ohmic contact of the source electrode and the drain electrode can be titanium, aluminum, nickel and gold, and the typical deposition or etching thicknesses of the four metals are respectively 30nm, 180nm, 40nm and 100 nm; for example, if aluminum is used for the source and the drain, the etching depth of the source and drain regions is 180 nm.
The annealing temperature in the fifth step may be 800 deg.c and the annealing time may be 30 seconds. The silicon dioxide layer is deposited and grown at room temperature and is used as a grid oxide layer, and a plasma enhanced chemical vapor deposition technology can be adopted. The refractive index of the layer of silicon dioxide reaches 1.5, and the thickness is 10 nm. Since the refractive index of ordinary silicon dioxide is generally between 1.1 and 1.2, and the refractive index is related to uniformity, the refractive index required to reach 1.5 in the scheme can enable the silicon dioxide film to have higher uniformity and density and smaller interface state.
The protection layer is provided in the seventh step to ensure that the part of the first gate metal layer to be remained is not influenced by the process when the second gate metal layer is deposited. According to the designed channel length corresponding to the second gate metal layer, a corresponding length L2 is etched away from the first gate metal layer, and the length of the remaining first metal gate is L1. If the channel length between the source and the drain is L, L1+ L2 is L.
In the ninth step, the etching can be performed by wet etching of the gate oxide layer on both sides of the heterogeneous gate structure by using a hydrogen fluoride solution, or by plasma etching by using argon plasma.
For example, if titanium (Ti) is selected as the first gate metal layer, gold (Au) may be selected as the second gate metal layer, where the work function of titanium is 4.33eV and the work function of gold is 5.1eV, which have a significant difference.
The utility model adopts the MOS structure, is compatible with the mainstream compound semiconductor process and the CMOS process, and has simple structure; compared with the traditional GaN HEMT device, the material layer number is reduced, the substrate quality is better, the process repeatability is high, and the large-scale manufacturing is easy.
Above only do the preferred embodiment of the present invention, the protection scope of the present invention is not limited to the above embodiment, all belong to the technical scheme of the present invention all belong to the protection scope of the present invention. For those skilled in the art, several modifications can be made without departing from the principle of the present invention, and such modifications should also be considered as the protection scope of the present invention.
Claims (3)
1. An enhancement mode heterogeneous metal gate AlGaN/GaN MOS-HEMT device, comprising:
at Al2O3An AlN transition layer over the substrate;
the multilayer buffer structure is positioned on the AlN transition layer, and the uppermost layer of the multilayer buffer structure is a first GaN layer;
the AlGaN barrier layer is positioned on the first GaN layer, and the thickness of the AlGaN barrier layer is 5 nm-10 nm;
a GaN cap layer located above the AlGaN barrier layer;
the source electrode and the drain electrode are positioned on the first GaN layer and upwards penetrate through the AlGaN barrier layer and the GaN cap layer;
the grid oxide layer is positioned above the GaN cap layer, the source electrode and the drain electrode;
and the heterogeneous grid structure is positioned on the grid oxide layer and comprises two metal grids which are mutually contacted and arranged in parallel and have different work functions.
2. The enhanced hetero-metal gate AlGaN/GaN MOS-HEMT device according to claim 1, wherein the multilayer buffer structure comprises:
a GaN buffer layer located above the AlN transition layer;
a low temperature GaN buffer layer located over the GaN buffer layer;
the first GaN layer is located above the low-temperature GaN buffer layer.
3. The enhanced hetero-metal gate AlGaN/GaN MOS-HEMT device according to claim 1, wherein:
the top ends of the source electrode and the drain electrode are higher than the GaN cap layer.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110634946A (en) * | 2019-10-28 | 2019-12-31 | 中证博芯（重庆）半导体有限公司 | Enhanced type heterogeneous metal gate AlGaN/GaN MOS-HEMT device and preparation method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110634946A (en) * | 2019-10-28 | 2019-12-31 | 中证博芯（重庆）半导体有限公司 | Enhanced type heterogeneous metal gate AlGaN/GaN MOS-HEMT device and preparation method thereof |
| CN110634946B (en) * | 2019-10-28 | 2023-04-28 | 中证博芯（重庆）半导体有限公司 | Enhanced heterogeneous metal gate AlGaN/GaN MOS-HEMT device and preparation method thereof |
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Effective date of registration: 20200611 Address after: 401573 No. 500 Jiahe Avenue, Caojie Street, Information Security Industry City, Hechuan District, Chongqing Patentee after: Zhonghe Boxin (Chongqing) Semiconductor Co.,Ltd. Address before: 401520 No. 500, Jiahe Avenue, Caojie street, Hechuan District, Chongqing Patentee before: ZHONGZHENG BOXIN (CHONGQING) SEMICONDUCTOR Co.,Ltd. |
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