CN209822644U - Wafer-level packaging structure of image sensor - Google Patents
Wafer-level packaging structure of image sensor Download PDFInfo
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- CN209822644U CN209822644U CN201921045668.2U CN201921045668U CN209822644U CN 209822644 U CN209822644 U CN 209822644U CN 201921045668 U CN201921045668 U CN 201921045668U CN 209822644 U CN209822644 U CN 209822644U
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Abstract
The utility model discloses an image sensor wafer level packaging structure belongs to integrated circuit packaging technology field. The image sensor wafer-level packaging structure comprises an image sensor wafer and a transparent medium layer bonded with the image sensor wafer; the image sensor wafer comprises a silicon substrate, and a metal welding pad and an image sensor micro-lens which are formed on the silicon substrate; the wafer photosensitive surface of the image sensor is coated with a low-refractive-index dielectric layer in a spinning mode. The image sensor wafer is bonded with the transparent medium layer through the low-refractive-index medium layer. The utility model solves the problems of light transmittance and packaging thickness well through a low-refractive-index dielectric layer and a high-light-transmittance transparent dielectric layer; and the packaging process is simple, the cost is low, the packaging efficiency and the yield are high, and the packaging method is suitable for large-scale mass production.
Description
Technical Field
The utility model relates to an integrated circuit packaging technology field, in particular to image sensor wafer level packaging structure.
Background
With the continuous improvement of the wafer flow process level of the image device, the pixel points of a single chip are gradually increased. In an image sensor chip, the area of a pixel point is called as a photosensitive area, the specific gravity of the photosensitive area occupying the area of the chip is higher and higher along with the improvement of the performance requirement of a device, and the traditional packaging mode with cofferdams is more and more difficult to pass the reliability authentication. In addition, with the development of miniaturization of devices, the thickness of the package body becomes thinner and thinner, and the traditional image sensor packaging mode is difficult to develop towards miniaturization.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide an image sensor wafer level packaging structure to it is difficult to the problem of miniaturization development again to solve traditional image sensor packaging mode.
In order to solve the above technical problem, the utility model provides an image sensor wafer level packaging structure, include:
the image sensor wafer comprises a silicon substrate, and a metal welding pad and an image sensor micro-lens which are formed on the silicon substrate; the photosensitive surface of the image sensor wafer is coated with a low-refractive-index medium layer in a spinning mode;
a transparent dielectric layer bonded to the low refractive index dielectric layer;
a TSV through hole is formed in the back surface of the silicon substrate, and a passivation and metal circuit layer is formed on the TSV through hole and the back surface of the silicon substrate;
and solder masks are manufactured on five surfaces of the image sensor wafer-level packaging structure except the transparent medium layer.
Optionally, an opening is formed in the solder mask layer, and a bump or a printed solder ball is fabricated in the opening.
Optionally, the TSV through hole is an inclined hole or a second-order inclined hole with an angle of 50 degrees ~ 70 degrees.
Optionally, the TSV through hole is a straight hole with an angle of 90 °.
Optionally, the solder mask is manufactured by a spin coating or screen printing glue process, and the solder mask is made of a black resin material added with graphite carbon powder, and the thickness of the solder mask exceeds 1 μm.
Optionally, the light transmittance of the transparent dielectric layer exceeds 99%, and the spin coating thickness of the transparent dielectric layer exceeds 1 μm.
Optionally, the spin coating thickness of the low-refractive-index dielectric layer is 0.1 to 5 μm, and the refractive index of the low-refractive-index dielectric layer is 1.0 ~ 1.5.5.
The utility model provides an image sensor wafer level packaging structure, which comprises an image sensor wafer and a transparent medium layer bonded with the image sensor wafer; the image sensor wafer comprises a silicon substrate, and a metal welding pad and an image sensor micro-lens which are formed on the silicon substrate; the wafer photosensitive surface of the image sensor is coated with a low-refractive-index dielectric layer in a spinning mode. The image sensor wafer is bonded with the transparent medium layer through the low-refractive-index medium layer. The utility model solves the problems of light transmittance and packaging thickness well through a low-refractive-index dielectric layer and a high-light-transmittance transparent dielectric layer; and the packaging process is simple, the cost is low, the packaging efficiency and the yield are high, and the packaging method is suitable for large-scale mass production.
Drawings
Fig. 1 is a schematic view of a wafer level package structure of an image sensor according to the present invention;
FIG. 2 is a schematic structural diagram of spin coating a laser-decomposable layer and a transparent dielectric layer on a glass carrier;
FIG. 3 is a schematic diagram of a structure for forming metal pads and image sensor microlenses on a silicon substrate;
FIG. 4 is a schematic illustration of spin coating a low index dielectric layer on an image sensor wafer;
FIG. 5 is a schematic view of a bonded glass carrier and image sensor wafer;
FIG. 6 is a schematic diagram of a TSV through hole formed in the backside of an image sensor wafer;
FIG. 7 is a schematic illustration of fabricating passivation and metal line layers;
FIG. 8 is a schematic diagram of a wafer of image sensors being diced;
fig. 9 is a schematic diagram after a solder resist layer is formed.
Detailed Description
The present invention provides an image sensor wafer level package structure, which is described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more fully apparent from the following description and appended claims. It should be noted that the drawings are in simplified form and are not to precise scale, and are provided for convenience and clarity in order to facilitate the description of the embodiments of the present invention.
Example one
The utility model provides an image sensor wafer level packaging structure, its structure is shown in figure 1 image sensor wafer level packaging structure include the image sensor wafer and with the transparent dielectric layer 103 of image sensor wafer bonding, it is specific, the image sensor wafer include silicon substrate 201 with metal bonding pad 203 and the image sensor microlens 204 that form on the silicon substrate 201, the photosensitive surface spin coating of image sensor wafer has low refracting index dielectric layer 202, the spin coating thickness of low refracting index dielectric layer 202 is 0.1-5 mu m, the refracting index of low refracting index dielectric layer 202 is 1.0 ~ 1.5.5 the image sensor wafer passes through low refracting index dielectric layer 202 with transparent dielectric layer 103 bonds together, wherein, the luminousness of transparent dielectric layer 103 exceeds 99%, and its spin coating thickness exceeds 1 mu m.
Specifically, with reference to fig. 1, a TSV through hole is formed in the back surface of the silicon substrate 201, wherein the TSV through hole is a slant hole or a second-order slant hole with an angle of 50 ° ~ 70 °, preferably a straight hole with an angle of 90 °, passivation and metal circuit layers 207 are formed on the TSV through hole and the back surface of the silicon substrate 201, solder masks 209 are formed on five surfaces of the image sensor wafer level package structure except the transparent dielectric layer 103, the solder masks 209 are formed by spin coating or silk screen printing, the solder masks 209 are black resin materials added with graphite carbon powder, the thickness of the solder masks 209 exceeds 1 μm, openings are formed in the solder masks 209, and bumps or solder balls 210 are formed in the openings.
The utility model discloses an introduce the transparent medium layer of low refracting index dielectric layer, high luminousness, transparent medium layer luminousness is more than 99%, and low refracting index dielectric layer refracting index is 1.0-1.5, increases the transmissivity of image sensor wafer photosurface to more than 99%, and total encapsulation thickness reduces more than 300 microns, has both improved the imaging quality but greatly reduced chip package size.
The utility model provides an image sensor wafer level packaging structure makes through following method:
firstly, providing a glass carrier plate 101, wherein a spin-on laser detachable layer 102 and a transparent dielectric layer 103 are sequentially arranged on the glass carrier plate 101, as shown in fig. 2, further, the thickness of the spin-on laser detachable layer 102 is 0.1 ~ 1 μm, the light transmittance of the transparent dielectric layer 103 exceeds 99%, and the spin-on thickness of the transparent dielectric layer 103 exceeds 1 μm, further, the laser detachable layer 102 can be automatically decomposed after being irradiated by laser with corresponding wavelength, in the first embodiment, the wavelength of the laser is 355nm, and the laser detachable layer 102 is automatically decomposed, so that the glass carrier plate 101 is separated from the transparent dielectric layer 103, and in addition, the transparent dielectric layer 103 also has bonding capability.
Providing a silicon substrate 201, and forming a metal pad 203 and an image sensor microlens 204 on the silicon substrate 201, thereby forming an image sensor wafer as shown in fig. 3, wherein a low-refractive-index dielectric layer 204 is spin-coated on a photosensitive surface of the image sensor wafer, as shown in fig. 4, preferably, the spin-coating thickness of the low-refractive-index dielectric layer 204 is 0.1-5 μm, and the refractive index of the low-refractive-index dielectric layer 204 is 1.0 ~ 1.5.5.
Referring to fig. 5, the glass carrier 101 spin-coated with the laser-decomposable layer 102 and the transparent dielectric layer 103 is bonded to the image sensor wafer spin-coated with the low refractive index dielectric layer 202. Then, the silicon substrate 201 is ground, dry etched, and the like to reduce the thickness of the image sensor wafer to a target thickness, and then a TSV through hole 205 is formed on the back side of the image sensor wafer by dry etching, where the TSV through hole 205 reaches the metal pad layer 203, as shown in fig. 6. The TSV through hole 205 can be an inclined hole with an angle of 50-70 degrees or a second-order inclined hole, and is preferably a straight hole with an angle of 90 degrees; the passivation and metal wiring layer 207 is completed by photolithography, electroplating, chemical plating, etc., and the scribe line 206 is formed by mechanical cutting, as shown in fig. 7.
Referring to fig. 8, the image sensor wafer is cut to the surface of the laser detachable layer 102 by using mechanical cutting and plasma cleaning methods, so that four sides are completely exposed; as shown in fig. 9, a spin coating or screen printing process is then used to fabricate the solder mask 209, and the light-shielding solder mask 209 is a black resin material added with graphite carbon powder and has a thickness exceeding 1 μm.
Opening the solder mask layer 9, and manufacturing a bump or printing solder ball 210; then, a specific waveband laser is used for irradiating the glass carrier plate 101, so that the laser detachable layer 102 is automatically detached, the glass carrier plate 101 is detached, the outer surface of the light-transmitting medium layer 103 is cleaned, and finally, a single packaged chip capable of being interconnected with the outside is formed by cutting, as shown in fig. 1.
The above description is only for the preferred embodiment of the present invention and is not intended to limit the scope of the present invention, and any modification and modification made by those skilled in the art according to the above disclosure are all within the scope of the claims.
Claims (7)
1. An image sensor wafer level package structure, comprising:
an image sensor wafer comprising a silicon substrate (201) and metal pads (203) and image sensor microlenses (204) formed on the silicon substrate (201); the photosensitive surface of the image sensor wafer is coated with a low-refractive-index medium layer (202) in a spinning mode;
a transparent dielectric layer (103) bonded to the low refractive index dielectric layer (202);
a TSV through hole is formed in the back surface of the silicon substrate (201), and a passivation and metal circuit layer (207) is formed on the TSV through hole and the back surface of the silicon substrate (201);
and solder masks (209) are manufactured on five surfaces of the image sensor wafer-level packaging structure except the transparent dielectric layer (103).
2. The wafer level package structure of claim 1, wherein the solder mask layer (209) has an opening formed thereon, and a bump or a printed solder ball (210) is formed in the opening.
3. The wafer-level package structure of claim 1, wherein the TSV via is a bevel or a second-order bevel with an angle of 50 ° ~ 70 °.
4. The wafer-level packaging structure of claim 3, wherein the TSV is a straight hole with an angle of 90 °.
5. The wafer level package structure of claim 1, wherein said solder mask layer (209) is made by spin coating or screen printing, and said solder mask layer (209) is a black resin material with graphite carbon powder added, and its thickness exceeds 1 μm.
6. The wafer level package structure of claim 1, wherein the transparent dielectric layer (103) has a light transmittance of more than 99% and a spin-on thickness of more than 1 μm.
7. The wafer level package structure of claim 1, wherein the spin-on thickness of the low-index dielectric layer (202) is 0.1-5 μm, and the refractive index of the low-index dielectric layer (202) is 1.0 ~ 1.5.5.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201921045668.2U CN209822644U (en) | 2019-07-05 | 2019-07-05 | Wafer-level packaging structure of image sensor |
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| CN201921045668.2U CN209822644U (en) | 2019-07-05 | 2019-07-05 | Wafer-level packaging structure of image sensor |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110349986A (en) * | 2019-07-05 | 2019-10-18 | 中国电子科技集团公司第五十八研究所 | A kind of image sensor wafer level packaging methods and encapsulating structure |
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- 2019-07-05 CN CN201921045668.2U patent/CN209822644U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110349986A (en) * | 2019-07-05 | 2019-10-18 | 中国电子科技集团公司第五十八研究所 | A kind of image sensor wafer level packaging methods and encapsulating structure |
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