CN209626202U - A kind of chip-packaging structure - Google Patents
A kind of chip-packaging structure Download PDFInfo
- Publication number
- CN209626202U CN209626202U CN201920271910.1U CN201920271910U CN209626202U CN 209626202 U CN209626202 U CN 209626202U CN 201920271910 U CN201920271910 U CN 201920271910U CN 209626202 U CN209626202 U CN 209626202U
- Authority
- CN
- China
- Prior art keywords
- layer
- chip
- clamp
- welding layer
- welding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Abstract
The utility model provides a kind of chip-packaging structure, by changing the structure of connection folder, is set to clamp and the welding layer positioned at the both ends of clamp, both ends welding layer is respectively adapted to contraposition pad and corresponding pin；Clamp selection is not with the material of wetting, and welding layer selects and the material of wetting.Be advantageous in that: in connection folder welding process, solder is distributed only over welding layer, solder will not be caused to be lost at welding layer because of infiltration clamp, can accurately control welding region area, it is ensured that firm welding degree facilitates the yield for promoting encapsulating structure.
Description
Technical field
The utility model relates to chip encapsulation technology field more particularly to a kind of chip-packaging structures.
Background technique
In existing chip package, routing is a kind of common packaging technology, i.e., the pad on chip is electrically connected using gold thread
The pin being connected on lead frame.However, gold thread one side higher cost, on the other hand thinner, it is unable to satisfy the big electricity of some need
The occasion that stream passes through, such as the power device in power supply product.
In view of the above deficiencies, occurs copper folder in industry.Copper folder is that the shapes of needs is struck out using copper sheet, size not by
Limitation can pass through high current when realizing electrical connection.Tin is not easy the advantages that being oxidized since fusing point is lower (231.89 DEG C),
It is chosen as realizing a kind of clamping fixed common welding material of copper in industry.However, soldering tin technique is in actual package marginal testing
In the process, often there is the lower problem of yield.
In view of this, the present invention provides a kind of new chip-packaging structures, to solve the above technical problems.
Utility model content
The goal of the invention of the utility model is to provide a kind of chip-packaging structure, promotes encapsulation yield.
To achieve the above object, the utility model provides a kind of chip-packaging structure, comprising:
Lead frame, the lead frame include several pins；
Chip, the face exposure of the chip have several pads；
Several connection folders, each connection folder includes clamp and the welding layer positioned at the both ends of the clamp；Both ends welding
Layer is welded in pad and corresponding pin by solder respectively, so that pad is electrically connected to corresponding pin by the clamp；It is described
Welding layer and the wetting, the clamp not with the wetting.
Optionally, the material of the clamp is aluminum or aluminum alloy, and the material of the solder is tin, the material of the welding layer
For copper, copper alloy, titanium bazar metal, NiPdAu or nickel gold, the NiPdAu includes nickel layer, palladium layers and layer gold, the nickel Jin Bao
Include nickel layer and layer gold.
Optionally, when the material of the welding layer is copper or copper alloy, the thickness of the welding layer is greater than 2 μm；Work as institute
When the material for stating welding layer is titanium bazar metal, the thickness range of the welding layer is 1 μm~2 μm；When the material of the welding layer
When material is NiPdAu, the thickness range of the nickel layer is 2 μm~3 μm, and the thickness range of the palladium layers is 1.5 μm~2.5 μm, institute
The thickness range for stating layer gold is 0.03 μm~0.08 μm；When the material of the welding layer is nickel gold, the thickness model of the nickel layer
Enclosing is 2 μm~3 μm, and the thickness range of the layer gold is 0.03 μm~0.08 μm.
Optionally, the material of the pin and pad be copper or copper alloy or aluminum substrate upper surface composite titanium bazar metal,
NiPdAu or compound nickel gold.
Optionally, the both ends of the clamp have protrusion and groove, and the welding layer is located in the protrusion.
Optionally, the area of the welding layer of described clamp one end corresponds to the area of the pad, the welding layer of the other end
Area correspond to the pin area.
Optionally, the welding layer of described clamp one end has one or more, corresponds to one or more pads.
Optionally, the welding layer of the clamp other end has one or more, corresponds to one or more pins.
Optionally, the welding layer is formed using electroplating technology.
Compared with prior art, the utility model has the beneficial effects that:
1) structure that the utility model is pressed from both sides by changing connection, is set to clamp and the welding layer positioned at the both ends of clamp,
Both ends welding layer is respectively adapted to contraposition pad and corresponding pin；Clamp selection is not with the material of wetting, and welding layer selects and solder
The material of infiltration；In this way, solder is distributed only over welding layer in connection folder welding process, solder will not be caused to exist because of infiltration clamp
It is lost at welding layer, can accurately control welding region area, it is ensured that firm welding degree facilitates the yield for promoting encapsulating structure.
2) in optinal plan, the material of clamp is aluminum or aluminum alloy, and the material of solder is tin, the material of welding layer be copper,
Copper alloy, titanium bazar metal or NiPdAu.For existing tin solder, aluminum or aluminum alloy is not infiltrated with it, can make folder
Body；Due to infiltrating with tin solder, making welding layer by it can be improved connection folder for copper, copper alloy, titanium bazar metal or NiPdAu
With the firm welding degree of pad, pin.
3) in optinal plan, the material of pin and pad is that copper or copper alloy or aluminum substrate upper surface composite titanium nickeline close
Gold, NiPdAu or compound nickel gold.The setting of above-mentioned material or composite layer, can improve the leaching of tin solder lower layer in pin and pad
Lubricant nature energy, to improve the firm welding degree of connection folder and pad, pin.
4) both ends of clamp have protrusion and groove, and welding layer is located in protrusion.Recess region can be such that plastic packaging material enters, and make
Obtain chip, connection folder and lead frame fixation.
5) in optinal plan, the area of the welding layer of clamp one end corresponds to the area of pad, the welding layer of the other end
Area corresponds to the area of pin.Above scheme is improving welding effect while can be reduced solder usage amount.
6) in optinal plan, the welding layer of clamp one end has one or more, corresponds to one or more pads；With/
Or the welding layer of the clamp other end has one or more, corresponds to one or more pins.Connection folder in the utility model
With various application occasions, a pad can be connected to a pin, multiple pads can also be connected to the same pin,
Multiple pads can also be connected to a pin.
7) in optinal plan, welding layer is formed using electroplating technology.In the present solution, graphical light can be made on clamp
Photoresist is immersed in electroplate liquid by anode of clamp, the area deposition plating metal not being covered by photoresist on clamp；Later
Ashing removes patterned photoresist.In other optinal plans, silicon dioxide layer, dry or wet can also be made on clamp
The opening that exposure clamp is formed in silicon dioxide layer, fills metal using sputtering technology in the opening；Wet process removal later two
Silicon oxide layer.
Detailed description of the invention
Fig. 1 is the cross section structure schematic diagram of the chip-packaging structure in an embodiment of the present invention；
Fig. 2 is the cross section structure schematic diagram of the chip-packaging structure in another embodiment of the utility model；
Fig. 3 is the cross section structure schematic diagram of the chip-packaging structure in another embodiment of the utility model.
For convenience of the utility model is understood, it is listed below all appended drawing references occurred in the utility model:
1,2,3 lead frame 11 of chip-packaging structure
111 chip 12 of pin
Positive 12a pad 120
Connection 13 clamps 131 of folder
132 solder 14 of welding layer
Back side 12b base island 112
15 protrusion 131a of plastic packaging material
Groove 131b
Specific embodiment
It is understandable to enable the above objects, features, and advantages of the utility model to become apparent, with reference to the accompanying drawing to this
The specific embodiment of utility model is described in detail.
Fig. 1 is the cross section structure schematic diagram of the chip-packaging structure in an embodiment of the present invention.
Firstly, shown in referring to Fig.1, chip-packaging structure 1, comprising:
Lead frame 11, lead frame 11 include several pins 111；
The positive 12a exposure of chip 12, chip 12 has several pads 120；
Several connection folders 13, each connection folder 13 includes clamp 131 and the welding layer 132 positioned at the both ends of clamp 131；
Both ends welding layer 132 is welded in pad 120 and corresponding pin 111 by solder 14 respectively, so that pad 120 passes through clamp 131
It is electrically connected to corresponding pin 111；Welding layer 132 and solder 14 infiltrate, and clamp 131 is not infiltrated with solder 14.
Referring now still to shown in Fig. 1, lead frame 11 further includes base island 112 in addition to including several pins 111.Base island 112 is used for
Carry chip 12, the specially back side 12b of chip 12；And it radiates for chip 12.Pin 111 is used for chip-packaging structure 1
Externally electrical connection.
Chip 12 can may include the devices such as several metal-oxide-semiconductors, and/or resistance, and/or capacitor according to function difference.One
In a optinal plan, at least one metal-oxide-semiconductor is power MOS pipe.
Pad 120 is used to be electrically connected each device by several layers metal interconnection structure.
To improve the heat dissipation effect to chip 12, can be arranged between base island 112 and the back side 12b of chip 12 thermally conductive
Layer.The material of heat-conducting layer for example can be metallic tin.
In the connection folder 13 of Fig. 1, the material that the selection of clamp 131 is not infiltrated with solder 14, welding layer 132 is selected and solder 14
The material of infiltration.Be advantageous in that: in connection 13 welding processes of folder, solder 14 will not cause stream of stretching because of infiltration clamp 131
It loses, solder 14 can be only limited on welding layer 132, thus can accurately control welding region area, it is ensured that firm welding degree,
Facilitate the yield of promotion encapsulating structure 1.
In one optinal plan, the material of clamp 131 can be aluminum or aluminum alloy, the material of welding layer 132 can for copper,
Copper alloy, titanium bazar metal or NiPdAu, the material of solder 14 can be tin.NiPdAu includes nickel layer, palladium layers and layer gold.It is right
In existing tin solder, aluminum or aluminum alloy is not infiltrated with it, can make clamp 131；Copper, copper alloy, titanium bazar metal or nickel
For porpezite due to infiltrating with tin solder 14, making welding layer 132 by it can be improved the weldering of connection folder 13 with pad 120, pin 111
Connect firmness.
In one optinal plan, the material of welding layer 132 is copper or copper alloy, and the thickness of copper or copper alloy layer is greater than 2 μm.
In another optinal plan, the material of welding layer 132 is titanium bazar metal, and the thickness range that titanium nickeline closes layer is 1 μ
M~2 μm.
In another optinal plan, the material of welding layer 132 is NiPdAu, wherein the thickness range of nickel layer is 2 μm~3
μm, the thickness range of palladium layers is 1.5 μm~2.5 μm, and the thickness range of layer gold is 0.03 μm~0.08 μm.
In another optinal plan, the material of welding layer 132 is nickel gold, and nickel gold includes nickel layer and layer gold, wherein nickel layer
Thickness range is 2 μm~3 μm, and the thickness range of layer gold is 0.03 μm~0.08 μm.
Further, the material of pin 111 and pad 120 can be copper or copper alloy or aluminum substrate upper surface composite titanium nickel
Silver alloy, NiPdAu or compound nickel gold.It is understood that pin 111 and pad 120 relative to aluminum or aluminum alloy production,
Tin solder and the wetting property of previous materials are good, can improve the firm welding degree of connection folder 13 and the former.
In one optinal plan, welding layer 132 is formed using electroplating technology.In the present solution, can be made on clamp 131
Make graphical photoresist, is that anode is immersed in electroplate liquid with clamp 131, the region not being covered by photoresist on clamp 131
Deposit plating metal；Ashing removes patterned photoresist later.
In another optinal plan, silicon dioxide layer can be made on clamp 131, dry or wet is in silicon dioxide layer
The middle opening for forming exposure clamp 131, fills metal using sputtering technology in the opening；Wet process removes silicon dioxide layer later.
In other words, welding layer 132 is formed using the technique for forming metal interconnecting wires.
Shown in referring to Fig.1, plastic packaging material 15 is also filled between lead frame 11, connection folder 13 and chip 12.Plastic packaging material 15
Material can be existing plastic packaging material material, such as epoxy resin.
Fig. 2 is the cross section structure schematic diagram of the chip-packaging structure in another embodiment of the utility model.Referring to Fig. 2 and figure
Shown in 1, the chip-packaging structure 2 in Fig. 2 is roughly the same with the chip-packaging structure 1 in Fig. 1, and difference is only that: the company of Fig. 2
It connects in folder 13, the both ends of clamp 131 are respectively provided with raised 131a and groove 131b, and welding layer 132 is located on protrusion 131a.Groove
131b can be such that plastic packaging material 15 enters, so that chip 12,13 folder of connection and 11 fixation of lead frame.
Preferably, the area of the welding layer 132 of 131 one end of clamp corresponds to the area of pad 120, the welding layer of the other end
132 area corresponds to the area of pin 111.It will be appreciated that above scheme is improving welding effect while can be reduced solder
14 usage amount.
Fig. 3 is the cross section structure schematic diagram of the chip-packaging structure in another embodiment of the utility model.Referring to Fig. 3 and figure
Shown in 2, the chip-packaging structure 3 in Fig. 3 is roughly the same with the chip-packaging structure 2 in Fig. 2, and difference is only that: clamp 131
The welding layer 132 of one end not has one, but there are two having, correspond to two pads 120.It is advantageous in that: can be by two
A pad 120 is connected to the same pin 111.In other optinal plans, the welding layer 132 of 131 one end of clamp can also have
Three and its more than, it is corresponding that the pad 120 of three and its above number are connected to the same pin 111.
In other optinal plans, the welding layer 132 of 131 other end of clamp can also not have one, but have two
It is a, correspond to two pins 111.It is advantageous in that: a pad 120 can be connected to two pins 111.Other optional sides
In case, the welding layer 132 of 131 other end of clamp can also have there are three and its more than, correspondence the same pad 120 is connected to
The pin 111 of three and its above number.
Although the utility model discloses as above, the utility model is not limited to this.Anyone skilled in the art, In
It does not depart from the spirit and scope of the utility model, can make various changes or modifications, therefore the protection scope of the utility model
It should be defined by the scope defined by the claims..
Claims (9)
1. a kind of chip-packaging structure characterized by comprising
Lead frame, the lead frame include several pins；
Chip, the face exposure of the chip have several pads；
Several connection folders, each connection folder includes clamp and the welding layer positioned at the both ends of the clamp；Both ends welding layer point
Pad and corresponding pin are not welded in by solder, so that pad is electrically connected to corresponding pin by the clamp；The welding
Layer with the wetting, the clamp not with the wetting.
2. chip-packaging structure according to claim 1, which is characterized in that the material of the clamp is aluminum or aluminum alloy,
The material of the solder is tin, and the material of the welding layer is copper, copper alloy, titanium bazar metal, NiPdAu or nickel gold, the nickel
Porpezite includes nickel layer, palladium layers and layer gold, and the nickel gold includes nickel layer and layer gold.
3. chip-packaging structure according to claim 2, which is characterized in that when the material of the welding layer is that copper or copper close
The thickness of Jin Shi, the welding layer are greater than 2 μm；When the material of the welding layer is titanium bazar metal, the thickness of the welding layer
Spending range is 1 μm~2 μm；When the material of the welding layer is NiPdAu, the thickness range of the nickel layer is 2 μm~3 μm, institute
The thickness range for stating palladium layers is 1.5 μm~2.5 μm, and the thickness range of the layer gold is 0.03 μm~0.08 μm；When the welding
When the material of layer is nickel gold, the thickness range of the nickel layer is 2 μm~3 μm, the thickness range of the layer gold is 0.03 μm~
0.08μm。
4. chip-packaging structure according to claim 2 or 3, which is characterized in that the material of the pin and pad is copper
Or copper alloy or aluminum substrate upper surface composite titanium bazar metal, NiPdAu or compound nickel gold.
5. chip-packaging structure according to claim 1 or 2, which is characterized in that the both ends of the clamp have protrusion with
Groove, the welding layer are located in the protrusion.
6. chip-packaging structure according to claim 5, which is characterized in that the area pair of the welding layer of described clamp one end
The area of pad described in Ying Yu, the area of the welding layer of the other end correspond to the area of the pin.
7. chip-packaging structure according to claim 1, which is characterized in that the welding layer of described clamp one end has one
Or it is multiple, correspond to one or more pads.
8. chip-packaging structure according to claim 7, which is characterized in that the welding layer of the clamp other end has one
It is a or multiple, correspond to one or more pins.
9. chip-packaging structure according to claim 1, which is characterized in that the welding layer is formed using electroplating technology.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920271910.1U CN209626202U (en) | 2019-03-04 | 2019-03-04 | A kind of chip-packaging structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920271910.1U CN209626202U (en) | 2019-03-04 | 2019-03-04 | A kind of chip-packaging structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN209626202U true CN209626202U (en) | 2019-11-12 |
Family
ID=68455667
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201920271910.1U Active CN209626202U (en) | 2019-03-04 | 2019-03-04 | A kind of chip-packaging structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN209626202U (en) |
-
2019
- 2019-03-04 CN CN201920271910.1U patent/CN209626202U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102683509B (en) | Led module | |
| KR101802851B1 (en) | Lead frame, semiconductor package including the lead frame, and method of manufacturing the lead frame | |
| US20180040487A1 (en) | Manufacturing method of semiconductor device and semiconductor device | |
| WO2015043499A1 (en) | Semiconductor encapsulation structure and forming method thereof | |
| CN203367260U (en) | Power ceramic casing and power chip packaging structure | |
| JP2019176034A (en) | Semiconductor device and method for manufacturing semiconductor device | |
| US9337131B2 (en) | Power semiconductor device and the preparation method | |
| CN209626202U (en) | A kind of chip-packaging structure | |
| JP2019029662A (en) | Semiconductor device and semiconductor device manufacturing method | |
| TWM558999U (en) | Light-emitting package component | |
| US9847279B2 (en) | Composite lead frame structure | |
| CN109590633A (en) | Lead welding filler metal and its preparation method and application for integrated antenna package | |
| CN205582931U (en) | Part frame exposes multicore piece singly takes flip -chip tiling clamp core packaging structure | |
| CN212587507U (en) | Power discrete device adopting multi-chip stacking structure | |
| CN105206594B (en) | One side etches water droplet bump package structure and its process | |
| CN105355567B (en) | Two-sided etching water droplet bump package structure and its process | |
| CN103441116A (en) | Semiconductor package piece and manufacturing method thereof | |
| CN103887183B (en) | Gold/gold/silicon eutectic die welding method and transistor | |
| JP6423147B2 (en) | Power semiconductor device and manufacturing method thereof | |
| CN206789540U (en) | The semiconductor devices of SOT encapsulating structures | |
| CN206789534U (en) | High reliability chip-packaging structure | |
| CN206322729U (en) | CSP LED encapsulation structures | |
| CN216015357U (en) | Packaging structure of low-internal-resistance ultra-thin power device | |
| CN104538377A (en) | Fan-out packaging structure based on carrier and preparation method of fan-out packaging structure | |
| CN205582917U (en) | Frame exposes multicore piece takes flip -chip tiling clamp core packaging structure more |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |