CN209544325U - A kind of integrated circuit package structure for five pins that radiate - Google Patents

A kind of integrated circuit package structure for five pins that radiate Download PDF

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Publication number
CN209544325U
CN209544325U CN201920406776.1U CN201920406776U CN209544325U CN 209544325 U CN209544325 U CN 209544325U CN 201920406776 U CN201920406776 U CN 201920406776U CN 209544325 U CN209544325 U CN 209544325U
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China
Prior art keywords
pins
pin
integrated circuit
circuit package
package structure
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CN201920406776.1U
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Chinese (zh)
Inventor
肖国庆
陈永金
郑国昌
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Jiangxi Core Microelectronics Co Ltd
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Jiangxi Core Microelectronics Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48257Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

The integrated circuit package structure of a kind of five pins that radiate provided by the utility model, including the encapsulating structure being made of Ji Dao, terminal pin, heat dissipation pin, plastic-sealed body;The encapsulating structure can be used to encapsulate the device of four to five ports;Between PIN1 and PIN2, PIN3 pin, between PIN1 and PIN2 and PIN3 and PIN5 and base island there are spacing, improve its voltage endurance capability;PIN4 is connected with Ji Dao, and design pin widths are widened, and not only can be convenient and has played ground wire, but can be by chip operation when the heat that generates pass through the PIN4 pin being exposed and distribute, prevent chip overheating and burn out.Every plastic packaging runner of frame can be molded each 4 lead frame units around, improve plastic packaging material utilization rate.

Description

A kind of integrated circuit package structure for five pins that radiate
Technical field
The utility model relates to integrated antenna package technical fields, and in particular to a kind of integrated circuit envelope for five pins that radiate Assembling structure.
Background technique
Chip package is a kind of technology for being packaged the plastics of integrated circuit insulation or ceramic material, not only acts as peace It puts, fix, sealing, protecting the effect of chip and increased thermal conductivity energy, but also being to link up the chip interior world and external circuit Bridge.As intellectual product and wearable device Xiang Geng little, thinner and lighter direction develop, the manufacturing process of chip is not yet It is disconnected to develop from micron order to nanoscale, but the process of chip manufacturing develops more difficult more down, state-of-the-art 10 receives at present The rice technique soon attainable limit of proximity device institute, equipment, can only be from encapsulation to be made smaller, thinner and lighter Technically find breach.
Current patch encapsulation SOP and SSOP for foot spacing or product thickness, gradually can not whether Meet smaller chip to signaling rate, anti-interference ability, heat dissipation performance needs, it is necessary to it is thinner to develop smaller szie Patch packing forms, the utility model is precisely in order to reach the proposition of this purpose.
Utility model content
(1) the technical issues of solving
In order to adapt to smaller szie chip to the requirements at the higher level of signaling rate, anti-interference ability, heat dissipation performance, this reality A kind of new encapsulating structure is proposed with novel, and wherein more special a kind of band introduced below radiates the encapsulation knots of five pins Structure, we are named as Score5L, and (Score is Business Name abbreviation, and 5L indicates 5 pins.It states for convenience below, " a kind of integrated circuit package structure for five pins that radiate " is referred to as " Score5L " encapsulating structure).
(2) technical solution
In order to solve the above technical problems, the utility model uses following technical scheme:
A kind of Score5L encapsulating structure, each of which lead frame unit include 1 be used to place chip rectangle Ji Dao, Several are distributed in the inside and outside terminal pin of the parallel two sides Ji Dao or more.It is connected between chip and lead foot by bonding wire, chip Between five lead feet by bonding wire connect, five terminal pins include three narrow pins being connected with the side Ji Dao and with A connected narrow pin of the other side Ji Dao and wide pin, chip, terminal pin, bonding wire are finally wrapped up in plastic packaging by plastic packaging material To form rectangular package body structure.The plastic-sealed body length and width are 2.60 ± 0.10mm, plastic-sealed body with a thickness of 0.95 ± 0.10mm, the whole span after molding comprising terminal pin are 4.00 ± 0.10mm.
The adjacent legs frame unit is connected in chassis body by the hangs muscle extended from the two sides Ji Dao, constitutes branch together Support structure.
In the Score5L lead frame unit, between PIN1 and PIN2, PIN3 pin, PIN1 and PIN2 and PIN3 and There are the spacing of 0.20mm between PIN5 and base island, and interior pin is designed as " L " word shape.PIN4 is connected and increases with Ji Dao Pin widths.The bonding wire region of Ji Dao and lead foot increases pressure-sizing processing.
The Score5L encapsulating structure, it is characterised in that: every plastic packaging runner of lead frame or so is infused by gum-injecting port Mould each 4 lead frame units.
The Score5L encapsulating structure unit is further characterized in that: frame size 70.00mm*238.60mm.
Compared with existing SOP and SSOP encapsulation technology, encapsulating structure provided by the utility model has following benefit:
1) pin number is 5, is suitble to four to five port devices of encapsulation;Or some scripts of encapsulation using SOP and SSOP8 encapsulation, but the integrated circuit that bonding wire number of pins is seldom.
2) it there are the spacing of 0.20mm between PIN1 and PIN2, PIN3 pin, reduces between pin since spacing is too close Cause the risk of discharge breakdown;The interior pin of PIN1 and PIN2, PIN3, PIN5 are designed as " L " word shape simultaneously, increase plastic packaging material With the binding force of pin, pin root is prevented when rib cutting to be pullled loosening by external force.
3) PIN4 is connected with Ji Dao and pin widths are by 0.33mm increases to 0.844mm, not only can be convenient and has played ground wire, but also energy The heat generated when by chip operation passes through the pin being exposed and distributes, and prevents chip overheating and burns out.
4) the bonding wire region of Ji Dao and lead foot increases pressure-sizing processing, improves the flatness in routing region, is more advantageous to Bonding wire.
5) every plastic packaging runner injection molding left and right of frame is molded each 4 lead frame units by gum-injecting port, improves injection molding modeling Envelope material utilization rate.
6) frame size is 70.00mm*238.60mm design structure (can receive 704 lead frame units), than traditional SOP designs (can receive 256 lead frame units) and SSOP structure design (can receive 70 lead frame units) receives lead frame Cell density is higher, maximizes copper strips utilization rate.
7) ground wire can directly the island Da Ji coined area on, shorten the length of ground wire, reduce routing difficulty, It is more safe and reliable.
8) Ji Daochu designs circular arc lockhole, increases buckling die ability, prevents plastic-sealed body from separating with Ji Dao, and it is reliable to improve product Property.
9) Score5 lead frame unit lead connection total length is 3.71mm, and the single wire length of longest is 0.94mm (Fig. 7), It is 7.65mm that SOP8 lead frame unit lead, which connects total length, and the single wire length of longest is 1.9mm (Fig. 8).Lead connection apart from short, Signal transmission is fast, and signal interference is small.
The utility model can satisfy smaller szie chip and transmit speed to signal by above-described some special designings The requirements at the higher level of degree, anti-interference ability, heat dissipation performance.
Detailed description of the invention
Fig. 1 is the product shape front view of Score5L;
Fig. 2 is the product shape left view of Score5L;
Fig. 3 is the product shape top view of Score5L;
Fig. 4 is the circuit theory schematic diagram of Score5L;
Fig. 5 is the enlarged diagram of part in frame structure;
Fig. 6 is the structural schematic diagram of a lead frame unit in frame structure;
Fig. 7 is the bonding wire template schematic diagram of Score5L;
Fig. 8 is the bonding wire template schematic diagram of SOP8 encapsulation.
Appended drawing reference: 1-frame base, 2-lead frame units, 3-plastic packaging runners, 4-Ji Dao, 5-gum-injecting ports, 6- Pressure-sizing area, 7-hangs muscles, 8-circular arc lockholes, d1-PIN1 and PIN2 pin spacing, d2-PIN1 and the bottom PIN2 to Ji Dao Distance, d3-base island submergence depth.
Specific embodiment
The following will be combined with the drawings in the embodiments of the present invention, carries out the technical scheme in the embodiment of the utility model Clearly and completely describe, it is clear that the described embodiments are only a part of the embodiments of the utility model, rather than whole Embodiment.Based on the embodiments of the present invention, those of ordinary skill in the art are without making creative work Every other embodiment obtained, fall within the protection scope of the utility model.
The utility model proposes the patch encapsulation with five pins of heat dissipation be different from existing any packing forms, I Be called Score5L encapsulation, it is smaller thinner than current SOP, SSOP, is more suitable for large-scale SMT operation.Below with reference to The embodiments of the present invention are described in detail in attached drawing.
As shown in Figure 1, the long generous respectively 2.60mm*2.60mm*0.95mm of the plastic-sealed body of Score5L, pin number is only It is 5, and PIN4 is connected with base island 4, enhances product heat dissipation performance.Suitable for encapsulating the device of four or five ports, or Some scripts are encapsulated using SOP and SSOP8, but the integrated circuit that bonding wire number of pins is seldom.
A kind of typical Score5L frame structure is as shown in Figure 4 and Figure 5.In the frame of one piece of 70.00mm*238.60mm On substrate 1, uniformly arrange several rows and several columns lead frame unit 2, plastic packaging runner 3, respectively injection molding 4 arranges plastic packaging runner 3 or so Lead frame unit 2 greatly improves plastic packaging material utilization rate.
Fig. 6 is then the structural schematic diagram of one of lead frame unit of Score5L frame.According to theoretical formula: (note 1: Select and edit 2004 with reference to Chinese lightning protection Information Network third Chinese lightning protection forum paper: the volt that air minim gap discharges is away from characteristic) When gap L is greater than 0.4mm, gap discharge voltage U=1560+500L (V), clearance air breakdown strength is U/ (100L) (unit V/dmm, note: 1dmm=0.01mm).There are sufficiently large spacing (d1=0.53mm) between PIN1 and PIN2, pin is reduced Between due to the risk (the breakdown voltage U=1825V that can be born, breakdown voltage strength U/ that closely cause very much discharge breakdown that lean on 100L=34.43/dmm).Also enough spacing (d2=are remained between PIN1 and PIN2, PIN3, PIN5 and base island 0.15mm), also for prevent breakdown lead to short circuit phenomenon.The interior pin of PIN1 and PIN2, PIN3, PIN5 are designed as simultaneously " L " word shape increases the binding force of plastic packaging material and pin, and pin root is prevented when rib cutting to be pullled loosening by external force.
PIN4 is connected with base island 4 and pin widths pin widths are by 0.33mm increases to 0.844mm, both can be convenient and has beaten ground Line, but can be by chip operation when the heat that generates pass through the PIN4 pin being exposed and distribute, prevent chip overheating and burn It is bad.Added with lock glue hole on the interior pin of PIN4, the binding force of pin and plastic packaging material when enhancing plastic packaging.
Have on base island 4 and increase the design of circular arc type lockhole, increases encapsulating area, enhance anti-vertical resolution.
Pressure-sizing area 6 on base island 4 increases pressure-sizing processing, improves its flatness;Base island 4 is using downset (under the island Ji Ji It is heavy) design, submergence depth d3=0.152mm.
Fig. 7, Fig. 8 are the bonding wire template schematic diagrames for being respectively Score5L and SOP8.It can be seen that this using Score5L The less encapsulation of number of pins can realize and use SOP8 to encapsulate same function, and heat dissipation performance is also more than SOP8 It is good.Using Score5L encapsulation volume (2.60*2.60*0.95=6.422mm3) and using SOP8 encapsulation volume (4.90*3.90* 1.45=27.7095mm3) compare, Score5L encapsulation volume only has the 23.176% of SOP8 encapsulation volume.
It should be noted that, in this document, relational terms such as first and second and the like are used merely to a reality Body or operation are distinguished with another entity or operation, are deposited without necessarily requiring or implying between these entities or operation In any actual relationship or order or sequence.Moreover, the terms "include", "comprise" or its any other variant are intended to Non-exclusive inclusion, so that the process, method, article or equipment including a series of elements is not only wanted including those Element, but also including other elements that are not explicitly listed, or further include for this process, method, article or equipment Intrinsic element.In the absence of more restrictions, the element limited by sentence "including a ...", it is not excluded that There is also other identical elements in process, method, article or equipment including the element.
While there has been shown and described that the embodiments of the present invention, for the ordinary skill in the art, It is understood that these embodiments can be carried out with a variety of variations in the case where not departing from the principles of the present invention and spirit, repaired Change, replacement and variant, the scope of the utility model is defined by the appended claims and the equivalents thereof.

Claims (9)

1. a kind of integrated circuit package structure for five pins that radiate, it is characterised in that: constituted including Ji Dao, terminal pin, plastic-sealed body Closed encapsulating structure;It is connected between chip and five lead feet by bonding wire, five terminal pins include and the side Ji Dao phase Three narrow pins even and a narrow pin being connected with the other side Ji Dao and wide pin.
2. a kind of integrated circuit package structure of five pins that radiate according to claim 1, it is characterised in that: the plastic packaging Body length and width are 2.60mm, and for plastic-sealed body with a thickness of 0.95mm, the whole span after molding comprising terminal pin is 4.00mm.
3. a kind of integrated circuit package structure of five pins that radiate according to claim 2, it is characterised in that: adjacent legs Frame unit is connected in chassis body by the hangs muscle extended from the two sides Ji Dao, constitutes support construction together.
4. a kind of integrated circuit package structure of five pins that radiate according to claim 1, it is characterised in that: terminal pin Between PIN1 and PIN2, PIN3 pin, between PIN1 and PIN2 and PIN3 and PIN5 and base island there are spacing, and it is each in draw Foot is designed as " L " word shape.
5. a kind of integrated circuit package structure of five pins that radiate according to claim 4, it is characterised in that: PIN4 and base Island, which is connected, and pin widths are by 0.33mm increases to 0.844mm.
6. a kind of integrated circuit package structure of five pins that radiate according to claim 1, it is characterised in that: Ji Dao and interior The bonding wire region of terminal pin increases pressure-sizing processing.
7. a kind of integrated circuit package structure of five pins that radiate according to claim 1, it is characterised in that: Ji Dao increases The processing of mode locking hole.
8. it is according to claim 3 it is a kind of radiate five pins integrated circuit package structure, it is characterised in that: frame it is every Plastic packaging runner or so is molded each 4 lead frame units by gum-injecting port.
9. a kind of integrated circuit package structure of five pins that radiate according to claim 8, it is characterised in that: frame size For 70.00mm*238.60mm.
CN201920406776.1U 2019-03-28 2019-03-28 A kind of integrated circuit package structure for five pins that radiate Active CN209544325U (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109962048A (en) * 2019-03-28 2019-07-02 江西芯诚微电子有限公司 A kind of integrated circuit package structure of five pins of band heat dissipation
CN113782456A (en) * 2021-09-07 2021-12-10 广东气派科技有限公司 Production method for improving production efficiency of SOP type packaging product

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109962048A (en) * 2019-03-28 2019-07-02 江西芯诚微电子有限公司 A kind of integrated circuit package structure of five pins of band heat dissipation
CN113782456A (en) * 2021-09-07 2021-12-10 广东气派科技有限公司 Production method for improving production efficiency of SOP type packaging product

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