CN209515659U - Inductance stacked structure and radio frequency amplifier - Google Patents
Inductance stacked structure and radio frequency amplifier Download PDFInfo
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- CN209515659U CN209515659U CN201920427040.2U CN201920427040U CN209515659U CN 209515659 U CN209515659 U CN 209515659U CN 201920427040 U CN201920427040 U CN 201920427040U CN 209515659 U CN209515659 U CN 209515659U
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- 230000005672 electromagnetic field Effects 0.000 abstract description 19
- 230000008878 coupling Effects 0.000 description 17
- 238000010168 coupling process Methods 0.000 description 17
- 238000005859 coupling reaction Methods 0.000 description 17
- 238000010586 diagram Methods 0.000 description 13
- 238000000034 method Methods 0.000 description 12
- 239000002184 metal Substances 0.000 description 7
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- 239000000463 material Substances 0.000 description 2
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Abstract
The utility model discloses a kind of inductance stacked structure and radio frequency amplifiers.The inductance stacked structure includes: substrate；Stack the first inductance and the second inductance on substrate；Wherein, the upright projection of the first inductance on substrate includes first annular and the second annular, and first annular and the second annular is centrosymmetric about first nodal point；The upright projection of second inductance on substrate includes third annular, and third annular is centrosymmetric figure about the second central point；Also, first nodal point and the second central point are overlapped.According to the utility model embodiment, the electromagnetic field couples of inductance can be avoided, chip cost is reduced in the case where reducing inductance area occupied.
Description
Technical Field
The utility model belongs to the technical field of integrated circuit, especially, relate to an inductance stacked structure and radio frequency amplifier.
Background
Integrated circuits contain a large number of passive components, of which on-chip inductors are one of the most important, and on-chip inductors are one of the important components of radio frequency integrated circuits. In a typical wireless product, the inductive element has a significant impact on the overall radio frequency performance of the product. The design and analysis of such inductive components has therefore been extensively studied. For example, an on-chip wideband radio frequency Low Noise Amplifier (LNA) can amplify radio frequency signals within a specified frequency band with the same gain.
However, since the bandwidth of a given frequency band is large in some cases, two or more inductors and capacitors are required to form a resonant circuit. The multiple inductors on the chip occupy a significant amount of chip area, increasing chip cost. Also, saving chip area by simply bringing inductors close together or stacking them can affect the overall functionality and performance of the LNA.
Therefore, in integrated circuit design, the design of the inductor is often a difficult problem. At present, the problems of low integration level of an integrated circuit, large chip, high chip cost and the like caused by large chip area occupied by the inductor generally exist.
SUMMERY OF THE UTILITY MODEL
The embodiment of the utility model provides an inductance stacked structure and radio frequency amplifier can avoid the electromagnetic field coupling of inductance under the condition that reduces inductance area occupied, has reduced the chip cost.
In a first aspect, an embodiment of the present invention provides an inductance stacked structure, including:
a substrate;
a first inductor and a second inductor stacked on a substrate;
wherein a vertical projection of the first inductor on the substrate includes a first ring and a second ring, the first ring and the second ring being centrosymmetric with respect to the first center point;
the vertical projection of the second inductor on the substrate comprises a third ring, and the third ring is in a central symmetry pattern relative to the second central point;
wherein the first center point and the second center point coincide.
According to the utility model provides an inductance stacked structure, first annular, second annular and third annular are the polygon.
According to the utility model provides an inductance stacked structure, first annular and second annular are the pentagon, and perhaps, first annular and second annular are circular, and perhaps, first annular and second annular are oval.
According to the utility model provides an inductance stacked structure, the third annular is the octagon, and perhaps, the third annular is circular, and perhaps, the third annular is oval.
According to the utility model provides an inductance stacked structure, first annular, second annular and third annular are circular.
According to the utility model provides an inductance stack structure, the input and the output of first inductance are located the first limit of first inductance, and the input and the output of second inductance are located the second edge of second inductance, and the first limit of first inductance is adjacent with the second limit of second inductance.
In a second aspect, embodiments of the present invention provide a radio frequency amplifier arrangement comprising an inductor stack as in the first aspect.
According to the utility model discloses the radio frequency amplifier that the embodiment provided, radio frequency amplifier still includes:
the first capacitor and the first inductor are connected in parallel to form a first resonant circuit, and the second capacitor and the second inductor are connected in parallel to form a second resonant circuit.
According to the utility model discloses the radio frequency amplifier that the embodiment provided, radio frequency amplifier still includes:
a third capacitor connected between the first side of the first resonant circuit and the first side of the second resonant circuit.
According to the utility model discloses the radio frequency amplifier that the embodiment provided, radio frequency amplifier still includes:
a fourth capacitance connected between the second side of the first resonant circuit and the second side of the second resonant circuit.
The utility model discloses inductance stack structure and radio frequency amplifier, two inductances stack up the setting, and the structure of two inductances is different, and on the magnetic field direction of second inductance, the first annular of first inductance and second annular produce opposite magnetic field, so, the magnetic field that first annular and second annular produced can offset each other, has avoided the electromagnetic field coupling between the inductance. The embodiment of the utility model provides a can avoid the electromagnetic field coupling of inductance under the condition that reduces inductance area occupied, reduce the chip cost.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required to be used in the embodiments of the present invention will be briefly described below, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a schematic diagram of a first inductor configuration;
FIG. 2 is a schematic diagram of electromagnetic field coupling between inductors in a first inductor configuration;
FIG. 3 is a schematic diagram of the amplitude-frequency characteristics of a low noise amplifier using a first inductive configuration;
fig. 4 is a schematic perspective view of an inductor stacking structure according to an embodiment of the present invention;
fig. 5 is a schematic top view of an inductor stack structure provided in an embodiment of the present invention;
fig. 6 is a schematic front view of an inductor stacking structure provided in an embodiment of the present invention;
fig. 7 is a schematic right-view diagram of an inductor stacking structure according to an embodiment of the present invention;
fig. 8 is a schematic diagram illustrating electromagnetic field coupling between inductors in an inductor stack structure according to an embodiment of the present invention;
fig. 9 is a schematic circuit diagram of a low noise amplifier provided by an embodiment of the present invention;
fig. 10 is a schematic diagram of the amplitude-frequency characteristic of the low noise amplifier according to the embodiment of the present invention.
Detailed Description
The features and exemplary embodiments of various aspects of the present invention will be described in detail below, and in order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. It will be apparent to one skilled in the art that the present invention may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the invention by illustrating examples of the invention.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
Fig. 1 is a schematic diagram of a first inductor structure. As shown in fig. 1, the first inductor 1 and the second inductor 2 are disposed side by side, that is, the first inductor 1 and the second inductor 2 are on the same metal layer and spaced apart by a certain distance. The inductor with this structure occupies a relatively large chip area, and the rectangular area surrounded by the first inductor 1 and the second inductor 2 as shown in fig. 1 occupies a total chip area of 240 × 160 square micrometers (μm)2)。
Fig. 2 is a schematic diagram of electromagnetic field coupling between inductors in a first inductor configuration. The inductance value of the first inductor 1 is set to be L1, the inductance value of the second inductor 2 is set to be L2, the two inductors are simulated through an electromagnetic field, S parameters of the two inductors can be obtained, and then electromagnetic field coupling S21 between the first inductor and the second inductor can be obtained through simulation. The S-parameter is understood here to be the S-parameter of the two-port network formed by the two inductive ports, also called the scattering parameter (S-parameter).
Fig. 3 is a schematic diagram of the amplitude-frequency characteristic of a low noise amplifier using a first inductance structure. As shown in fig. 3, the amplitude-frequency response of the low noise amplifier LNA exhibits a band-pass characteristic. In the LNA, the first capacitor and the first inductor, and the second capacitor and the second inductor form two resonant cavities corresponding to two gain peaks near 10.3GHz and near 12.0GHz, the 3dB bandwidth is about 3.2GHz, and the gains in the bands are basically consistent.
On the one hand, in order to solve among the prior art inductance area occupied is great, causes the chip cost higher, on the other hand, if simply pile up the inductance, though can reduce inductance area occupied, the electromagnetic field coupling between the inductance can become strong. The embodiment of the utility model provides an inductance stacked structure and low noise amplifier can avoid the electromagnetic field coupling of inductance under the condition that reduces inductance area occupied, has reduced the chip cost.
The inductor stacking structure provided by the embodiments of the present invention is first described below.
Fig. 4 is a schematic perspective view of an inductor stacking structure according to an embodiment of the present invention. Fig. 5 is a schematic top view of an inductor stacking structure according to an embodiment of the present invention. As shown in fig. 4 and 5, an inductor stack structure provided by the embodiment of the present invention includes a substrate 30, and a first inductor 10 and a second inductor 20 stacked on the substrate 30. Here, the first inductor 10 and the second inductor 20 are formed by different metal layers, and the peripheries of the first inductor 10 and the second inductor 20 are all insulating mediums. Wherein, the vertical projection of the first inductor 10 on the substrate 30 includes a first ring 11 and a second ring 12, and the first ring 11 and the second ring 12 are centrosymmetric with respect to the first center point a; the vertical projection of the second inductor 20 on the substrate 30 comprises a third ring shape, the third ring shape being in a centrosymmetric pattern with respect to the second center point B; the first center point a and the second center point B coincide with each other.
Here, the metal layer may be two layers, three layers, five layers, or the like, and the first inductor and the second inductor may be formed of different metal layers.
According to the embodiment of the utility model provides a, two inductances stack up the setting, and the structure of two inductances is different, and on the magnetic field direction of second inductance, the first annular of first inductance and second annular produce opposite magnetic field, so, the magnetic field that first annular and second annular produced can offset each other, has avoided the electromagnetic field coupling between the inductance. The embodiment of the utility model provides an in, can avoid the electromagnetic field coupling of inductance under the condition that reduces inductance area occupied, reduce the chip cost.
In one embodiment, the first ring shape and the second ring shape are both polygonal. For example, the first and second rings are each pentagonal. The pentagon may be a regular pentagon. Alternatively, the first ring shape and the second ring shape are both circular, or the first ring shape and the second ring shape are both elliptical. Of course, the first ring and the second ring may be polygons, and the number of sides of the two polygons may be equal or unequal.
Here, the perpendicular projection of the first inductance on the substrate includes a first loop shape and a second loop shape. It is understood that the two rings are not isolated, but rather are of a unitary construction, and the description of the two rings is used herein only for clarity in defining the construction of the first inductor. It will be appreciated that the perpendicular projection of the first inductor onto the substrate appears as an "8" shaped structure.
For example, as shown in fig. 5-7, the first inductor has 3 turns. Here, the entirety of the first inductance can be regarded as being composed of two loops regardless of the number of turns of the first inductance. Of course, in the actual process, the two ring-shaped joints (e.g. l2) and the joints from the first turn to the other turn (e.g. l1, l3) can be connected by jumpers, and in order to prevent short circuit, the upper and lower turns at the joints are insulated. Here, the jumper may be formed of another metal layer. In addition, the first inductor has an input terminal and an output terminal, and at least one of the two loops is not a closed loop.
In particular, the input and output are on one ring. For example, the input and output terminals of the first inductor are on the first ring and on the same side of the first ring. The terminal a1 of the first inductor is an input terminal, the terminal a2 is an output terminal, and the dashed line m is used as a boundary line to divide the first inductor into a left side and a right side. The current of the first inductor is specifically as follows: from A1, through the outermost turn of the first annular left to the innermost turn of the second annular right, then to the middle turn of the second annular left, then to the middle turn of the first annular right, then to the innermost turn of the first annular left, then to the outermost turn of the second annular right, then to the outermost turn of the second annular left, then to the innermost turn of the first annular right, then to the middle turn of the first annular left, then to the middle turn of the second annular right, then to the innermost turn of the second annular left, then to the outermost turn of the first annular right, and finally to A2. Therefore, in the magnetic field direction of the second inductor, the magnetic fields generated by the two rings of the first inductor are mutually offset, and the electromagnetic field coupling between the inductors is avoided.
Of course, the first inductor may also adopt other winding manners, as long as it is ensured that the magnetic fields generated by the two loops of the first inductor can cancel each other in the magnetic field direction of the second inductor.
The embodiment of the utility model provides an in, first inductance can be plane inductance, and the material of inductance, the number of turns, and the width and the thickness etc. of each circle of inductance can set up according to actual demand. It will be appreciated that the number of turns in the two loops of the first inductor is equal.
In another embodiment, the third ring is a polygon. For example, the third ring shape is an octagon, which may be a regular octagon. Alternatively, the third ring is circular, or the third ring is elliptical. Of course, the third ring shape may also be a polygon. It will be appreciated that the perpendicular projection of the second inductance onto the substrate appears as an "O" shaped structure.
For example, as shown in fig. 5 and 6, the number of turns of the second inductor is 3. Here, the second inductor as a whole can be regarded as being composed of one loop regardless of the number of turns of the second inductor. Of course, in the actual process, the connection from the first turn to the other turn can be connected by a jumper wire, and in order to prevent short circuit, the upper and lower turns at the connection are insulated. Here, the jumper may be formed of another metal layer. In addition, the second inductor has an input terminal and an output terminal, and the third loop is not a closed loop.
Specifically, the input terminal and the output terminal of the second inductor are on the same side of the third ring, the terminal B1 of the second inductor is the input terminal, the terminal B2 is the output terminal, and the dashed line m is used as a boundary line to divide the second inductor into a left side and a right side. The current of the second inductor is specifically as follows: from B1, through the outermost turn on the left of the second inductor into the middle turn on the right, then into the innermost turn on the left, then into the innermost turn on the right, then into the middle turn on the left, then into the outermost turn on the right, and finally to B2.
Of course, the second inductor may also adopt other winding manners, as long as it is ensured that the magnetic fields generated by the two loops of the first inductor can cancel each other in the magnetic field direction of the second inductor.
The embodiment of the utility model provides an in, the second inductance can be plane inductance, the material of inductance, the number of turns, width and thickness etc. of each circle of second inductance can set up according to actual demand.
In a preferred embodiment, the first ring, the second ring and the third ring are all circular, and the number of turns of each ring is equal. Therefore, under the condition of reducing the occupied area of the two inductors, the magnetic fields generated by the two rings of the first inductor can be mutually offset in the magnetic field direction of the second inductor, and the electromagnetic field coupling between the inductors is avoided.
In addition, the input end and the output end of the first inductor are adjacent to the input end and the output end of the second inductor. It will be appreciated that the input terminal a1 and the output terminal a2 of the first inductor are located on a first side of the first loop, and the input terminal B1 and the output terminal B2 of the second inductor are located on a second side of the third loop, where the first side of the first loop is adjacent to the second side of the third loop, i.e., the two sides are substantially in the same vertical direction.
In the embodiment of the present invention, the area of the rectangular region occupied by the vertical projection of the first inductor and the second inductor on the substrate is not more than 1Square millimeter (mm)2). For example, 160X 160 μm2Compared with the area occupied by the two inductors in fig. 1, the area is saved by 33%.
Fig. 8 is a schematic diagram illustrating electromagnetic field coupling between inductors in an inductor stack structure according to an embodiment of the present invention. Fig. 8 is the same as fig. 2 in the value of the two inductors, and it can be seen that, in the embodiment of the present invention, the two inductors are stacked, but there is no electromagnetic field coupling enhancement between the two inductors due to the proximity of the distance between the two inductors. Furthermore, according to the stacked inductor structure of the present invention, the electromagnetic field coupling strength between the two inductors is lower than that shown in fig. 2.
It should be noted that the stacked inductor structure in the embodiment of the present invention is suitable for the application of all the widths of multiple resonant cavities. Such as a low noise amplifier, a voltage-controlled oscillator (VCO). The following description will be made in detail by taking a low noise amplifier as an example.
Fig. 9 is a schematic circuit diagram of a low noise amplifier according to an embodiment of the present invention. The low noise amplifier employs an inductor stack structure as described above. Here, the inductor L1 in fig. 9 may have the structure of the second inductor described above, and the inductor L2 may have the structure of the first inductor described above.
As shown in fig. 9, the inductor L1 is connected in parallel with the capacitor C1 to form a first resonant circuit, and the inductor L2 is connected in parallel with the capacitor C2 to form a second resonant circuit. A third capacitor C is connected between the first side of the first resonant circuit and the first side of the second resonant circuit. A fourth capacitance C is connected between the second side of the first resonant circuit and the second side of the second resonant circuit. The third capacitance and the fourth capacitance may be two equal capacitances.
Here, the first resonant circuit may be understood as a first resonant cavity and the second resonant circuit may be understood as a second resonant cavity. In one embodiment, the signals are amplified by transistors and enter two resonators, two gain spikes are generated in a frequency band, the signals of the two resonators are coupled through a third capacitor and a fourth capacitor, and then the signals are sent out to the MIXER MIXER.
Further, the capacitor C1, the capacitor C2, the third capacitor C, and the fourth capacitor C may be located between the substrate and the metal layer closest to the substrate.
Fig. 10 is a schematic diagram of the amplitude-frequency characteristic of the low noise amplifier according to the embodiment of the present invention. In fig. 10, compared with fig. 3, the values of the inductor and the capacitor in the LNA are the same, and the difference is the inductor structure. Fig. 10 employs an inductor structure as shown in fig. 4, and fig. 3 employs an inductor structure as shown in fig. 1. It can be seen that the gains produced by the LNAs of both are substantially identical within the target frequency band. In fig. 10, the 3dB bandwidth is 3GHz, and both the gain level and the bandwidth size substantially coincide with fig. 3.
The embodiment of the utility model provides an in, inductance among the low noise amplifier adopts as above inductance stacked structure, has reduced the area of inductance, and then has reduced the chip cost. In addition, the electromagnetic field coupling strength between the inductors is weaker, so that the performance of the low-noise amplifier is more stable and reliable.
It should also be noted that the exemplary embodiments mentioned in the present disclosure describe some methods or systems based on a series of steps or devices. However, the present invention is not limited to the order of the above steps, that is, the steps may be performed in the order mentioned in the embodiments, may be performed in a different order from the embodiments, or may be performed simultaneously.
As described above, only the specific embodiments of the present invention are provided, and those skilled in the art can clearly understand that, for the convenience and simplicity of description, the specific working processes of the system, the module and the unit described above can refer to the corresponding processes in the foregoing method embodiments, and are not described herein again. It should be understood that the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive various equivalent modifications or substitutions within the technical scope of the present invention, and these modifications or substitutions should be covered by the scope of the present invention.
Claims (10)
1. An inductor stack, comprising:
a substrate;
a first inductor and a second inductor stacked on the substrate;
wherein a vertical projection of the first inductor on the substrate comprises a first ring and a second ring, the first ring and the second ring being centrosymmetric about a first center point;
the vertical projection of the second inductor on the substrate comprises a third ring, and the third ring is in a central symmetry pattern relative to a second central point;
wherein the first center point and the second center point coincide.
2. The inductor stack of claim 1, wherein the first ring shape, the second ring shape, and the third ring shape are each polygonal.
3. The inductor stack of claim 1,
the first ring and the second ring are both pentagons;
or,
the first ring shape and the second ring shape are both circular;
or,
the first ring shape and the second ring shape are both elliptical.
4. The inductor stack of claim 1,
the third ring is octagonal;
or,
the third ring is circular;
or,
the third ring is elliptical.
5. The inductor stack of claim 1, wherein the first ring, the second ring, and the third ring are all circular.
6. The inductor stack of claim 1, wherein the input and output terminals of the first inductor are located on a first side of the first inductor, wherein the input and output terminals of the second inductor are located on a second side of the second inductor, and wherein the first side of the first inductor is adjacent to the second side of the second inductor.
7. A radio frequency amplifier, characterized in that it comprises an inductive stack according to any of claims 1 to 6.
8. The radio frequency amplifier of claim 7, further comprising:
the first capacitor is connected with the first inductor in parallel to form a first resonant circuit, and the second capacitor is connected with the second inductor in parallel to form a second resonant circuit.
9. The radio frequency amplifier of claim 8, further comprising:
a third capacitance connected between the first side of the first resonant circuit and the first side of the second resonant circuit.
10. The radio frequency amplifier of claim 8, further comprising:
a fourth capacitance connected between the second side of the first resonant circuit and the second side of the second resonant circuit.
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| CN201920427040.2U CN209515659U (en) | 2019-04-01 | 2019-04-01 | Inductance stacked structure and radio frequency amplifier |
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| CN201920427040.2U CN209515659U (en) | 2019-04-01 | 2019-04-01 | Inductance stacked structure and radio frequency amplifier |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113161482A (en) * | 2020-01-07 | 2021-07-23 | 瑞昱半导体股份有限公司 | Integrated inductor |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113161482A (en) * | 2020-01-07 | 2021-07-23 | 瑞昱半导体股份有限公司 | Integrated inductor |
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