CN209215496U - A kind of grid voltage sags failure simulation device - Google Patents
A kind of grid voltage sags failure simulation device Download PDFInfo
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- CN209215496U CN209215496U CN201821878104.2U CN201821878104U CN209215496U CN 209215496 U CN209215496 U CN 209215496U CN 201821878104 U CN201821878104 U CN 201821878104U CN 209215496 U CN209215496 U CN 209215496U
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Abstract
The utility model discloses a kind of grid voltage sags failure simulation devices, described device includes single-chip microcontroller, power supply module, relay module, single-chip microcontroller debugging interface, serial ports and host computer, the single-chip microcontroller is connect with the power supply module, relay module respectively, the control I/O pin of the single-chip microcontroller is connect with the input terminal of the relay module, the output end of the relay module is connect with power resistor, and the single-chip microcontroller is connect by serial ports with host computer.The utility model is used to be controlled based on ARM, and using the design method of relay output characteristics, the structure of device design is simple, at low cost, highly reliable, highly-safe.The device not only can choose dip duration operation, in real time accurate control dip duration, and can simulate single-phase mains voltage fault condition.
Description
Technical field
The utility model belongs to power electronics equipment technology field, in particular to a kind of network voltage failure simulation device.
Background technique
Power grid in actual operation, due to being struck by lightning, the bad weathers such as storm, by external force or apparatus insulated damage
Bad situations such as, causes Voltage Drop amplitude big, and coverage is larger.In practice, compared with the power failure accident of long period,
Voltage Drop Probability is higher, copes with also relatively difficult.The extent of injury of Voltage Drop and the close phase of the sensitivity of equipment
It closes, different equipment is different the susceptibility of same Voltage Drop, it is however generally that, Voltage Drop is to illumination, precision instrument
The influence of equal sensitive loads becomes apparent.In order to understand the influence that the more different loads of grid voltage sags generate, Yi Jiwei in depth
Subsequent technology measure provides support, and there is an urgent need to voltage sag simulation devices.
Currently, the topological structure of grid voltage sags failure simulation device is mainly such as impedance manner, Technics of Power Electronic Conversion shape
The Voltage Drop controller (Voltage Sag Generator, abbreviation VSG) of formula and transformer-type.The VSG of impedance manner is tied
Structure is simple, develops and realizes conveniently.But its energy loss is big.The VSG scheme of Technics of Power Electronic Conversion form, form is more flexible, still
By the restriction of electronic switching device power, power grade is limited；It is at high cost using converters form simultaneously, it can
It is low by property, it controls complex.In addition, the VSG structure relative cost with transformer-type is high, for different grades of realization
New structure and cost are established by may require that, this is realized for the system for realizing different brackets, different faults simulation
Carry out relative difficulty.
Utility model content
The purpose of the utility model is to overcome the deficiencies in the prior art, provide a kind of grid voltage sags fault simulation dress
It sets and its control method, not only fault simulation can be carried out to different grades of load, but also structure is simple, it is low in cost.
To achieve the goals above, the technical solution adopted in the utility model are as follows:
Grid voltage sags failure simulation device, described device include single-chip microcontroller, power supply module, relay module, monolithic
Machine debugging interface, serial ports, the power supply module are connect with the single-chip microcontroller, relay module respectively, the control of the single-chip microcontroller
I/O pin is connect with the input terminal of the relay module, and the output end of the relay module and load connect, the monolithic
Machine is connect through serial ports with host computer, and the single-chip microcontroller is connected through single-chip microcontroller debugging interface with corresponding debugger, the power supply mould
Block is used to provide the DC power supply of 12V, 5V, 3.3V for simulator.
The power supply module includes DC power supply, the first voltage stabilizing chip, the second voltage stabilizing chip, the DC power supply with it is described
The input terminal of first voltage stabilizing chip connects, and the output end of first voltage stabilizing chip is connect with the input terminal of the second voltage stabilizing chip,
The DC power supply is used to provide 12V DC power supply for the first voltage stabilizing chip；First voltage stabilizing chip is used for 12V DC electricity
Source is converted to 5V DC power supply and exports to second voltage stabilizing chip；Second voltage stabilizing chip is used to turn 5V DC power supply
It is changed to 3.3V DC power supply and exports.
The model LM2940 of first voltage stabilizing chip, the input terminal of first voltage stabilizing chip respectively with the direct current
One end connection of power supply, conventional capacitive, the other end of the conventional capacitive are grounded through resistance R19, first voltage stabilizing chip
Output end is connect with the anode of the input terminal of second voltage stabilizing chip, polar capacitor respectively, the cathode warp of the polar capacitor
Resistance R19 ground connection, the model TPS7333 of second voltage stabilizing chip, No. 1 pin of second voltage stabilizing chip draw with No. 2
Foot is connected, and No. 3 pins are connected with No. 4 pins, No. 1 pin of second voltage stabilizing chip respectively with ground terminal, conventional capacitive
One end connection, No. 4 of the output end of the other end of the conventional capacitive and first voltage stabilizing chip, second voltage stabilizing chip
Pin connection, pin 6, pin 7, the pin 8 of second voltage stabilizing chip are steady through polar capacitor, resistance eutral grounding, described second
The pin 5 of pressure chip is connect through resistance with the pin 6 of second voltage stabilizing chip.
The output end of second voltage stabilizing chip is connect with filter circuit, and the filter circuit is by 12 conventional capacitives, 1
Polar capacitor parallel connection is formed, and the anode of the polar capacitor is connect with the output end of second voltage stabilizing chip, the polarity electricity
The cathode of appearance is grounded.
The DC power supply is connect through single-pole double-throw switch (SPDT) with filter circuit, the filter circuit by two conventional capacitives,
One polar capacitor parallel connection is formed, and the anode of the polar capacitor is connect with the DC power supply, the cathode of the polar capacitor
Ground connection.
The single-chip microcontroller is STM32 series monolithic, and the VDD_1-VDD_11 pin of the single-chip microcontroller is connected, the list
The VDD_1 pin of piece machine is connect with one end of the output end of second voltage stabilizing chip, conventional capacitive, the conventional capacitive it is another
One end ground connection, the VSS_1-VSS_11 pin of the single-chip microcontroller are grounded, and VDDA pin, the VREF+ pin of the single-chip microcontroller are equal
It is connect through resistance with the output end of second voltage stabilizing chip, the VSSA pin ground connection of the single-chip microcontroller, the single-chip microcontroller
The OSC_IN pin of VREF- pin resistance grounded, the single-chip microcontroller connects through resistance and the VCC pin of external crystal oscillator
It connects, the BOOT0 pin resistance grounded of the single-chip microcontroller, the NRST pin of the single-chip microcontroller is through resistance and the second pressure stabilizing core
The output end of piece connects, and the NRST pin of the single-chip microcontroller is also grounded through conventional capacitive, and the conventional capacitive is also parallel with wire jumper
Switch, one end of the jumper switch are connect with the NRST pin, the other end ground connection of the jumper switch, the single-chip microcontroller
PC14, PC15 pin connect respectively with the input, output end of crystal oscillator, the input, output end of the crystal oscillator is respectively through general
Logical capacity earth, the BOOT1 pin resistance grounded of the single-chip microcontroller, other pins of the single-chip microcontroller suspend.
The frequency of the crystal oscillator is 32.768KHZ.
The relay module includes relay, optocoupler, triode, diode, power resistor, the optocoupler input side one
End is connected through the control I/O pin of resistance and single-chip microcontroller.The optocoupler input side other end ground connection, optocoupler outlet side one end
It is connect respectively with the cathode of diode, the cathode of the diode is connect with the DC power supply, and the optocoupler outlet side is another
End is connected through the base stage of resistance and triode, the emitter of triode ground connection, the collector of the triode respectively with institute
State No. 1 pin connection of positive, the described relay of diode, the cathode of No. 2 pins and the diode of the relay
Connection, No. 3 pins of the relay are connect with one end of the power resistor, grid zero line respectively, the power resistor
The other end is connect with No. 5 pins of the relay, and No. 4 pins of the relay are connect through resistance with power grid firewire.
The single-chip microcontroller debugging interface is SWD/JTAG debugging interface, the nTRST pin of the debugging interface, TDI pin,
TMS pin, TDO pin are connect through the identical resistance of resistance value with the output end of second voltage stabilizing chip, the debugging interface
NTRST pin and the PB4 pin of single-chip microcontroller connect, the PA15 pin of the TDI pin of the debugging interface and single-chip microcontroller connects,
The PA13 pin of the TMS pin of the debugging interface and single-chip microcontroller connects, the TCK pin of the debugging interface and single-chip microcontroller
The connection of PA14 pin, the TDO pin of the debugging interface and the PB3 pin of single-chip microcontroller connect, the TCK pin of the debugging interface
Also through resistance value be 10K resistance eutral grounding, the Vref pin of the debugging interface respectively with the output end of second voltage stabilizing chip,
One end of conventional capacitive connects, the other end ground connection of the conventional capacitive, the Vsupply pin of the debugging interface with it is described
The output end of second voltage stabilizing chip connects, other pins of the debugging interface are grounded.
The simulator further includes light emitting diode, anode and second voltage stabilizing chip of the light emitting diode
Output end connection, the cathode resistance grounded of the light emitting diode.
It is controlled utility model has the advantages that the utility model is used based on ARM, utilizes relay output characteristics
The structure of design method, device design is simple, at low cost, highly reliable, highly-safe.The device not only can be controlled accurately in real time
The period of dip duration processed, Voltage Drop, and the different network voltage fault conditions for falling amplitude can be simulated.
Detailed description of the invention
Below to each width attached drawing of the utility model specification expression content and figure in label be briefly described:
Fig. 1-2 is the circuit diagram of the power supply module of the utility model failure simulation device；
Fig. 3 is the circuit diagram of the filter circuit of the second voltage stabilizing chip output end of the utility model failure simulation device；
Fig. 4 is the circuit diagram of the filter circuit of the DC power supply of the utility model failure simulation device；
Fig. 5-7 is that the pin of the single-chip microcontroller of the utility model failure simulation device connects circuit diagram；
Fig. 8 is the circuit diagram of the relay module of the utility model failure simulation device；
Fig. 9 is the circuit diagram of the single-chip microcontroller debugging interface of the utility model failure simulation device；
Figure 10 is the circuit diagram of the serial ports of the utility model failure simulation device；
Figure 11 is the circuit diagram of the light emitting diode of the utility model failure simulation device；
Figure 12 is the experimental waveform of the network voltage single-phase fault of the utility model simulation.
Appended drawing reference in figure is equal are as follows:
1, single-chip microcontroller；2, relay module；3, single-chip microcontroller debugging interface；4, serial ports；5, the first voltage stabilizing chip；6, second is steady
Press chip；7, light emitting diode.
Specific embodiment
Specific embodiment of the present utility model is made into one by the description to optimum embodiment below against attached drawing
Step detailed description.
As shown in Figure 1 to Figure 2, be the utility model Voltage Drop failure simulation device power supply module circuit diagram.?
In the embodiment, which includes DC power supply, the first voltage stabilizing chip 5, the second voltage stabilizing chip 6, the DC power supply with
The input terminal of first voltage stabilizing chip 5 connects, the input of the output end of first voltage stabilizing chip 5 and the second voltage stabilizing chip 6
End connection, the DC power supply are used to provide 12V DC power supply for the first voltage stabilizing chip 5；First voltage stabilizing chip 5 is used for will
12V DC power supply is converted to 5V DC power supply and exports to second voltage stabilizing chip 6；Second voltage stabilizing chip 6 is used for will
5V DC power supply is converted to 3.3V DC power supply and exports.
Further, the model LM2940 of first voltage stabilizing chip 5, the input terminal point of first voltage stabilizing chip 5
It not being connect with one end of the DC power supply, conventional capacitive, the other end of the conventional capacitive is grounded through resistance R19, and described
The output end of one voltage stabilizing chip 5 is connect with the anode of the input terminal of second voltage stabilizing chip 6, polar capacitor respectively, the pole
The cathode of property capacitor is grounded through resistance R19, the model TPS7333 of second voltage stabilizing chip 6, second voltage stabilizing chip 6
No. 1 pin be connected with No. 2 pins, No. 3 pins are connected with No. 4 pins, No. 1 pin of second voltage stabilizing chip 6 respectively with
One end connection of ground terminal, conventional capacitive, output end, the institute of the other end of the conventional capacitive and first voltage stabilizing chip 5
No. 4 pins connection of the second voltage stabilizing chip 6 is stated, pin 6, pin 7, the pin 8 of second voltage stabilizing chip 6 are electric through polarity
Hold, resistance eutral grounding, the pin 5 of second voltage stabilizing chip 6 is connect through resistance with the pin 6 of second voltage stabilizing chip 6.Its
In, pin 6, pin 7, the pin 8 of the second voltage stabilizing chip 6 are output end.
As shown in figure 3, in order to filter out the alternating component in DC power supply as far as possible, the output end of the second voltage stabilizing chip is equal
It is connected with filter circuit.Further, the output end of second voltage stabilizing chip 6 is connect with filter circuit, the filter circuit
It is formed by 12 conventional capacitives, 1 polar capacitor parallel connection, the anode of the polar capacitor and the output of second voltage stabilizing chip
End connection, the cathode ground connection of the polar capacitor, it is preferred that the capacitance of the conventional capacitive is 100nF, the polar capacitor
Capacitance be 10uF.
As shown in figure 4, in order to filter out the alternating component in DC power supply, the output end warp of the DC power supply as far as possible
Single-pole double-throw switch (SPDT) is also connected with filter circuit, and further, the filter circuit is by two conventional capacitives, a polar capacitor
Parallel connection is formed, and the anode of the polar capacitor is connect with the DC power supply, the cathode ground connection of the polar capacitor, it is preferred that
The capacitance of the conventional capacitive is respectively as follows: 100nF, 22uF, and the capacitance of the polar capacitor is 470uF.
As shown in Figures 5 to 7, be the utility model Voltage Drop failure simulation device single-chip microcontroller pin connection circuit
Figure.The single-chip microcontroller 1 is STM32 series monolithic, and the VDD_1-VDD_11 pin of the single-chip microcontroller 1 is connected, the monolithic
The VDD_1 pin of machine 1 is connect with one end of the output end of second voltage stabilizing chip 6, conventional capacitive, the conventional capacitive it is another
One end ground connection, the VSS_1-VSS_11 pin of the single-chip microcontroller 1 are grounded, VDDA pin, the VREF+ pin of the single-chip microcontroller 1
It is connect through resistance with the output end of second voltage stabilizing chip 6, the VSSA pin ground connection of the single-chip microcontroller 1, the single-chip microcontroller 1
VREF- pin resistance grounded, VCC pin of the OSC_IN pin of the single-chip microcontroller 1 through resistance and external crystal oscillator
The NRST pin of connection, the BOOT0 pin resistance grounded of the single-chip microcontroller 1, the single-chip microcontroller 1 is steady with described second through resistance
The output end connection of chip 6 is pressed, the NRST pin of the single-chip microcontroller 1 is also grounded through conventional capacitive, and the conventional capacitive is also in parallel
There is jumper switch, one end of the jumper switch is connect with the NRST pin, the other end ground connection of the jumper switch, described
PC14, PC15 pin of single-chip microcontroller 1 are connect with the input, output end of crystal oscillator respectively, the input, output end point of the crystal oscillator
It is not grounded through conventional capacitive, the BOOT1 pin resistance grounded of the single-chip microcontroller 1, other pins of the single-chip microcontroller 1 are outstanding
It sets.Preferably, the frequency of the crystal oscillator is 32.768KHZ.
As shown in figure 8, being the circuit diagram of the relay module of the utility model Voltage Drop failure simulation device.Further
, the relay module 2 includes relay, optocoupler, triode, diode, power resistor, load, the optocoupler input side
One end is connect through resistance with the control I/O pin of single-chip microcontroller 1.The optocoupler input side other end ground connection, the optocoupler outlet side
One end is connect with the cathode of diode respectively, and the cathode of the diode is connect with the DC power supply, the optocoupler outlet side
The other end is connected through the base stage of resistance and triode, the emitter ground connection of the triode, the collector difference of the triode
It is connect with No. 1 pin of positive, the described relay of the diode, No. 2 pins and the diode of the relay
No. 3 pins of cathode connection, the relay are connect through the load with power grid firewire, and the pin 4 of the relay is electric respectively
One end connection of net zero curve, power resistor, the other end of power resistor are connect with pin 5.Preferably, the model of shown relay
For JQX-62F-2Z.Using this connection type, the switching between different loads may be implemented, relay is led under normal circumstances
Logical, the output pin 3 of relay be connected to 4 at this time, can be by the programming software of host computer, the on-off of control pin 5, when drawing
When foot 5 is connected to pin 4, power resistor and load in series, are loaded by the resistance value and replacement that change power resistor at this time, can
So that getting the voltage of different amplitudes in load, it is only necessary to the external equipments such as oscillograph are connected to load both ends, so that it may examine
Measure different amplitudes, various durations, different cycles Voltage Drop waveform, convenient is subsequent increase voltage compensating device.
Wherein, using the on-off of host computer programming Control relay pin 5, belong to the prior art, the improvement of the utility model is more main
That wants concentrates in hardware connection.
As shown in figure 9, being the circuit diagram of the single-chip microcontroller debugging interface of the utility model Voltage Drop failure simulation device.Institute
Stating single-chip microcontroller debugging interface 3 is SWD/JTAG debugging interface matched with STM32 series monolithic, the debugging interface 3
The output of nTRST pin, TDI pin, TMS pin, TDO pin through resistance and second voltage stabilizing chip that resistance value is 10K
The PB4 pin of end connection, the nTRST pin of the debugging interface 3 and single-chip microcontroller connects, the TDI pin of the debugging interface 3 with
The PA15 pin of single-chip microcontroller connects, and the TMS pin of the debugging interface 3 and the PA13 pin of single-chip microcontroller connect, and the debugging connects
The TCK pin of mouth 3 and the PA14 pin of single-chip microcontroller connect, and the TDO pin of the debugging interface 3 and the PB3 pin of single-chip microcontroller connect
It connects, the resistance eutral grounding that the TCK pin of the debugging interface 3 is also 10K through resistance value, the Vref pin difference of the debugging interface 3
It is connect with one end of the output end of second voltage stabilizing chip, conventional capacitive, the other end ground connection of the conventional capacitive, the tune
The Vsupply pin of mouth 3 of trying is connect with the output end of second voltage stabilizing chip 6, other pins of the debugging interface
It is grounded.The effect of SWD/JTAG debugging interface 3 is to be attached single-chip microcontroller 1 with debugger, can be downloaded by debugger
The driver of single-chip microcontroller can also carry out software debugging to single-chip microcontroller, and after the completion of debugging, single-chip microcontroller could work.Wherein, single
The driver of piece machine belongs to the prior art, carries out the conventional means that software debugging also belongs to this field to single-chip microcontroller.
As shown in Figure 10, be the utility model Voltage Drop failure simulation device serial ports circuit diagram.The number of serial ports 4
Amount is two, and the pin 1 of one of serial ports 4 is connect with the output end of second voltage stabilizing chip, pin 2 and the single-chip microcontroller
The connection of RXD1 pin, pin 3 connect with the TXD1 pin of the single-chip microcontroller 1, the ground connection of pin 4, the pin of another serial ports 4
1 connect with the output end of second voltage stabilizing chip 6, and pin 2 is connect with the RXD2 pin of the single-chip microcontroller 1, pin 3 with it is described
The TXD2 pin of single-chip microcontroller 1 connects, and pin 4 is grounded；In addition, this serial ports 4 is connect with the USB port of host computer, pass through this serial ports
4, the data transmission between single-chip microcontroller and host computer may be implemented.
As shown in figure 11, be the utility model Voltage Drop failure simulation device light emitting diode 7 circuit diagram.It is described
The anode of light emitting diode 7 is connect with the output end of second voltage stabilizing chip, and the cathode of the light emitting diode 7 connects through resistance
Ground.The light emitting diode 7 shines when connecting the power supply of 3.3v, so, which can be used to examine this reality
Whether worked normally with the power supply module in novel.
It as shown in figure 12, is the experimental waveform for the network voltage single-phase fault that the utility model is simulated.By that can be seen in figure
Out, the voltage for loading both ends has occurred Voltage Drop failure, and experimental waveform simulation is that the amplitude of the Voltage Drop is 50%, holds
Continuous time 90ms, the situation that the period is 2s.The load of the resistance value, the different resistance values of replacement of regulation power resistance, can simulate difference
Fall amplitude, various durations, different cycles single-phase voltage fall failure.
Obvious the utility model specific implementation is not subject to the restrictions described above, as long as the method for using the utility model
The improvement for the various unsubstantialities that conception and technical scheme carry out, both is within the protection scope of the present invention.
Claims (10)
1. a kind of grid voltage sags failure simulation device, it is characterised in that: described device include single-chip microcontroller (1), power supply module,
Relay module (2), single-chip microcontroller debugging interface (3), serial ports (4), the power supply module respectively with the single-chip microcontroller (1), relay
Device module (2) connection, the control I/O pin of the single-chip microcontroller (1) is connect with the input terminal of the relay module (2), described
The output end of relay module (2) and load connect, and the single-chip microcontroller (1) connect through serial ports (4) with host computer, the single-chip microcontroller
(1) connected through single-chip microcontroller debugging interface (3) and corresponding debugger, the power supply module be used to provide for simulator 12V,
The DC power supply of 5V, 3.3V.
2. grid voltage sags failure simulation device according to claim 1, it is characterised in that: the power supply module includes
DC power supply, the first voltage stabilizing chip (5), the second voltage stabilizing chip (6), the DC power supply and first voltage stabilizing chip (5)
Input terminal connection, the output end of first voltage stabilizing chip (5) are connect with the input terminal of the second voltage stabilizing chip (6), the direct current
Power supply is used to provide 12V DC power supply for the first voltage stabilizing chip (5)；First voltage stabilizing chip (5) is used for 12V DC power supply
It is converted to 5V DC power supply and exports to second voltage stabilizing chip (6)；Second voltage stabilizing chip (6) is used for 5V direct current
Source is converted to 3.3V DC power supply and exports.
3. grid voltage sags failure simulation device according to claim 2, it is characterised in that: first voltage stabilizing chip
(5) model LM2940, the input terminal of first voltage stabilizing chip (5) respectively with the DC power supply, conventional capacitive one
End connection, the other end of the conventional capacitive is grounded through resistance R19, the output end of first voltage stabilizing chip (5) respectively with institute
The anode connection of the input terminal, polar capacitor of the second voltage stabilizing chip (6) is stated, the cathode of the polar capacitor is grounded through resistance R19,
The model TPS7333 of second voltage stabilizing chip (6), No. 1 pin of second voltage stabilizing chip (6) are connected with No. 2 pins,
No. 3 pins are connected with No. 4 pins, No. 1 pin of second voltage stabilizing chip (6) one end with ground terminal, conventional capacitive respectively
Connection, the 4 of the output end of the other end of the conventional capacitive and first voltage stabilizing chip (5), second voltage stabilizing chip (6)
The connection of number pin, the pin 6 of second voltage stabilizing chip (6), pin 7, pin 8 are through polar capacitor, resistance eutral grounding, and described the
The pin 5 of two voltage stabilizing chips (6) is connect through resistance with the pin 6 of second voltage stabilizing chip (6).
4. grid voltage sags failure simulation device according to claim 3, it is characterised in that: second voltage stabilizing chip
(6) output end is connect with filter circuit, and the filter circuit is formed by 12 conventional capacitives, 1 polar capacitor parallel connection, described
The anode of polar capacitor is connect with the output end of second voltage stabilizing chip (6), the cathode ground connection of the polar capacitor.
5. grid voltage sags failure simulation device according to claim 4, it is characterised in that: the DC power supply is through list
Double-pole double throw switch is connect with filter circuit, and the filter circuit is formed by two conventional capacitives, a polar capacitor parallel connection, described
The anode of polar capacitor is connect with the DC power supply, the cathode ground connection of the polar capacitor.
6. grid voltage sags failure simulation device according to any one of claims 2 to 5, it is characterised in that: the list
Piece machine (1) is STM32 series monolithic, and the VDD_1-VDD_11 pin of the single-chip microcontroller (1) is connected, the single-chip microcontroller (1)
VDD_1 pin connect with one end of the output end of second voltage stabilizing chip (6), conventional capacitive, the conventional capacitive it is another
One end ground connection, the VSS_1-VSS_11 pin of the single-chip microcontroller (1) are grounded, VDDA pin, the VREF+ of the single-chip microcontroller (1)
Pin is connect through resistance with the output end of second voltage stabilizing chip (6), the VSSA pin ground connection of the single-chip microcontroller (1), institute
The VREF- pin resistance grounded of single-chip microcontroller is stated, the OSC_IN pin of the single-chip microcontroller (1) is through resistance and external crystal oscillator
VCC pin connection, the BOOT0 pin resistance grounded of the single-chip microcontroller (1), the NRST pin of the single-chip microcontroller (1) is through electricity
Resistance is connect with the output end of second voltage stabilizing chip (6), and the NRST pin of the single-chip microcontroller (1) is also grounded through conventional capacitive,
The conventional capacitive is also parallel with jumper switch, and one end of the jumper switch is connect with the NRST pin, and the wire jumper is opened
The other end of pass is grounded, and PC14, PC15 pin of the single-chip microcontroller (1) are connect with the input, output end of crystal oscillator respectively, described
The input, output end of crystal oscillator is grounded through conventional capacitive respectively, the BOOT1 pin resistance grounded of the single-chip microcontroller (1), described
Other pins of single-chip microcontroller (1) suspend.
7. grid voltage sags failure simulation device according to claim 6, it is characterised in that: the frequency of the crystal oscillator is
32.768KHZ。
8. grid voltage sags failure simulation device according to claim 7, it is characterised in that: the relay module
It (2) include relay, optocoupler, triode, diode, power resistor, optocoupler input side one end is through resistance and single-chip microcontroller (1)
Control I/O pin connection；The optocoupler input side other end ground connection, optocoupler outlet side one end are negative with diode respectively
Pole connection, the cathode of the diode are connect with the DC power supply, and the optocoupler outlet side other end is through resistance and triode
Base stage connection, the triode emitter ground connection, the collector of the triode respectively with the anode of the diode, institute
No. 1 pin connection of relay is stated, No. 2 pins of the relay are connect with the cathode of the diode, and the 3 of the relay
Number pin is connect with one end of the power resistor, grid zero line respectively, the other end of the power resistor and the relay
The connection of No. 5 pins, No. 4 pins of the relay connect through resistance with power grid firewire.
9. grid voltage sags failure simulation device according to claim 8, it is characterised in that: the single-chip microcontroller debugging connects
Mouth (3) is SWD/JTAG debugging interface, and nTRST pin, TDI pin, TMS pin, the TDO pin of the debugging interface (3) are equal
It is connect through the identical resistance of resistance value with the output end of second voltage stabilizing chip, the nTRST pin and list of the debugging interface (3)
The PB4 pin of piece machine (1) connects, and the TDI pin of the debugging interface (3) is connect with the PA15 pin of single-chip microcontroller (1), the tune
The TMS pin of mouth (3) of trying is connect with the PA13 pin of single-chip microcontroller (1), the TCK pin and single-chip microcontroller of the debugging interface (3)
(1) PA14 pin connection, the TDO pin of the debugging interface (3) and the PB3 pin of single-chip microcontroller connect, the debugging interface
(3) resistance eutral grounding that TCK pin is also 10K through resistance value, the Vref pin of the debugging interface (3) are steady with described second respectively
Press one end connection of the output end, conventional capacitive of chip (6), the other end ground connection of the conventional capacitive, the debugging interface (3)
Vsupply pin connect with the output end of second voltage stabilizing chip (6), other pins of the debugging interface (3) connect
Ground.
10. grid voltage sags failure simulation device according to claim 9, it is characterised in that: the simulator is also
Including light emitting diode (7), the anode of the light emitting diode (7) is connect with the output end of second voltage stabilizing chip (6), institute
State the cathode resistance grounded of light emitting diode (7).
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| CN109283415A (en) * | 2018-11-16 | 2019-01-29 | 安徽工程大学 | A kind of grid voltage sags failure simulation device and its control method |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109283415A (en) * | 2018-11-16 | 2019-01-29 | 安徽工程大学 | A kind of grid voltage sags failure simulation device and its control method |
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