CN209199924U - 高压功率模块封装结构 - Google Patents

高压功率模块封装结构 Download PDF

Info

Publication number
CN209199924U
CN209199924U CN201822148973.6U CN201822148973U CN209199924U CN 209199924 U CN209199924 U CN 209199924U CN 201822148973 U CN201822148973 U CN 201822148973U CN 209199924 U CN209199924 U CN 209199924U
Authority
CN
China
Prior art keywords
layer
copper
chip
ceramic
power module
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201822148973.6U
Other languages
English (en)
Inventor
杨英杰
梁琳
颜辉
陈雪筠
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Changzhou Ruihua Amperex Technology Ltd
Original Assignee
Changzhou Ruihua Amperex Technology Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Changzhou Ruihua Amperex Technology Ltd filed Critical Changzhou Ruihua Amperex Technology Ltd
Priority to CN201822148973.6U priority Critical patent/CN209199924U/zh
Application granted granted Critical
Publication of CN209199924U publication Critical patent/CN209199924U/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

本实用新型涉及封装技术领域，特别是一种高压功率模块封装结构，包括若干芯片、输出端子和基板，所述芯片通过焊料层焊接固定在覆铜陶瓷板上；所述芯片之间通过键合引线相连，所述芯片通过键合引线与输出端子相连接；所述覆铜陶瓷板固定在基板上，所述芯片、输出端子、覆铜陶瓷板和基板外侧设置通过树脂密封层灌封。采用上述结构后，本实用新型摒弃了原先单层陶瓷层的结构，将其二等分并加入金属铜层，金属铜层的引入使原先在顶层和底层铜与陶瓷层的交接面处电场强度减弱，同时减小了由陶瓷层带来的寄生电容。

Description

高压功率模块封装结构
技术领域
本实用新型涉及封装技术领域，特别是一种高压功率模块封装结构。
背景技术
随着数十兆瓦功率变换器实现兆伏电机调速，固态变压器实现配电网及输电线路潮流控制等现代电力电子技术的兴起，高压全控器件开始进入人们的视野。但是，功率器件不断升高的额定电压以及更轻薄的芯片结构对器件封装提出了严峻的挑战。传统硅器件的功率封装结构解决方案已无法承载新兴器件的各种优点，封装技术成为了限制其优点的短板之一。
高压功率模块封装的设计除了涉及到电、热、机械性能的综合考虑外，还要考虑模块封装的最高耐压。早在2004年，ABB公司就推出了针对6.5kV IGBT的高压工业标准封装，随后英飞凌、中国中车等公司也相继推出了6.5kV电压等级的功率模块。随着碳化硅功率器件的兴起，富士电机、美国科锐公司在近两年也推出了相同甚至更高电压等级的碳化硅功率模块。由于高压碳化硅芯片仍未商业化，对模块规格和技术性能了解十分有限，导致国内外关于高压碳化硅功率模块的研究都较少。
在高压领域，模块封装的设计更多考虑电场击穿现象。首先，封装内部无法避免电场不均匀分布带来的电场集中现象，当电场强度超过绝缘介质击穿场强，介质就会发生击穿，产生局部放电的现象甚至损坏整个器件；其次，若各接触面的热匹配系数相差较大，在较大的热应力下产生变形就会形成空洞，空洞里的空气击穿场强仅有3kV/mm，很容易发生局部放电，另外，密封材料在灌封过程中也会产生空洞。
中国实用新型专利CN 207354068 U公开了一种IGBT功率模块及包含其的功率模组，包括多个IGBT功率模块子模块和两个冷却基板，多个IGBT功率模块子模块沿冷却基板的长度方向按照预定间隔布置并通过封装体封装在两个冷却基板之间，冷却基板包括第一冷却基板和第二冷却基板，第一冷却基板和第二冷却基板在不与 IGBT功率模块子模块接触的表面上形成有由多个突起构成的冷却部，并且第一冷却基板和第二冷却基板分别在两端开设有相互连通以分别构成第一导水口和第二导水口的开口。虽然，对比文件能够提高散热效率，但是无法减少电场集中现象。
发明内容
本实用新型需要解决的技术问题是提供一种能有效减少电场集中现象使其分布均匀的高压功率模块封装结构。
为解决上述技术问题，本实用新型的高压功率模块封装结构，包括若干芯片、输出端子和基板，所述芯片通过焊料层焊接固定在覆铜陶瓷板上；所述芯片之间通过键合引线相连，所述芯片通过键合引线与输出端子相连接；所述覆铜陶瓷板固定在基板上，所述芯片、输出端子、覆铜陶瓷板和基板外侧设置通过树脂密封层灌封。
优选的，所述覆铜陶瓷板包括从上至下依次连接的顶部铜层、上部陶瓷层、中间铜层、下部陶瓷层和底部铜层，所述中间铜层厚度分别小于顶部铜层和底部铜层的厚度；所述顶部铜层为芯片提供流通路径，所述底部铜层与基板固定连接。
优选的，所述中间铜层切割为若干等分。
优选的，所述下部陶瓷层和上部陶瓷层厚度相同。
优选的，所述上部陶瓷层和下部陶瓷层的材料为氧化铝或氮化铝。
采用上述结构后，本实用新型摒弃了原先单层陶瓷层的结构，将其二等分并加入金属铜层，金属铜层的引入使原先在顶层和底层铜与陶瓷层的交接面处电场强度减弱，同时减小了由陶瓷层带来的寄生电容。
附图说明
下面结合附图和具体实施方式对本实用新型作进一步详细的说明。
图1为本实用新型高压功率模块封装结构的结构示意图。
图2为本实用新型覆铜陶瓷板的分解示意图。
图3为现有技术中电场强度仿真结果示意图。
图4为本实用新型电场强度仿真结果示意图。
图中：1为基板，2为底部铜层，3为下部陶瓷层，4为中间铜层，5为输出端子，6为顶部铜层，7为焊料层，8为键合引线，9为上部陶瓷层，10为芯片，11为树脂密封层。
具体实施方式
如图1所示，本实用新型的高压功率模块封装结构，包括若干芯片10、输出端子5和基板1，所述芯片10通过焊料层7焊接固定在覆铜陶瓷板上。所述芯片10之间通过键合引线8相连，所述芯片10通过键合引线与输出端子5相连接；所述覆铜陶瓷板固定在基板2上，所述芯片10、输出端子5、覆铜陶瓷板和基板2外侧设置通过树脂密封层11灌封。本实用新型的功率模块包含覆铜陶瓷板，覆铜陶瓷板在模块当中扮演至关重要的角色，承担着主要的热传递、电气绝缘以及机械支撑作用。
如图2所示，所述覆铜陶瓷板包括从上至下依次连接的顶部铜层6、上部陶瓷层9、中间铜层4、下部陶瓷层3和底部铜层2，所述中间铜层4厚度分别小于顶部铜层6和底部铜层2的厚度。所述顶部铜层为为功率电路布线图，为芯片提供流通路径。所述底部铜层2与基板1固定连接，增强了自上而下的热扩散，中间为两层同样厚度的陶瓷层，并在中间加入一层较薄的中间铜层4。这样摒弃了原先单层陶瓷层的结构，将其二等分并加入中间铜层，中间铜层的引入使原先在顶部铜层6和底部铜层2与陶瓷层的交接面处电场强度减弱，同时减小了由陶瓷层带来的寄生电容。如图2所示，为了避免由于热失配导致薄片形变弯曲，所述中间铜层切割为若干等分，从而减小其形变的幅度。
将图3和图4对比可得，在相同的陶瓷层厚度下，本实用新型的功率模块能承受比原先更高的绝缘电压，或在相同的耐压等级下，由于陶瓷层厚度的减小，该功率模块的热阻得以降低。
本实用新型为中高压的功率模块，由芯片制造厂制造的裸芯片焊接在覆铜陶瓷板上，芯片上表面通过引线键合的方式将芯片焊盘与输出端子连接。在芯片模块焊接完成后，在加装外壳之前要先用密封材料将模块覆盖，以防止芯片受潮辐射老化等现象出现。如图1所示，本实用新型核心部分的覆铜陶瓷板，作为导热与绝缘的关键部件，所述上部陶瓷层和下部陶瓷层的材料为氧化铝或氮化铝，优选氮化铝。
虽然以上描述了本实用新型的具体实施方式，但是本领域熟练技术人员应当理解，这些仅是举例说明，可以对本实施方式作出多种变更或修改，而不背离本实用新型的原理和实质，本实用新型的保护范围仅由所附权利要求书限定。

Claims (5)

1.一种高压功率模块封装结构，包括若干芯片、输出端子和基板，其特征在于：所述芯片通过焊料层焊接固定在覆铜陶瓷板上；所述芯片之间通过键合引线相连，所述芯片通过键合引线与输出端子相连接；所述覆铜陶瓷板固定在基板上，所述芯片、输出端子、覆铜陶瓷板和基板外侧设置通过树脂密封层灌封。
2.按照权利要求1所述的高压功率模块封装结构，其特征在于：所述覆铜陶瓷板包括从上至下依次连接的顶部铜层、上部陶瓷层、中间铜层、下部陶瓷层和底部铜层，所述中间铜层厚度分别小于顶部铜层和底部铜层的厚度；所述顶部铜层为芯片提供流通路径，所述底部铜层与基板固定连接。
3.按照权利要求2所述的高压功率模块封装结构，其特征在于：所述中间铜层切割为若干等分。
4.按照权利要求2所述的高压功率模块封装结构，其特征在于：所述下部陶瓷层和上部陶瓷层厚度相同。
5.按照权利要求1所述的高压功率模块封装结构，其特征在于：所述上部陶瓷层和下部陶瓷层的材料为氧化铝或氮化铝。
CN201822148973.6U 2018-12-19 2018-12-19 高压功率模块封装结构 Active CN209199924U (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201822148973.6U CN209199924U (zh) 2018-12-19 2018-12-19 高压功率模块封装结构

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201822148973.6U CN209199924U (zh) 2018-12-19 2018-12-19 高压功率模块封装结构

Publications (1)

Publication Number Publication Date
CN209199924U true CN209199924U (zh) 2019-08-02

Family

ID=67429835

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201822148973.6U Active CN209199924U (zh) 2018-12-19 2018-12-19 高压功率模块封装结构

Country Status (1)

Country Link
CN (1) CN209199924U (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109509744A (zh) * 2018-12-19 2019-03-22 常州瑞华新能源科技有限公司 高压功率模块封装结构

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109509744A (zh) * 2018-12-19 2019-03-22 常州瑞华新能源科技有限公司 高压功率模块封装结构
CN109509744B (zh) * 2018-12-19 2024-05-28 常州瑞华新能源科技有限公司 高压功率模块封装结构

Similar Documents

Publication Publication Date Title
CN103311193B (zh) 半导体功率模块封装结构及其制备方法
CN104282641B (zh) 半导体装置
US8664755B2 (en) Power module package and method for manufacturing the same
CN110246835B (zh) 一种三维集成高压碳化硅模块封装结构
CN104067388B (zh) 带散热鳍片的半导体模块
CN113345871B (zh) 一种低寄生电感串联功率模块
CN101494175B (zh) 一种三层立体功率封装方法及其结构
CN110506330A (zh) 功率电子模块以及包含该模块的电功率变换器
JP2015046476A (ja) 電力用半導体装置およびその製造方法
CN103928447B (zh) 一种大功率全气密半导体模块封装结构
CN109509744A (zh) 高压功率模块封装结构
CN209199924U (zh) 高压功率模块封装结构
CN104218031B (zh) 母排联接式高性能igbt模块及其制作方法
CN104217966A (zh) 包括两个基板的功率模块及其制造方法
CN203746828U (zh) 一种高频大功率碳化硅mosfet模块
CN110265385B (zh) 一种功率器件的封装结构及其制造方法
CN114551381B (zh) 一种嵌入式双面散热mosfet模块封装结构
CN212848360U (zh) 一种适用于高压功率模块的覆铜陶瓷板
CN114649217A (zh) 一种To-247低热阻高速绝缘封装方法
JP2023541621A (ja) パワーモジュール及びその製造方法、コンバータ、並びに電子機器
CN218996706U (zh) 一种铜带键合的环氧塑封车用功率模块封装结构
CN204558445U (zh) 半导体封装结构
TWI755087B (zh) Igbt模組封裝結構
CN220400580U (zh) 高效散热单元式分立器件
CN212209492U (zh) 功率模块

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant