CN109509744B - 高压功率模块封装结构 - Google Patents

高压功率模块封装结构 Download PDF

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CN109509744B
CN109509744B CN201811555703.5A CN201811555703A CN109509744B CN 109509744 B CN109509744 B CN 109509744B CN 201811555703 A CN201811555703 A CN 201811555703A CN 109509744 B CN109509744 B CN 109509744B
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substrate
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杨英杰
梁琳
颜辉
陈雪筠
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CHANGZHOU RUIHUA POWER ELECTRONIC DEVICES CO LTD
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

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Abstract

本发明涉及封装技术领域，特别是一种高压功率模块封装结构，包括若干芯片、输出端子和基板，所述芯片通过焊料层焊接固定在覆铜陶瓷板上；所述芯片之间通过键合引线相连，所述芯片通过键合引线与输出端子相连接；所述覆铜陶瓷板固定在基板上，所述芯片、输出端子、覆铜陶瓷板和基板外侧设置通过树脂密封层灌封。采用上述结构后，本发明摒弃了原先单层陶瓷层的结构，将其二等分并加入金属铜层，金属铜层的引入使原先在顶层和底层铜与陶瓷层的交接面处电场强度减弱，同时减小了由陶瓷层带来的寄生电容。

Description

高压功率模块封装结构
技术领域
本发明涉及封装技术领域，特别是一种高压功率模块封装结构。
背景技术
随着数十兆瓦功率变换器实现兆伏电机调速，固态变压器实现配电网及输电线路潮流控制等现代电力电子技术的兴起，高压全控器件开始进入人们的视野。但是，功率器件不断升高的额定电压以及更轻薄的芯片结构对器件封装提出了严峻的挑战。传统硅器件的功率封装结构解决方案已无法承载新兴器件的各种优点，封装技术成为了限制其优点的短板之一。
高压功率模块封装的设计除了涉及到电、热、机械性能的综合考虑外，还要考虑模块封装的最高耐压。早在2004年，ABB公司就推出了针对6.5kV IGBT的高压工业标准封装，随后英飞凌、中国中车等公司也相继推出了6.5kV电压等级的功率模块。随着碳化硅功率器件的兴起，富士电机、美国科锐公司在近两年也推出了相同甚至更高电压等级的碳化硅功率模块。由于高压碳化硅芯片仍未商业化，对模块规格和技术性能了解十分有限，导致国内外关于高压碳化硅功率模块的研究都较少。
在高压领域，模块封装的设计更多考虑电场击穿现象。首先，封装内部无法避免电场不均匀分布带来的电场集中现象，当电场强度超过绝缘介质击穿场强，介质就会发生击穿，产生局部放电的现象甚至损坏整个器件；其次，若各接触面的热匹配系数相差较大，在较大的热应力下产生变形就会形成空洞，空洞里的空气击穿场强仅有3kV/mm，很容易发生局部放电，另外，密封材料在灌封过程中也会产生空洞。
中国实用新型专利CN 207354068 U公开了一种IGBT功率模块及包含其的功率模组，包括多个IGBT功率模块子模块和两个冷却基板，多个IGBT功率模块子模块沿冷却基板的长度方向按照预定间隔布置并通过封装体封装在两个冷却基板之间，冷却基板包括第一冷却基板和第二冷却基板，第一冷却基板和第二冷却基板在不与 IGBT功率模块子模块接触的表面上形成有由多个突起构成的冷却部，并且第一冷却基板和第二冷却基板分别在两端开设有相互连通以分别构成第一导水口和第二导水口的开口。虽然，对比文件能够提高散热效率，但是无法减少电场集中现象。
发明内容
本发明需要解决的技术问题是提供一种能有效减少电场集中现象使其分布均匀的高压功率模块封装结构。
为解决上述技术问题，本发明的高压功率模块封装结构，包括若干芯片、输出端子和基板，所述芯片通过焊料层焊接固定在覆铜陶瓷板上；所述芯片之间通过键合引线相连，所述芯片通过键合引线与输出端子相连接；所述覆铜陶瓷板固定在基板上，所述芯片、输出端子、覆铜陶瓷板和基板外侧设置通过树脂密封层灌封。
优选的，所述覆铜陶瓷板包括从上至下依次连接的顶部铜层、上部陶瓷层、中间铜层、下部陶瓷层和底部铜层，所述中间铜层厚度分别小于顶部铜层和底部铜层的厚度；所述顶部铜层为芯片提供流通路径，所述底部铜层与基板固定连接。
优选的，所述中间铜层切割为若干等分。
优选的，所述下部陶瓷层和上部陶瓷层厚度相同。
优选的，所述上部陶瓷层和下部陶瓷层的材料为氧化铝或氮化铝。
采用上述结构后，本发明摒弃了原先单层陶瓷层的结构，将其二等分并加入金属铜层，金属铜层的引入使原先在顶层和底层铜与陶瓷层的交接面处电场强度减弱，同时减小了由陶瓷层带来的寄生电容。
附图说明
下面结合附图和具体实施方式对本发明作进一步详细的说明。
图1为本发明高压功率模块封装结构的结构示意图。
图2为本发明覆铜陶瓷板的分解示意图。
图3为现有技术中电场强度仿真结果示意图。
图4为本发明电场强度仿真结果示意图。
图中：1为基板，2为底部铜层，3为下部陶瓷层，4为中间铜层，5为输出端子，6为顶部铜层，7为焊料层，8为键合引线，9为上部陶瓷层，10为芯片，11为树脂密封层。
具体实施方式
如图1所示，本发明的高压功率模块封装结构，包括若干芯片10、输出端子5和基板1，所述芯片10通过焊料层7焊接固定在覆铜陶瓷板上。所述芯片10之间通过键合引线8相连，所述芯片10通过键合引线与输出端子5相连接；所述覆铜陶瓷板固定在基板2上，所述芯片10、输出端子5、覆铜陶瓷板和基板2外侧设置通过树脂密封层11灌封。本发明的功率模块包含覆铜陶瓷板，覆铜陶瓷板在模块当中扮演至关重要的角色，承担着主要的热传递、电气绝缘以及机械支撑作用。
如图2所示，所述覆铜陶瓷板包括从上至下依次连接的顶部铜层6、上部陶瓷层9、中间铜层4、下部陶瓷层3和底部铜层2，所述中间铜层4厚度分别小于顶部铜层6和底部铜层2的厚度。所述顶部铜层为为功率电路布线图，为芯片提供流通路径。所述底部铜层2与基板1固定连接，增强了自上而下的热扩散，中间为两层同样厚度的陶瓷层，并在中间加入一层较薄的中间铜层4。这样摒弃了原先单层陶瓷层的结构，将其二等分并加入中间铜层，中间铜层的引入使原先在顶部铜层6和底部铜层2与陶瓷层的交接面处电场强度减弱，同时减小了由陶瓷层带来的寄生电容。如图2所示，为了避免由于热失配导致薄片形变弯曲，所述中间铜层切割为若干等分，从而减小其形变的幅度。
将图3和图4对比可得，在相同的陶瓷层厚度下，本发明的功率模块能承受比原先更高的绝缘电压，或在相同的耐压等级下，由于陶瓷层厚度的减小，该功率模块的热阻得以降低。
本发明为中高压的功率模块，由芯片制造厂制造的裸芯片焊接在覆铜陶瓷板上，芯片上表面通过引线键合的方式将芯片焊盘与输出端子连接。在芯片模块焊接完成后，在加装外壳之前要先用密封材料将模块覆盖，以防止芯片受潮辐射老化等现象出现。如图1所示，本发明核心部分的覆铜陶瓷板，作为导热与绝缘的关键部件，所述上部陶瓷层和下部陶瓷层的材料为氧化铝或氮化铝，优选氮化铝。
虽然以上描述了本发明的具体实施方式，但是本领域熟练技术人员应当理解，这些仅是举例说明，可以对本实施方式作出多种变更或修改，而不背离本发明的原理和实质，本发明的保护范围仅由所附权利要求书限定。

Claims (2)

1.一种高压功率模块封装结构，包括若干芯片、输出端子和基板，其特征在于：所述芯片通过焊料层焊接固定在覆铜陶瓷板上；所述芯片之间通过键合引线相连，所述芯片通过键合引线与输出端子相连接；所述覆铜陶瓷板固定在基板上，所述芯片、输出端子、覆铜陶瓷板和基板外侧设置通过树脂密封层灌封；
所述覆铜陶瓷板包括从上至下依次连接的顶部铜层、上部陶瓷层、中间铜层、下部陶瓷层和底部铜层；所述顶部铜层为芯片提供流通路径，所述底部铜层与基板固定连接；
所述中间铜层厚度分别小于顶部铜层和底部铜层的厚度；
所述中间铜层切割为若干等分；
所述上部陶瓷层和下部陶瓷层的材料为氧化铝或氮化铝。
2.按照权利要求1所述的高压功率模块封装结构，其特征在于：所述下部陶瓷层和上部陶瓷层厚度相同。
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CN110034664A (zh) * 2019-05-06 2019-07-19 深圳市汇北川电子技术有限公司 一种sic电动汽车的功率模组
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