CN209016067U - Cell piece - Google Patents
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- CN209016067U CN209016067U CN201821371424.9U CN201821371424U CN209016067U CN 209016067 U CN209016067 U CN 209016067U CN 201821371424 U CN201821371424 U CN 201821371424U CN 209016067 U CN209016067 U CN 209016067U
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Abstract
The utility model discloses a kind of cell pieces, comprising: silicon substrate, the silicon substrate include light-receiving surface and phototropic face；The shady face of the silicon substrate is equipped with first electrode type doped layer, and the first electrode type doped layer is identical as the doping type of the silicon substrate；The lower surface of the first electrode type doped layer includes for exposing the exposed area of the part first electrode type doped layer and being provided with the doped region of second electrode type doped layer；The surface of the exposed area of the first electrode type doped layer is provided with the first electrode for extracted current, and the surface of the doped region of the second electrode type doped layer is provided with the second electrode for extracted current.The cell piece of the utility model only needs an exposure mask, can form full back contact battery, and significantly less operating procedure reduces production cost.
Description
Technical field
The present invention relates to battery technology fields, in particular to a kind of cell piece.
Background technique
In traditional solar battery, emitter contact electrode and base stage contact electrode are being produced in cell piece just
Face and the back side, wherein the electrode fabrication of contact emitter is in the one side exposed to sunlight, therefore the part of the surface of battery is golden
Belong to covering, this part shading-area cannot participate in absorbing incident sunlight, cause a part of optical loss.In order to reduce shading
Partly or completely gate line electrode, can be produced on the back side of cell piece by loss.It reaches its maturity and competes in photovoltaic technology
Huge today, such high efficiency technical are particularly important.Staggeredly the design of back contacts (IBC) battery meets modern efficient technology
Demand represents following photovoltaic technology developing direction.The electrode of the battery is entirely located in the back side of battery, arranges in interdigitated
Column, improve the output power of cell conversion efficiency and component, are minimized battery to the loss of component (CTM).
Compared with conventional solar cell production, conventional IBC solar cell making process needs to mix p-type and N-type
Miscellaneous region is formed subregion on the same back side of crystal silicon silicon substrate.Thermal diffusion is usually used under conditions of exposure mask is protected
The method of doping is initially formed p-type (or N-type) doped region, then removes first time exposure mask, forms N after making second of exposure mask
Type (or p-type) doped region, then makes passivation layer, and electrode layer eventually forms complete solar battery.
There are following several big disadvantages for the said goods: one, complex process.Conventional IBC battery production is at least through exposure mask twice
And diffusion process, to form subregion doping, it is three or four times of conventional solar cell that whole processing steps are walked close to thirty or forty.
Two, technical difficulty is big.Exposure mask and subregion in the production of IBC battery need high-precision controllable, and technique realizes that difficulty is big.Three, may be used
Control property is poor.Due to processing step complexity, each step has various factors that may have an impact to battery performance, therefore process control
It spends relatively low.Four, at high cost.Process is tediously long and wherein involved technology is complicated, and difficulty is greatly so as to cause the cost of the battery
It is high.In short, conventional IBC cell making process complex steps, complexity and at high cost, are unfavorable for large-scale production.
Utility model content
The present invention is directed at least solve one of the technical problems existing in the prior art.For this purpose, the present invention proposes a kind of electricity
Pond, the battery have many advantages, such as that effective area of shining light is big, manufacture craft is simple, at low cost, yields is high.
According to cell piece provided by the utility model, comprising: silicon substrate, the silicon substrate include light-receiving surface and phototropic face；
The shady face of the silicon substrate is equipped with first electrode type doped layer, the first electrode type doped layer and the silicon substrate
Doping type is identical；The lower surface of the first electrode type doped layer includes for exposing the part first electrode type
The exposed area of doped layer and the doped region for being provided with second electrode type doped layer；The surface of the exposed area, which is provided with, to be used for
The first electrode of extracted current, the surface of the doped region are provided with the second electrode for extracted current.
Optionally, the first electrode type doped layer or second electrode type doped layer are the titanium oxide layer of tellurium doping.
Optionally, the titanium oxide layer of tellurium doping with a thickness of 1~500nm.
Optionally, the first electrode includes first electrode pair grid line and first electrode main gate line, the first electrode pair
Grid line includes multiple；The second electrode includes second electrode pair grid line and second electrode main gate line, the second electrode pair grid
Line includes multiple；Multiple first electrode pair grid lines are intervally installed and are connected with the first electrode main gate line, multiple
The second electrode pair grid line is intervally installed and is connected with the second electrode main gate line.
Optionally, the cell piece further includes the third doped layer positioned at silicon substrate light-receiving surface, the third doped layer
Doping type is identical as the doping type of silicon substrate.
Optionally, the cell piece further includes the antireflection layer positioned at third doped layer upper surface.
Optionally, the cell piece includes N-type silicon substrate, and the N-type silicon substrate includes light-receiving surface and shady face；The N
The light-receiving surface of type silicon substrate is equipped with N+ doped layer, and the upper surface of the n-type doping layer is equipped with antireflection layer；The N-type silicon chip
Shady face be equipped with tellurium doping titanium oxide layer；The lower surface of the titanium oxide layer of the tellurium doping includes for exposing part institute
State exposed area and the P-doped zone of the titanium oxide layer of tellurium doping；The surface of the exposed area is provided with for extracted current
Negative electrode, the surface of the P-doped zone are provided with the positive electrode for extracted current.
Optionally, the cell piece includes P-type silicon matrix, and the P-type silicon matrix includes light-receiving surface and shady face；The P
The light-receiving surface of type silicon substrate is equipped with P+ doped layer, and the upper surface of the P+ doped layer is equipped with antireflection layer；The P-type silicon substrate
Shady face is equipped with p-type doped layer, and the lower surface of the p-type doped layer includes for exposing the naked of the part p-type doped layer
The doped region of dew area and the titanium oxide layer for tellurium doping to be arranged；The surface of the exposed area is provided with for extracted current
The doped region surface of positive electrode, the titanium oxide layer of the tellurium doping is provided with the negative electrode for extracted current.
Compared with prior art, the utility model has the beneficial effect that IBC solar energy manufacture craft in the prior art
It needs first electrode type doped layer and the second electrolytic types doped layer being entrained in subregion on the same shady face of silicon chip
It is formed, which is initially formed first electrode type doped layer on silicon substrate surface at least through exposure mask twice, the utility model, so
Second electrode type doped layer is made in first electrode type doping layer surface selectivity subregion afterwards, it is only necessary to an exposure mask, work
Skill step is simple, and controllability is high, and production cost is low.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of the cell piece of the utility model embodiment；
Fig. 2 is that the structure for the titanium oxide layer that tellurium adulterates is arranged in silicon substrate shady face for the cell piece of the utility model embodiment
Schematic diagram；
Fig. 3 is that the knot of p-type doped layer is arranged on the titanium oxide layer surface that tellurium adulterates in the cell piece of the utility model embodiment
Structure schematic diagram；
Fig. 4 is exposed area and the p-type doped layer table for the titanium oxide layer that the cell piece of the utility model embodiment is adulterated in tellurium
The structural schematic diagram of face setting grid line.
Appended drawing reference:
1, antireflection layer, 2, N+ doped layer, 3, silicon chip, 4, tellurium doping titanium oxide layer, 5, p-type doped layer, 51, p-type
Doped region, 52, exposed area, 6, negative electrode, 61, cathode pair grid line, 62, cathode main gate line, 7, positive electrode, 71, the secondary grid line of anode,
72, cathode main gate line,
Specific embodiment
The embodiments of the present invention are described below in detail, examples of the embodiments are shown in the accompanying drawings, wherein from beginning
Same or similar element or element with the same or similar functions are indicated to same or similar label eventually.Below by ginseng
The embodiment for examining attached drawing description is exemplary, and is only used for explaining the utility model, and should not be understood as to the utility model
Limitation.
The cell piece that the utility model provides, including silicon substrate, the silicon substrate include light-receiving surface and phototropic face；It is described
The shady face of silicon substrate is equipped with first electrode type doped layer, the doping of the first electrode type doped layer and the silicon substrate
Type is identical；The lower surface of the first electrode type doped layer includes for exposing the part first electrode type doping
The exposed area 52 of layer and the doped region for being provided with second electrode type doped layer；The first electrode type doped layer it is exposed
The surface in area 52 is provided with the first electrode for extracted current, and the surface of the doped region of the second electrode type doped layer is set
It is equipped with the second electrode for extracted current.
The first electrode type doped layer is identical as the doping type of the silicon substrate to be referred to when silicon substrate is N type silicon
When matrix, when first electrode type doped layer is n-type doping or silicon substrate is type silicon substrate, first electrode type doped layer is P
Type doping.
First electrode and second electrode are two kinds of opposite electrodes of type, such as first electrode is positive electrode 7, correspondingly,
Second electrode is negative electrode 6, conversely, first electrode is negative electrode 6, then second electrode is positive electrode 7.
According to cell piece provided by the utility model, the first electrode type doped layer or second electrode type doped layer
For the titanium oxide layer 4 of tellurium doping.Tellurium can be used as n-type doping material, and titanium oxide can be used as passivation layer, reduce cell piece surface
The recombination rate of carrier.Therefore the titanium oxide layer 4 of tellurium doping may act as N type doped layer can be used as passivation layer again.?
In the application, it regard the titanium oxide layer 4 of tellurium doping as n-type doping layer and passivation layer, compared with traditional IBC battery, production
Simple process, controllability are high.Main reason is that traditional IBC battery manufacturing process is needed P-doped zone domain and n-type doping
Region is formed on the same shady face of silicon substrate, and centre at least needs exposure mask twice, and is unable to accurately control the dense of doping
Degree and position, be easy to cause N-type Chong Die with the doped region of p-type, further need exist in p-type doping surfaces and n-type doping surface
One layer of passivation layer of additional deposition, technics comparing are complicated.And can the oxygen of one layer of tellurium doping first be deposited on silicon substrate surface in the application
Change titanium layer, then marks off the exposed of the titanium oxide layer 4 for exposing the doping of part tellurium on 4 surface of titanium oxide layer of tellurium doping
Area 52 and P-doped zone 51 only carry out carrying out boron diffusion production p-type doped layer 5 in 51 part of P-doped zone, or first in silicon
The shady face of matrix carries out boron and diffuses to form P type doped layer 5, then marks off on 5 surface of p-type doped layer for exposing part P
The doped region 51 for the titanium oxide layer 4 that the exposed area of type doped layer 5 and setting tellurium adulterate, it is intermediate only to need an exposure mask, controllably
Property it is high, and do not need one layer of passivation layer of additional deposition, greatly reduce processing step.
First electrode type doped layer and second electrode type doped layer are the opposite doped layer of type, specifically, first
Electrode type doped layer is p-type doped layer 5, then second electrode type doped layer is the titanium oxide layer 4 of tellurium doping；Otherwise the first electricity
Pole type doped layer is the titanium oxide layer 4 of tellurium doping, then second electrode type doped layer is p-type doped layer 5.
First electrode type doped layer is identical as the electrical property of silicon substrate 3, in order to the extraction of electrode.For example, such as Fig. 1,
When silicon substrate 3 is N-type silicon substrate, then first electrode type doped layer is the titanium oxide layer 4 of tellurium doping, and second electrode type is mixed
Diamicton is p-type doped layer 5；Conversely, then first electrode type doped layer is p-type doped layer 5 when silicon substrate 3 is P-type silicon matrix,
Second electrode type doped layer is the titanium oxide layer 4 of tellurium doping.
In the application, P-N junction is used to form between first electrode type doped layer and second electrode type doped layer.Due to
The presence of the space-charge region P-N forms the electric field that the titanium oxide layer 4 adulterated from tellurium is directed toward p-type doped layer 5, i.e., built-in electricity
?.When the excitation of illumination to battery, energy can generate electron-hole pair.Due to the presence of built in field, electronics-sky of generation
Cave drifts about respectively to meeting to the space charge both ends of the tellurium titanium oxide layer 4 adulterated and p-type doped layer 5, so that voltage is generated, and incite somebody to action
The P-N junction of battery shady face is connected with external circuit, will generate electric current, this i.e. photovoltaic effect.
As a result, according to the battery of the utility model embodiment, only battery shady face formed P-N junction with external circuit phase
Connection, so that it may generate electric current, that is, in the case where grid line is arranged on being omitted in light-receiving surface, positive electrode 7 still may be implemented and bear
The extraction of electrode 6, thus overcome in the related technology can only the phototropic face and shady face from battery or the phototropic face from battery and
The technology prejudice of positive electrode 7 and negative electrode 6 is drawn in side simultaneously, simplifies the manufacture craft of battery, improves the backlight of battery
In face of the utilization rate of light；Also, since light-receiving surface does not have grid line light-blocking, improve the effective area of shining light of battery and the function of battery
Rate.
Further, since positive electrode 7 and negative electrode 6 are all produced on the shady face of battery, in this way, when multiple batteries are connected, it is right
In two neighboring battery, it is only necessary to welding 8 by the positive electrode 7 of one of battery shady face directly with another battery shady face
6 phase of negative electrode weld connection, welding 8 need not can reduce making for solder so that welding procedure is fairly simple by the side of battery
Dosage reduces the probability in welding process with battery breakage in subsequent laminating technology.
According to cell piece provided by the utility model, it is preferred that the titanium oxide layer 4 of tellurium doping with a thickness of 1~
500nm can play good passivation effect and not waste when the thickness of the titanium oxide layer of control tellurium doping is in above range
Material.
According to cell piece provided by the utility model, as shown in figure 3, the lower surface of the titanium oxide layer 4 of tellurium doping is set
There is the exposed area 52 of the titanium oxide layer 4 for exposing the part tellurium doping and is equipped with P-doped zone 51；The tellurium doping
The surface of exposed area 52 of titanium oxide layer 4 be provided with the negative electrode 6 for extracted current, the surface of the P-doped zone 51
It is provided with the positive electrode 7 for extracted current.Exposed area 52 only carries out boron in P-doped zone 51 for cathode grid line layer to be arranged
Diffusion, the application selectivity subregion make p-type doped layer 5, it is only necessary to which an exposure mask, processing step is simple, and controllability is high.
According to cell piece provided by the utility model, as shown in figure 4, positive electrode 7 includes the secondary grid line 71 of anode and anode master
Grid line 72, positive main gate line 71 are multiple.Negative electrode 6 includes cathode pair grid line 61 and cathode main gate line 62, cathode main gate line 61
It is multiple.Wherein, multiple secondary grid lines 71 of anode are intervally installed, and the secondary grid line 71 of multiple anodes respectively with positive main gate line 72
It is connected, multiple cathode pair grid lines 61 are intervally installed, and multiple cathode pair grid lines 61 are connected with cathode main gate line 62 respectively.
In this way, multiple secondary grid lines 71 of anode converge into positive main gate line 72, multiple cathode pair grid lines 61 converge into cathode main gate line 62.Just
Extremely secondary grid line 71 is corresponding with P-doped zone 51 respectively, and cathode pair grid line is corresponding with the exposed area 52 of titanium oxide layer 4 that tellurium adulterates,
To which effect of converging is more preferable.
Wherein, multiple secondary grid lines 71 of anode and the setting of multiple 61 alternate intervals of cathode pair grid line, that is, two neighboring anode is secondary
It is equipped with a cathode pair grid line 61 between grid line 71, the secondary grid line 71 of an anode is equipped between two neighboring cathode pair grid line 61.
In some embodiments of the utility model, as shown in Figures 2 and 3, the edge of each secondary grid line 71 of anode does not surpass
The p-type doped layer area 51 out, each cathode pair grid line is no more than exposed area 52, to guarantee drainage effect.
It for example, is perspective plane to be parallel to light-receiving surface, the projection of each secondary grid line 71 of anode is located at corresponding
In the projection of P-doped zone 51, the projection of positive main gate line 72 is located in the projection of P-doped zone 51, cathode pair grid line 61
In the exposed area 52 for the titanium oxide layer 4 that projection and the projection of cathode main gate line 420 are located at tellurium doping.
Wherein, as Figure 3-Figure 4, the secondary grid line 71 of each anode is perpendicular to positive main gate line 72, each cathode pair grid line
61 are respectively positioned on positive main gate line 72 and bear perpendicular to cathode main grid 62, multiple secondary grid lines 71 of anode and multiple cathode pair grid lines 61
Between pole main gate line 62.
Some embodiments according to the present utility model, the cell piece further include mixing positioned at the third of 3 light-receiving surface of silicon substrate
The doping type of diamicton, the third doped layer is identical as the doping type of silicon substrate 3, to carry out further to silicon substrate 3
Diffusion increases open-circuit voltage.For example, third doped layer is P+ doped layer when silicon substrate 3 is P-type silicon base；For another example Fig. 1, silicon substrate
3 third doped layers when being N-type silicon substrate are N+ doped layer 2.
Further, as shown in Figure 1, cell piece further includes antireflection layer 1, antireflection layer 1 is set to 2 surface of N+ doped layer,
To reduce the light reflection of battery phototropic face, the generating efficiency of battery is improved.For example, antireflection layer 1 can include but is not limited to
TiO2(Titanium Dioxide, titanium dioxide), Al2O3(Aluminium oxide, aluminium oxide), silicon oxynitride film, carbon
Silicon nitride film.
Further, in some preferred embodiments of the utility model, picture 1-4, the cell piece includes N-type silicon substrate
Body, the N-type silicon substrate includes light-receiving surface and shady face；The light-receiving surface of the N-type silicon substrate is equipped with N+ doped layer 2, the N+
The upper surface of doped layer 2 is equipped with the antireflection layer 1；The shady face of the N type silicon substrate is equipped with the titanium oxide of tellurium doping
Layer 4；The titanium oxide layer 4 of tellurium doping include the exposed area 52 for exposing the titanium oxide layer 4 of the part tellurium doping with
And P-doped zone 51；The surface of the exposed area 52 of the titanium oxide layer 4 of the tellurium doping is provided with the negative electrode for extracted current
6, the surface of the P-doped zone 51 is provided with the positive electrode 7 for extracted current.
Further, in some other preferred embodiment of the utility model, the cell piece includes P-type silicon matrix,
The P-type silicon matrix includes light-receiving surface and shady face；The light-receiving surface of the P-type silicon matrix is equipped with P+ doped layer, the P+ doping
The upper surface of layer is equipped with antireflection layer 1；The shady face of the P-type silicon substrate is equipped with p-type doped layer 5, under the p-type doped layer
Surface includes the exposed area 51 for exposing the part p-type doped layer and the titanium oxide layer 4 for tellurium doping to be arranged
Doped region；The surface of the exposed area 51 is provided with the positive electrode 7 for extracted current, the titanium oxide layer 4 of the tellurium doping
Doped region surface is provided with the negative electrode 6 for extracted current.
The preparation process of cell piece according to an embodiment of the present invention is described with reference to the accompanying drawings.Below using cell piece as the sun
Can battery, silicon substrate 3 be N-type silicon substrate for be illustrated.
A1: the dirt on cleaning removal 3 surface of silicon substrate, making herbs into wool is to reduce the reflectivity on 3 surface of silicon substrate；
A2: carrying out single side phosphorus diffusion (N+ doped layer 2 is arranged on silicon substrate light-receiving surface) light-receiving surface of silicon substrate 3, right
The titanium oxide layer 4 of the shady face vapor deposition tellurium doping of silicon substrate 3, marks off exposed area 52 and P on 4 surface of titanium oxide layer of tellurium doping
Type doped region 51 only carries out boron diffusion on 51 surface of P-doped zone to prepare PN junction；
A3: antireflective film is deposited in the phototropic face of battery, i.e., antireflection layer 1 is set on 2 surface of N+ doped layer.
A4: the exposed area 52 on the titanium oxide layer 4 of tellurium doping makes thin grid line (i.e. cathode pair grid line 61) and cathode master
Grid line 62 contacts the thin grid line 61 of cathode perpendicular to cathode main gate line 62 and with cathode main gate line 62, the side of cathode main gate line 62
The coincident of edge and cell piece, the edge of the thin grid line 61 of cathode and the edge of cathode main gate line 62 are both less than the oxidation of tellurium doping
The edge of the exposed area 52 of titanium layer 4；
A5: thin grid line (i.e. the secondary grid line 71 of anode) and positive main gate line 72 are made in P-doped zone 51, keeps thin grid line vertical
It is contacted in positive main gate line 71 and with positive main gate line 72, the edge of positive main gate line 72 and the coincident of battery, thin grid line
Edge and the edge of positive main gate line 72 be both less than the edge of diffused layer of boron；
A6: it anneals to battery.
The encapsulation process of battery according to an embodiment of the present invention is described with reference to the accompanying drawings, comprising the following steps:
B1: by the different electrode of the polarity of two cell pieces of the placement that is parallel to each other (for example, the positive main grid of a battery
The cathode main gate line 62 of line 72 and another battery) it is welded with welding, to form battery strings；
B2: multiple battery strings are subjected to parallel connection to form battery pack, and draw busbar；
B3: being from top to bottom laid with battery pack, i.e. backboard, EVA (Ethylene-Vinyl Acetate
Copolymer, ethylene-vinyl acetate copolymer), battery pack, EVA, glass arranges from the bottom to top；
B4: being put into laminating machine for battery pack and be laminated, and realizes the encapsulation of battery.
Battery according to an embodiment of the present invention can use laser for the silicon substrate equal volume size with existing battery
Silicon wafer (for example, 156.75*156.75mm) is cut into 2-10 (preferably 4-6 parts) silicon substrates 3 in parts, to make battery,
Thus, on the one hand, since the length of positive secondary grid line 71 and the length of cathode pair grid line 61 are smaller, the migration distance of charge compared with
It is short, so that power consumption is lower；On the other hand, the power of battery can be improved, also, utilize parallel connection under the conditions of equal volume
Battery strings can also improve the reliability of battery.
Other of cell piece according to an embodiment of the present invention are constituted and are operated for those of ordinary skills
All be it is known, be not detailed herein.
In the description of the present invention, it is to be understood that, the orientation or position of the instructions such as term " on ", "lower", "inner", "outside"
Setting relationship is to be based on the orientation or positional relationship shown in the drawings, and is merely for convenience of description of the present invention and simplification of the description, rather than
The device or element of indication or suggestion meaning must have a particular orientation, be constructed and operated in a specific orientation, therefore cannot
It is interpreted as limitation of the present invention.In addition, term " first ", " second " are used for description purposes only, and should not be understood as instruction or
It implies relative importance or implicitly indicates the quantity of indicated technical characteristic.The spy of " first ", " second " is defined as a result,
Sign can explicitly or implicitly include one or more of the features.In the description of the present invention, unless otherwise indicated,
The meaning of " plurality " is two or more.
In the description of the present invention, it should be noted that unless otherwise clearly defined and limited, term " connected " should be done
It broadly understood, for example, it may be being fixedly connected, may be a detachable connection, or be integrally connected；It can be mechanical connection,
It is also possible to be electrically connected；It can be directly connected, can also can be inside two elements indirectly connected through an intermediary
Connection.For the ordinary skill in the art, can be understood with concrete condition above-mentioned term in the present invention specifically contain
Justice.
In the description of this specification, reference term " one embodiment ", " some embodiments ", " example " or " some to show
The description of example " etc. means that particular features, structures, materials, or characteristics described in conjunction with this embodiment or example are contained in the present invention
At least one embodiment or example in.In the present specification, schematic expression of the above terms are not necessarily referring to identical
Embodiment or example.Moreover, particular features, structures, materials, or characteristics described can be real in any one or more
Applying can be combined in any suitable manner in example or example.
Although an embodiment of the present invention has been shown and described, it will be understood by those skilled in the art that: not
A variety of change, modification, replacement and modification can be carried out to these embodiments in the case where being detached from the principle of the present invention and objective, this
The range of invention is defined by the claims and their equivalents.
Claims (8)
1. a kind of cell piece characterized by comprising silicon substrate, the silicon substrate include light-receiving surface and phototropic face；The silicon substrate
The shady face of body is equipped with first electrode type doped layer, the doping type of the first electrode type doped layer and the silicon substrate
It is identical；The lower surface of the first electrode type doped layer includes for exposing the part first electrode type doped layer
Exposed area and the doped region for being provided with second electrode type doped layer；The surface of the exposed area is provided with for extracted current
First electrode, the surface of the doped region is provided with the second electrode for extracted current.
2. cell piece according to claim 1, which is characterized in that the first electrode type doped layer or second electrode class
Type doped layer is the titanium oxide layer of tellurium doping.
3. cell piece according to claim 2, which is characterized in that the titanium oxide layer of tellurium doping with a thickness of 1~
500nm。
4. cell piece according to claim 1, which is characterized in that the first electrode includes first electrode pair grid line and
One electrode main grid line, the first electrode pair grid line includes multiple；The second electrode includes second electrode pair grid line and second
Electrode main grid line, the second electrode pair grid line includes multiple；
Multiple first electrode pair grid lines are intervally installed and are connected with the first electrode main gate line, and multiple described second
Electrode pair grid line is intervally installed and is connected with the second electrode main gate line.
5. cell piece according to claim 1, which is characterized in that the cell piece further includes being located at silicon substrate light-receiving surface
The doping type of third doped layer, the third doped layer is identical as the doping type of silicon substrate.
6. cell piece according to claim 5, which is characterized in that the cell piece further includes being located at table on third doped layer
The antireflection layer in face.
7. cell piece according to claim 1-6, which is characterized in that the cell piece includes N-type silicon substrate, institute
Stating N-type silicon substrate includes light-receiving surface and shady face；The light-receiving surface of the N-type silicon substrate is equipped with N+ doped layer, the n-type doping
The upper surface of layer is equipped with antireflection layer；The shady face of the N-type silicon chip is equipped with the titanium oxide layer of tellurium doping；The tellurium doping
The lower surface of titanium oxide layer includes for the exposed area for exposing the titanium oxide layer of the part tellurium doping and P-doped zone；
The surface of the exposed area is provided with the negative electrode for extracted current, and the surface of the P-doped zone is provided with for drawing
The positive electrode of electric current.
8. cell piece according to claim 1-6, which is characterized in that the cell piece includes P-type silicon matrix, institute
Stating P-type silicon matrix includes light-receiving surface and shady face；The light-receiving surface of the P-type silicon matrix is equipped with P+ doped layer, the P+ doped layer
Upper surface be equipped with antireflection layer；The shady face of the P-type silicon substrate is equipped with p-type doped layer, the lower surface of the p-type doped layer
Doped region including the exposed area for exposing the part p-type doped layer and the titanium oxide layer for tellurium doping to be arranged；
The surface of the exposed area is provided with the positive electrode for extracted current, and the doped region surface of the titanium oxide layer of the tellurium doping is set
It is equipped with the negative electrode for extracted current.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821371424.9U CN209016067U (en) | 2018-08-24 | 2018-08-24 | Cell piece |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821371424.9U CN209016067U (en) | 2018-08-24 | 2018-08-24 | Cell piece |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN209016067U true CN209016067U (en) | 2019-06-21 |
Family
ID=66831598
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| CN201821371424.9U Active CN209016067U (en) | 2018-08-24 | 2018-08-24 | Cell piece |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112018196A (en) * | 2020-08-04 | 2020-12-01 | 隆基绿能科技股份有限公司 | Back contact solar cell, production method thereof and back contact cell assembly |
-
2018
- 2018-08-24 CN CN201821371424.9U patent/CN209016067U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112018196A (en) * | 2020-08-04 | 2020-12-01 | 隆基绿能科技股份有限公司 | Back contact solar cell, production method thereof and back contact cell assembly |
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