CN208999991U - A kind of burning program plate - Google Patents
A kind of burning program plate Download PDFInfo
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- CN208999991U CN208999991U CN201821864832.8U CN201821864832U CN208999991U CN 208999991 U CN208999991 U CN 208999991U CN 201821864832 U CN201821864832 U CN 201821864832U CN 208999991 U CN208999991 U CN 208999991U
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Abstract
The utility model discloses a kind of burning program plates.The burning program plate includes the first chip, at least one second chip and switch unit, first burning program terminal and serial transmission bus, serial transmission bus includes first segment route and second segment route, first segment route and second segment route are electrically connected by switch unit, the control terminal of switch unit is electrically connected with the control signal output of the first chip, the burning program end of first chip is electrically connected to the first burning program terminal, first serial bus communication end is electrically connected to the first segment route of serial transmission bus, the burning program end of second chip is electrically connected to the second segment route of serial transmission bus.In switching means conductive, first chip and the second chip are realized by serial transmission bus to be connected, so as to carry out burning program to the second chip by the first burning program terminal, reduce the setting of burning program terminal, when carrying out burning program to different chips simultaneously, does not need multiple exchanging position and set burning.
Description
Technical field
The utility model embodiment be related to burning program technical field more particularly to a kind of burning program plate.
Background technique
Many IC products (such as microcontroller, programmable logic device) need before start-up operation by generation
Code or data " download " in the memory space of the integrated circuit.If not completing this " downloading " process, this is integrated
Circuit can not work, so by code perhaps data " downloading " process referred to as integrated circuit programming or burning.
In a display device, such as liquid crystal display device or organic light-emitting display device, the collection such as microcontroller is equally existed
At the chip that circuit is formed, in order to carry out burning to the chip in display device, need when making photomask for burning/recording chip
The hole of reserved burning program terminal, causes the shaded effect of photomask poor, the signal on circuit is vulnerable to interference.
Utility model content
The utility model provides a kind of burning program plate, to reduce the setting of burning program terminal, solves to different cores
When piece carries out burning program, the problem of needing multiple exchanging position to set burning, and the shaded effect of the photomask in display device is improved,
Reduce the interference to the upper signal of display device.
In a first aspect, the utility model embodiment provides a kind of burning program plate, including the first chip, at least one
Two chips and switch unit, the first burning program terminal and serial transmission bus；
The serial transmission bus includes first segment route and second segment route, the first segment route and the second segment
Route is electrically connected by the switch unit, the control signal output of the control terminal of the switch unit and first chip
Electrical connection；
First chip includes burning program end, the first serial bus communication end and control signal output；Described
The burning program end of one chip is electrically connected to the first burning program terminal, and first serial bus communication end is electrically connected to
The first segment route of the serial transmission bus；
At least one described second chip includes burning program end, the burning program end electricity of at least one second chip
It is connected to the second segment route of the serial transmission bus.
Specifically, which further includes the second burning program terminal, the second burning program terminal with it is described
The burning program end of second chip is electrically connected.
Specifically, the serial transmission bus is I2C bus, and the switch unit includes the first transistor and the second crystal
Pipe；
The control terminal of the first transistor is electrically connected with the control terminal of the second transistor, and single as the switch
The control terminal of member, the first end of the first transistor are electrically connected with the data line of the first segment route, the first crystal
The second end of pipe is electrically connected with the data line of the second segment route；The first end of the second transistor and the first segment line
The clock line on road is electrically connected, and the second end of the second transistor is electrically connected with the clock line of the second segment route.
Specifically, the first transistor and the second transistor are N-type transistor；
The control terminal of the first transistor and the second transistor is grounded by pull down resistor.
Specifically, which further includes level conversion unit, the input terminal of the level conversion unit with it is described
The control signal output of first chip is electrically connected, the output end of the level conversion unit and the first transistor and second
The control terminal of transistor is electrically connected.
Specifically, the first transistor and the second transistor are P-type transistor；
The control terminal of the first transistor and the second transistor is electrically connected by pull-up resistor with first voltage line.
Specifically, the serial transmission bus is spi bus, and the switch unit includes third transistor, the 4th crystal
Pipe and the 5th transistor；
The control terminal of the control terminal of the third transistor, the control terminal of the 4th transistor and the 5th transistor
The of electrical connection, and the control terminal as the switch unit, the first end of the third transistor and the first segment route
The electrical connection of one data line, the second end of the third transistor are electrically connected with the first data line of the second segment route；It is described
The first end of 4th transistor is electrically connected with the clock line of the first segment route, the second end of the 4th transistor with it is described
The clock line of second segment route is electrically connected；The first end of 5th transistor and the second data line electricity of the first segment route
Connection, the second end of the 5th transistor are electrically connected with the second data line of the second segment route.
Specifically, the number of second chip is two；Each second chip includes burning program end, each
The burning program end of second chip is electrically connected to the second segment route of the serial transmission bus.
Specifically, the chip type of each second chip is different.
Specifically, described program burning plate is the driving plate of display device, is covered with photomask in the driving plate, described
Hole is opened up on photomask, described hole exposes the first burning program terminal.
The technical solution of the utility model, burning program plate include that the first chip, at least one second chip and switch are single
Member, the first burning program terminal and serial transmission bus, serial transmission bus include first segment route and second segment route, and first
Section route and second segment route are electrically connected by switch unit, and the control signal of the control terminal of switch unit and the first chip exports
End electrical connection, the first chip includes burning program end, the first serial bus communication end and control signal output；First chip
Burning program end is electrically connected to the first burning program terminal, and the first serial bus communication end is electrically connected to the of serial transmission bus
One section of route, at least one second chip include burning program end, and the burning program end of at least one the second chip is electrically connected to
The second segment route of serial transmission bus.In switching means conductive, the first chip and the second chip pass through serial transmission bus
Connection is realized, so as to carry out burning program to the second chip by the first burning program terminal, so as to reduce program
The setting of burning terminal, while when carrying out burning program to different chip, it does not need multiple exchanging position and sets burning.In display device
In, can hole corresponding with burning program terminal on corresponding reduction photomask dropped to improve the shaded effect of photomask
The interference of hole on low photomask to the signal of display device, improves the display quality of display device.
Detailed description of the invention
Fig. 1 is a kind of structural schematic diagram of burning program plate provided by the embodiment of the utility model；
Fig. 2 is the structural schematic diagram of another burning program plate provided by the embodiment of the utility model；
Fig. 3 is the structural schematic diagram of another burning program plate provided by the embodiment of the utility model；
Fig. 4 is the structural schematic diagram of another burning program plate provided by the embodiment of the utility model；
Fig. 5 is the structural schematic diagram of another burning program plate provided by the embodiment of the utility model；
Fig. 6 is the structural schematic diagram of another burning program plate provided by the embodiment of the utility model；
Fig. 7 is the structural schematic diagram of another burning program plate provided by the embodiment of the utility model.
Specific embodiment
The utility model is described in further detail with reference to the accompanying drawings and examples.It is understood that herein
Described specific embodiment is used only for explaining the utility model, rather than the restriction to the utility model.It further needs exist for
It is bright, part relevant to the utility model is illustrated only for ease of description, in attached drawing rather than entire infrastructure.
Fig. 1 is a kind of structural schematic diagram of burning program plate provided by the embodiment of the utility model, as shown in Figure 1, the journey
Sequence replication plate includes the first chip 10, at least one second chip 20 and switch unit 30, the first burning program terminal 40 and string
Row transfer bus 50.
Serial transmission bus 50 includes first segment route 51 and second segment route 52, first segment route 51 and second segment route
52 are electrically connected by switch unit 30, the control signal output of the control terminal ctrl of switch unit 30 and the first chip 10
Out1 electrical connection.
First chip 10 includes burning program end, the first serial bus communication end and control signal output out1；First
The burning program end of chip is electrically connected to the first burning program terminal 40, and the first serial bus communication end is electrically connected to serial transmission
The first segment route 51 of bus 50.
At least one second chip 20 includes burning program end, and the burning program end of at least one the second chip is electrically connected to
The second segment route 52 of serial transmission bus 50.
Specifically, the first chip 10 can be microcontroller (Micro Control Unit, MCU), at this time the first chip
10 burning program end may include data-signal burning end TEST, clock signal burning end RST and ground terminal GND.It is corresponding
First burning program terminal includes three terminals, is electrically connected respectively with three terminals at the burning program end of the first chip 10, is used
In to 10 burning program of the first chip.
Serial transmission bus 50 includes first segment route 51 and second segment route 52, the first universal serial bus of the first chip 10
Communication ends and first segment route 51, which are realized, to be communicated to connect, and the first chip 10 can by the signal that the first serial bus communication end exports
To be transmitted on first segment route 51.And first segment route 51 is electrically connected by switch unit 30 with second segment route 52, when opening
When closing the conducting of unit 30, the signal on first segment route 51 can be transmitted on second segment route 52.Second segment route 52 and
The burning program end of two chips 20 is electrically connected, therefore the signal on second segment route 52 can be burnt by the program of the second chip 20
It records end and the second chip 20 is written, burning program is carried out to the second chip 20.Illustratively, when 10 burning program of the first chip terminates
Afterwards, the first chip 10 can work normally.In order to 20 burning program of the second chip, the control signal output of the first chip 10
The control Signal-controlled switch unit 30 of out1 output is connected, at this point, the program by 40 burning of the first burning program terminal can
To be transmitted to the burning program end of the second chip 20 by serial transmission bus 50, burning program is carried out to the second chip 20.By
Burning program terminal can be separately provided to avoid to the second chip 20 in this, reduce the setting of burning program terminal.Simultaneously to first
When chip 10 and the second chip 20 carry out burning program, change place burning is not needed.The control signal output of first chip 10
Out1 can by bus extender (General Purpose Input Output, GPIO) from the pin of the first chip 10 into
Row extension.
When burning program plate is the driving plate of display device, it is covered with photomask in driving plate, for display device
Display area around play the role of shading, to prevent photomask region light leakage from showing to the display area of display device
The picture shown causes visual interference.Photomask is equipped with hole, for exposing burning program terminal.When the second chip 20 can
When carrying out burning program by the first burning program terminal 40, burning program terminal is not needed additionally to be arranged for the second core
Piece 20 carries out burning program, therefore hole required for the first burning program terminal 40 can be provided only on photomask, and no longer
Other burning program terminals are set, so as to reduce be arranged on photomask in display device it is corresponding with burning program terminal
Hole reduces the interference of hole on photomask to the signal of display device, mentions to improve the shaded effect of photomask
The high display quality of display device.
In above process, the control Signal-controlled switch unit of the control signal output out1 output of the first chip 10
30 state.When switch unit 30 is connected in the control signal of the control signal output out1 output of only the first chip 10,
It can be burnt in the second chip 20 by serial transmission bus 50 by the program of 40 burning of the first burning program terminal.It is exemplary
Ground, the second chip 20 can be power supply chip, and the burning program end of the second chip 20 may include that power data signal is burnt at this time
Record end, power clock signal burning end and ground terminal.Wherein, power data signal burning end and power clock signal burning termination
The signal that second segment route 52 transmits is received to be burnt in the second chip 20.
In addition, Fig. 1 is only the technical solution for schematically illustrating the second chip 20 and being one, the second chip 20 can also
Think multiple, illustratively, Fig. 2 is the structural schematic diagram of another burning program plate provided by the embodiment of the utility model, such as
Shown in Fig. 2, the number of the second chip 20 is two, and each second chip includes burning program end, each second chip 20
Burning program end is electrically connected on the second segment route 52 of serial transmission bus.When switch unit 30 is connected, the first program is burnt
Burning program can be carried out to multiple second chips 20 by serial transmission bus by recording terminal 40.At this point, the second different chips 20
It can be identical chip type, at this point, the program of identical second chip, 20 burning can be identical, second segment route 52 can be same
When output signal to multiple second chips 20 carry out burning program.Alternatively, the program of identical second chip, 20 burning is different, this
When can be addressed by serial transmission bus operation selection the second chip 20, to realize identical second chip, 20 burning not
Same burning program.The second different chips 20 are also possible to different chip types, for example, one of them second chip 20 can
Think power supply chip, another second chip 20 can be programmable gamma correction buffer circuit chip (P-Gamma Code).
Different types of second chip, 20 burning program is different, therefore can be addressed that operation selection is different by serial transmission bus
The second chip 20, to realize that different the second chip 20 of 40 pairs of the first burning program terminal carries out burning program.
The technical solution of the present embodiment, burning program plate include the first chip, at least one second chip and switch unit,
First burning program terminal and serial transmission bus, serial transmission bus include first segment route and second segment route, first segment
Route and second segment route are electrically connected by switch unit, the control signal output of the control terminal of switch unit and the first chip
Electrical connection, the first chip includes burning program end, the first serial bus communication end and control signal output；The journey of first chip
Sequence replication end is electrically connected to the first burning program terminal, and the first serial bus communication end is electrically connected to the first of serial transmission bus
Section route, at least one second chip includes burning program end, and the burning program end of at least one the second chip is electrically connected to string
The second segment route of row transfer bus.In switching means conductive, the first chip and the second chip are real by serial transmission bus
It now connects, so as to carry out burning program to the second chip by the first burning program terminal, is burnt so as to reduce program
When recording the setting of terminal, while carrying out burning program to different chips, does not need multiple exchanging position and set burning.In display device
In, can hole corresponding with burning program terminal on corresponding reduction photomask dropped to improve the shaded effect of photomask
The interference of hole on low photomask to the signal of display device, improves the display quality of display device.
On the basis of above-mentioned each technical solution, continues to refer to figure 1 and Fig. 2, the burning program plate further include the second program
Burning terminal 60, the second burning program terminal 60 are electrically connected with the burning program end of the second chip 20.
Specifically, as shown in Figure 1, when the second chip 20 is one, the second burning program terminal 60 and the second chip 20
Burning program end electrical connection, therefore the second burning program terminal 60 can directly to the second chip 20 carry out burning program.Therefore,
Second chip 20 both can carry out program by the first chip 10 and serial transmission bus 50 by the first burning program terminal 40
Burning can also carry out burning program to the second chip 20 by the second burning program terminal 60.It under normal circumstances, can be in journey
The process of sequence initialization carries out burning program to the second chip 20 by the second burning program terminal 60.Illustratively, work as program
When burning plate is the driving plate of display device, initial phase is carried out in driving plate, it can be right by the second burning program terminal 60
Second chip 20 carries out burning program, can avoid passing through the first burning program terminal more than 40 times and carry out program to the second chip 20
Burning.During making photomask, the hole of the first burning program terminal 40 of exposure is only reserved, therefore photomask can be straight
It connects and covers the second burning program terminal 60, the first burning program terminal 40 of exposure can in the display device course of work
Burning program is carried out to the second chip 20 by the first burning program terminal 40.Both it can reduce by the first burning program terminal more than 40
It is secondary that burning program is carried out to the second chip 20, and the shaded effect of photomask is improved, reduce the hole pair on photomask
The interference of the signal of display panel improves the display quality of display panel.As shown in Fig. 2, when the second chip 20 is two,
Second burning program terminal 60 can be electrically connected with the burning program end of two the second chips 20 simultaneously, therefore the second burning program
Terminal 60 directly can carry out burning program to two the second chips 20.Detailed process carries out burning with to second chip 20
Process is similar.
It should be noted that during the second burning program terminal 60 carries out burning program to the second chip 20, switch
Unit 30 is in not on-state, guarantees that the second burning program terminal 60 only carries out burning program to the second chip 20, avoids the
The signal of two burning program terminals 60 input is input to the first chip 10 by serial transmission bus 50.
On the basis of above-mentioned each technical solution, Fig. 3 is another burning program plate provided by the embodiment of the utility model
Structural schematic diagram, as shown in figure 3, serial transmission bus be I2C bus, switch unit 30 include the first transistor T1 and second
Transistor T2.
The control terminal of the first transistor T1 is electrically connected with the control terminal of second transistor T2, and the control as switch unit 30
The first end of end ctrl processed, the first transistor T1 are electrically connected with the data line D51 of first segment route 51, and the of the first transistor T1
Two ends are electrically connected with the data line D52 of second segment route 52.The first end of second transistor T2 and the clock of first segment route 51
Line C51 electrical connection, the second end of second transistor T2 are electrically connected with the clock line C52 of second segment route 52.
Specifically, when serial transmission bus is I2C bus, serial transmission bus includes data line and clock line, data line
For transmitting data-signal, clock line is used to transmit clock signal.Corresponding, the first chip 10 includes data signal output
SDA and clock signal output terminal SCL.When first chip 10 realizes communication connection with I2C bus, the data-signal of the first chip 10
Output end SDA is electrically connected with the data line D51 of the first segment route 51 of I2C bus, by the received data-signal of the first chip 10
It is transmitted on the data line of I2C bus.The clock signal output terminal SCL of first chip 10 and the first segment route 51 of I2C bus
Clock line C51 electrical connection, on the clock line of the received clock signal transmission of the first chip 10 to I2C bus.Second chip 20
Burning program end include data-signal burning end DSDA, clock signal burning end DSCL and ground terminal GND.Second chip 20
Data-signal burning end DSDA is electrically connected with the data line D52 of the second segment route 52 of I2C bus, for receiving I2C bus
Data-signal.The clock line C52 of the second segment route 52 of the clock signal burning end DSCL and I2C bus of second chip 20 is electrically connected
It connects, for receiving the clock signal of I2C bus.The ground terminal GND of second chip 20 is grounded.Therefore, the second chip 20 can lead to
The signal crossed in I2C bus carries out burning program.
In addition, the first end and second end of the first transistor T1 is electrically connected with the data line of I2C bus, for controlling data
The transmission of the data-signal of line.The first end and second end of second transistor T2 is electrically connected with the clock line of I2C bus, for controlling
The transmission of the clock signal of clock line processed.Control of the control terminal of the first transistor T1 and second transistor T2 with the first chip 10
Signal output end out1 processed electrical connection, by the first chip 10 control the first transistor T1 and second transistor T2 conducting or
Shutdown.
Illustratively, the first transistor T1 and second transistor T2 is N-type transistor.At this point, the first transistor T1 and
The control terminal input high level of second transistor T2 is connected.Therefore, before the first chip 10 exports control signal, first is brilliant
The control terminal of body pipe T1 and second transistor T2 should keep low level, therefore, the first transistor T1 and second transistor T2's
Control terminal is grounded by pull down resistor R1, for guarantee the first chip 10 control signal output out1 export control signal it
Preceding the first transistor T1 and second transistor T2 are in an off state.For example, pull down resistor R1 can be a resistance value is
The resistance of 4.7K.Signal is controlled when the first chip 10 exports, if control signal is high level, the first crystalline substance can be directly controlled
Body pipe T1 and second transistor T2 conducting can carry out program burning to the second chip 20 by the first burning program terminal 40 at this time
Record.If control signal is low level, burning program plate should also include level conversion unit at this time.Fig. 4 is that the utility model is real
The structural schematic diagram that another burning program plate of example offer is provided, as shown in figure 4, the input terminal of level conversion unit 70 and first
The control signal output out1 of chip 10 is electrically connected, the output end and the first transistor T1 and second of level conversion unit 70
The control terminal of transistor T2 is electrically connected.Level conversion unit 70 is connected on the control signal output out1 of the first chip 10 and opens
Between the control terminal ctrl for closing unit 30, the low transition that the control signal output out1 of the first chip 10 is exported is height
Level, to realize control the first transistor T1 and second transistor T2 conducting.
Fig. 5 is the structural schematic diagram of another burning program plate provided by the embodiment of the utility model, as shown in Fig. 5, the
One transistor T1 and second transistor T2 is P-type transistor.At this point, the control of the first transistor T1 and second transistor T2
It is connected when holding input low level.Therefore, before the first chip 10 exports control signal, the first transistor T1 and second transistor
The control terminal of T2 should keep high level, and therefore, the control terminal of the first transistor T1 and second transistor T2 pass through pull-up resistor
R2 is electrically connected with first voltage line V1, for guarantee the first chip 10 control signal output out1 export control signal it
Preceding the first transistor T1 and second transistor T2 are in an off state.When the first chip 10 exports control signal, if control letter
Number be low level when, can directly control the first transistor T1 and second transistor T2 conducting, the first program can be passed through at this time
Burning terminal 40 carries out burning program to the second chip 20.If control signal is high level, burning program plate should also be wrapped at this time
Include level conversion unit.Its detailed process is that the process of N-type transistor is similar with the first transistor T1 and second transistor T2, this
Place repeats no more.
Fig. 6 is the structural schematic diagram of another burning program plate provided by the embodiment of the utility model, as shown in Fig. 6, with
Unlike Fig. 3, the number of the second chip 20 is two in Fig. 6, and working principle at this time is identical as the working principle of Fig. 2, this
Place repeats no more.
Fig. 7 is the structural schematic diagram of another burning program plate provided by the embodiment of the utility model, as shown in Fig. 7, string
Row transfer bus is spi bus, and switch unit 30 includes third transistor T3, the 4th transistor T4 and the 5th transistor T5.The
The control terminal of three transistor T3, the control terminal of the 4th transistor T4 are electrically connected with the control terminal of the 5th transistor T5, and as opening
Close the control terminal ctrl of unit 30.The first end of third transistor T3 and the first data line D151 of first segment route 51 are electrically connected
It connects, the second end of third transistor T3 is electrically connected with the first data line D152 of second segment route 52.The of 4th transistor T4
One end is electrically connected with the clock line C51 on 51 tunnel of first segment line, the second end of the 4th transistor T4 and the clock of second segment route 52
Line C52 electrical connection.The first end of 5th transistor T5 is electrically connected with the second data line D251 of first segment route 51, and the 5th is brilliant
The second end of body pipe T5 is electrically connected with the second data line D252 of second segment route 52.
Specifically, when serial transmission bus is spi bus, serial transmission bus includes the first data line, the second data line
And clock line, the first data line are used to outputting data signals, the second data line is used to receive data-signal, and clock line is used to transmit
Clock signal.It is corresponding, the first chip 10 include the first data signal output SDA1, the second data signal input SDA2 and
Clock signal output terminal SCL.When first chip 10 realizes communication connection with spi bus, the first data-signal of the first chip 10
Output end SDA1 is electrically connected with the first data line D151 of spi bus first segment route 51, by the received data of the first chip 10
Signal is transmitted on the first data line of spi bus.The the second data signal input SDA2 and spi bus of first chip 10
Second data line D251 of first segment route 51 is electrically connected, and the first chip 10 is made to can receive the data-signal on spi bus.
The clock line C51 of the first segment route 51 of the clock signal output terminal SCL and spi bus of first chip 10 is electrically connected, the first core
On 10 received clock signal transmission to the clock line of spi bus of piece.The burning program end of second chip 20 includes the first data
Signal burning end DSDA1, the second data-signal burning end DSDA2, clock signal burning end DSCL and ground terminal GND.Second core
First data-signal burning end DSDA1 of piece 20 is electrically connected with the first data line D152 of the second segment route 52 of spi bus,
For receiving the data-signal of spi bus.The second of second data-signal burning end DSDA2 of the second chip 20 and spi bus
The second data line D252 electrical connection of section route 52, can make the second chip 20 send data-signal to spi bus.Second chip
20 clock signal burning end DSCL is electrically connected with the clock line C52 of the second segment route 52 of spi bus, total for receiving SPI
The clock signal of line.The ground terminal GND of second chip 20 is grounded.Therefore, the second chip 20 can pass through the signal on spi bus
Carry out burning program.
In addition, the first end and second end of third transistor T3 is electrically connected with the first data line of spi bus, for controlling
The transmission of the data-signal of first data line.The first end and second end of 4th transistor T4 and the clock line of spi bus are electrically connected
It connects, the transmission of the clock signal for controlling clock line.The of the first end and second end of 5th transistor T5 and spi bus
The electrical connection of two data lines, the transmission of the data-signal for controlling the second data line.The control terminal of third transistor T3, the 4th crystalline substance
The control terminal of body pipe T4 is electrically connected with the control signal output out1 of the first chip 10 with the control terminal of the 5th transistor T5,
It is controlled by the first chip 10.The on or off of third transistor T3, the 4th transistor T4 and the 5th transistor T5.
Illustratively, third transistor T3, the 4th transistor T4 and the 5th transistor T5 are N-type transistor, and third is brilliant
Body pipe T3, the 4th transistor T4 are connected with the control terminal input high level of the 5th transistor T5, therefore, export in the first chip 10
Before controlling signal, the control terminal of third transistor T3, the 4th transistor T4 and the 5th transistor T5 should keep low level,
At this point it is possible to be grounded the control terminal of third transistor T3, the 4th transistor T4 and the 5th transistor T5 by pull down resistor.When
When the first chip 10 output control signal, control third transistor T3, the 4th transistor T4 are connected with the 5th transistor T5.Specifically
Control process when being N-type transistor of control process and the first transistor T1 and second transistor T2 it is identical, it is no longer superfluous herein
It states.In addition, third transistor T3, the 4th transistor T4 and the 5th transistor T5 can also be P-type transistor, at this point, third
Transistor T3, the 4th transistor T4 and the 5th transistor T5 control terminal can be electrically connected by pull-up resistor and first voltage line
It connects, to realize that the control signal of the first chip 10 controls third transistor T3, the 4th transistor T4 and the 5th transistor T5
Conducting and shutdown.
Note that above are only the preferred embodiment and institute's application technology principle of the utility model.Those skilled in the art's meeting
Understand, the utility model is not limited to specific embodiment described here, is able to carry out for a person skilled in the art various bright
Aobvious variation, readjustment and substitution is without departing from the protection scope of the utility model.Therefore, although passing through above embodiments
The utility model is described in further detail, but the utility model is not limited only to above embodiments, is not departing from
It can also include more other equivalent embodiments in the case that the utility model is conceived, and the scope of the utility model is by appended
Scope of the claims determine.
Claims (10)
1. a kind of burning program plate, including the first chip, at least one second chip and the first burning program terminal；Its feature exists
In further including switch unit and serial transmission bus；
The serial transmission bus includes first segment route and second segment route, the first segment route and the second segment route
It is electrically connected by the switch unit, the control terminal of the switch unit and the control signal output of first chip are electrically connected
It connects；
First chip includes burning program end, the first serial bus communication end and control signal output；First core
The burning program end of piece is electrically connected to the first burning program terminal, and first serial bus communication end is electrically connected to described
The first segment route of serial transmission bus；
At least one described second chip includes burning program end, the burning program end electrical connection of at least one second chip
To the second segment route of the serial transmission bus.
2. burning program plate according to claim 1, which is characterized in that it further include the second burning program terminal, described
Two burning program terminals are electrically connected with the burning program end of second chip.
3. burning program plate according to claim 1, which is characterized in that the serial transmission bus is I2C bus, described
Switch unit includes the first transistor and second transistor；
The control terminal of the first transistor is electrically connected with the control terminal of the second transistor, and as the switch unit
Control terminal, the first end of the first transistor are electrically connected with the data line of the first segment route, the first transistor
Second end is electrically connected with the data line of the second segment route；The first end of the second transistor and the first segment route
Clock line electrical connection, the second end of the second transistor are electrically connected with the clock line of the second segment route.
4. burning program plate according to claim 3, which is characterized in that the first transistor and the second transistor
It is N-type transistor；
The control terminal of the first transistor and the second transistor is grounded by pull down resistor.
5. burning program plate according to claim 4, which is characterized in that further include level conversion unit, the level turns
The input terminal for changing unit is electrically connected with the control signal output of first chip, the output end of the level conversion unit with
The electrical connection of the control terminal of the first transistor and second transistor.
6. burning program plate according to claim 3, which is characterized in that the first transistor and the second transistor
It is P-type transistor；
The control terminal of the first transistor and the second transistor is electrically connected by pull-up resistor with first voltage line.
7. burning program plate according to claim 1, which is characterized in that the serial transmission bus is spi bus, described
Switch unit includes third transistor, the 4th transistor and the 5th transistor；
The control terminal of the control terminal of the third transistor, the control terminal of the 4th transistor and the 5th transistor is electrically connected
It connects, and the control terminal as the switch unit, the first number of the first end of the third transistor and the first segment route
It is electrically connected according to line, the second end of the third transistor is electrically connected with the first data line of the second segment route；Described 4th
The first end of transistor is electrically connected with the clock line of the first segment route, the second end and described second of the 4th transistor
The clock line electrical connection of section route；The first end of 5th transistor and the second data line of the first segment route are electrically connected
It connects, the second end of the 5th transistor is electrically connected with the second data line of the second segment route.
8. burning program plate according to claim 1, which is characterized in that the number of second chip is two；Each
Second chip includes burning program end, and the burning program end of each second chip is electrically connected to the serial transmission
The second segment route of bus.
9. burning program plate according to claim 8, which is characterized in that the chip type of each second chip is not
Together.
10. -9 described in any item burning program plates according to claim 1, which is characterized in that described program burning plate is display
The driving plate of device is covered with photomask in the driving plate, hole is opened up on the photomask, described hole exposes institute
State the first burning program terminal.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821864832.8U CN208999991U (en) | 2018-11-13 | 2018-11-13 | A kind of burning program plate |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821864832.8U CN208999991U (en) | 2018-11-13 | 2018-11-13 | A kind of burning program plate |
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| CN208999991U true CN208999991U (en) | 2019-06-18 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2021088255A1 (en) * | 2019-11-07 | 2021-05-14 | 苏州浪潮智能科技有限公司 | System management bus link, method and apparatus for determining pull-up resistance thereof, and device |
-
2018
- 2018-11-13 CN CN201821864832.8U patent/CN208999991U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2021088255A1 (en) * | 2019-11-07 | 2021-05-14 | 苏州浪潮智能科技有限公司 | System management bus link, method and apparatus for determining pull-up resistance thereof, and device |
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Address after: 215301 No. 1, Longteng Road, Kunshan Development Zone, Jiangsu, Suzhou Patentee after: Kunshan Longteng Au Optronics Co Address before: 215301 No. 1, Longteng Road, Kunshan Development Zone, Jiangsu, Suzhou Patentee before: Kunshan Longteng Optronics Co., Ltd. |