CN209949101U

CN209949101U - 485 communication is from receiving and dispatching circuit

Info

Publication number: CN209949101U
Application number: CN201921328309.8U
Authority: CN
Inventors: 钟之岩; 李萍婷; 廖慧; 郭俊鹏; 杨飞; 赵元林
Original assignee: Shanghai Yi Xing Mechanical & Electronic Equipment Corp Ltd
Current assignee: Shanghai Yi Xing Mechanical & Electronic Equipment Corp Ltd
Priority date: 2019-08-14
Filing date: 2019-08-14
Publication date: 2020-01-14
Anticipated expiration: 2029-08-14

Abstract

The utility model provides a 485 communication is from transceiver circuit relates to instrument and meter, industrial control field, including socket P1, two-way voltage stabilizing circuit, communication circuit and the switch circuit who connects in order, communication circuit adopts 485 communication chip U1, and switch circuit includes MOS pipe M1 and resistance R6, and MOS pipe M1's drain electrode is connected with resistance R6, and resistance R6 connects the VCC, and the grid is connected with the TXD pin of singlechip, and GND is connected to the source electrode; the receiving output end RO of the 485 communication chip U1 is connected with an RXD pin and a resistor R7 of the single chip microcomputer, the sending enabling end DE and the receiving enabling end RE are connected with a drain electrode of the MOS tube M1, the sending input end DI is connected with GND, and the other end of the resistor R7 is connected with VCC. The 485 communication circuit is used for solving the problems that data processing of a 485 communication circuit in the prior art is troublesome and indirect, the utilization value of chip pins is wasted, and the automatic transceiving function cannot be realized.

Description

485 communication is from receiving and dispatching circuit

Technical Field

The utility model relates to an instrument and meter, industrial control field especially relate to a 485 communication is from transceiver circuit.

Background

In the existing communication circuit, a 485 communication chip U1 is mostly adopted to achieve the communication function of RS-485; the 485 communication chip U1 is provided with a sending enable end DE, a receiving enable end RE, a receiving output end RO and a sending input end DI; when the transmission enable pin and the receiving enable pin are in a closed state, the transmission enable pin and the receiving enable pin are in a high-impedance state; when the sending enable pin and the receiving enable pin are in a receiving state, the input end is open or short-circuited, and the output of the receiver is high level. As shown in fig. 1, in the conventional 485 circuit, except that the receiving output terminal RO pin of the 485 communication chip U1 is connected by RXD, the transmitting input terminal DI pin of the 485 communication chip U1 is connected by TXD, and one IO pin R/D of the single chip microcomputer is also connected with RE and DE. When data needs to be transmitted, the R/D is controlled to be at a high level, and the data is transmitted through the TXD; when data needs to be received, the R/D is controlled to be low level, and the data is received back through the RXD.

In the master-slave mode, after the host sends a command, the R/D is required to be immediately pulled down and is in a receiving mode; and the equipment in the slave at the same time is generally in a receiving state, and only after receiving a command sent to the equipment and needing to respond, the R/D is pulled up for sending. The existing 485 communication circuit is troublesome in data processing, not direct enough, wastes the utilization value of chip pins and most importantly cannot realize the automatic transceiving function.

SUMMERY OF THE UTILITY MODEL

In view of the above-mentioned shortcomings of the prior art, it is an object of the present invention to provide a 485 communication self-transceiver circuit for solving the above-mentioned problems.

In order to achieve the above and other related purposes, the device comprises a socket P1, a bidirectional voltage stabilizing circuit, a communication circuit and a switch circuit which are connected in sequence, wherein the communication circuit adopts a 485 communication chip U1, the switch circuit comprises an MOS tube M1 and a resistor R6, the drain of the MOS tube M1 is connected with a resistor R6, a resistor R6 is connected with VCC, the gate is connected with a TXD pin of a singlechip, and the source is connected with GND;

the receiving output end RO of the 485 communication chip U1 is connected with an RXD pin and a resistor R7 of the single chip microcomputer, the sending enabling end DE and the receiving enabling end RE are connected with a drain electrode of the MOS tube M1, the sending input end DI is connected with GND, and the other end of the resistor R7 is connected with VCC.

Preferably, the terminal Vout + of the socket P1 is connected to VCC, the terminal Vout-is connected to GND, and the terminals 485-A and 485-B are connected to a bidirectional voltage stabilizing circuit.

Preferably, the bidirectional voltage stabilizing circuit comprises a plurality of resistors and a plurality of bidirectional voltage stabilizing diodes;

the 485-A end is connected with a bidirectional voltage stabilizing diode D1, a bidirectional voltage stabilizing diode D2, a pull-up resistor R1 and a resistor R3, the other end of the bidirectional voltage stabilizing diode D1 is connected with GND, and the other end of the pull-up resistor R1 is connected with VCC;

the 485-B end is connected with a bidirectional voltage stabilizing diode D3, a bidirectional voltage stabilizing diode D2, a pull-down resistor R4 and a resistor R2, the other ends of the bidirectional voltage stabilizing diode D3 and the pull-down resistor R4 are connected with GND, and the other end of the resistor R2 is connected with a resistor R5.

Preferably, pin a of the 485 communication chip U1 is connected with a resistor R3 and a resistor R5, pin B is connected with a resistor R2 and a resistor R5, a GND pin is connected with GND, a VCC pin is connected with capacitors C1 and VCC, and the other end of the capacitor C1 is connected with GND.

Preferably, the MOS transistor M1 is an NPN transistor.

As described above, the utility model discloses following beneficial effect has:

1. the utility model adopts the MOS transistor M1 to form a switch circuit, and the IO pin R/D of the singlechip is no longer used to control the sending enable end DE and the receiving enable end RE of the 485 communication chip U1; when receiving data, the data are automatically transmitted to the singlechip through the RXD pin, and when transmitting the data, the data are automatically transmitted through the TXD pin. Therefore, only the sending input end DI and the receiving output end RO of the 485 communication chip U1 need to be connected, so that the self-receiving and sending functions are realized, the advantage of simple and rapid data processing is achieved, and the utilization value of the U1 pin of the 485 communication chip is improved.

2. The utility model provides a pull-up resistance R1 and pull-down resistance R4 are used for protecting 485 communication chip U1, and when 485 communication chip U1 was in the idle state of no connection, pull-up resistance R1 and pull-down resistance R4 can provide network failure protection for it, improve the reliability of RS485 node and network. When all transmitters on the RS485 bus are forbidden, the receiver outputs logic 0, which can mistakenly think that the start of a communication frame causes abnormal work, so that the potential of the A end is higher than the potentials of the B ends, thus the level of the RXD pin presents a unique high level in the period that the 485 bus does not transmit (when the bus is suspended), and the singlechip cannot be interrupted by mistake to receive a careless character.

Drawings

Fig. 1 shows a 485 communication circuit diagram disclosed in the prior art.

Fig. 2 shows a 485 communication self-transceiving circuit diagram according to the present invention.

Detailed Description

The following description of the embodiments of the present invention is provided for illustrative purposes, and other advantages and effects of the present invention will be readily apparent to those skilled in the art from the disclosure herein. The present invention can also be implemented or applied through other different specific embodiments, and various details in the present specification can be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It is to be noted that the features in the following embodiments and examples may be combined with each other without conflict.

It should be noted that the drawings provided in the following embodiments are only for illustrating the basic concept of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the form, amount and ratio of the components in actual implementation may be changed at will, and the layout of the components may be more complicated.

Referring to fig. 2, the utility model provides a 485 communication is from transceiver circuit, including socket P1, two-way voltage stabilizing circuit, communication circuit and the switch circuit that connects in order, communication circuit adopts 485 communication chip U1, and the switch circuit includes MOS pipe M1 and resistance R6, and MOS pipe M1's drain electrode is connected with resistance R6, and resistance R6 connects the VCC, and the grid is connected with the TXD pin of singlechip, and GND is connected to the source electrode;

In the embodiment, a MOS transistor M1 is connected to form a switch circuit, and the high level is conducted. When the TXD pin is at a high level, the MOS transistor M1 is turned on, the receive enable terminal RE and the transmit enable terminal DE are connected to GND, and the MOS transistor M1 is turned off, and the receive enable terminal RE and the transmit enable terminal DE are connected to a high level, and the MOS transistor M1 is in a receive state.

Based on the above embodiment, the terminal Vout + of the socket P1 is connected to VCC, the terminal Vout-is connected to GND, and the terminals 485-A and 485-B are connected to a bidirectional voltage stabilizing circuit.

Based on the above embodiment, the bidirectional voltage stabilizing circuit comprises a plurality of resistors and a plurality of bidirectional voltage stabilizing diodes;

Based on the above embodiment, pin a of the 485 communication chip U1 is connected with resistor R3 and resistor R5, pin B is connected with resistor R2 and resistor R5, the GND pin is connected with GND, the VCC pin is connected with capacitors C1 and VCC, and the other end of capacitor C1 is connected with GND.

In this embodiment, the pull-up resistor R1 and the pull-down resistor R4 are used for protecting the 485 communication chip U1, the model of the 485 communication chip U1 is specifically MAX485, when the 485 communication chip U1 is in an unconnected idle state, the pull-up resistor R1 and the pull-down resistor R4 can provide network failure protection, reliability of an RS485 node and a network is improved, when all transmitters on the RS485 bus are prohibited, the receiver outputs logic 0, which may mistakenly consider that the start of a communication frame causes abnormal operation, so that the terminal a is higher than the terminal B, the level of the RXD pin presents a unique high level during a period when the 485 bus is not transmitting (when the bus is suspended), and the single chip microcomputer is not interrupted by mistake to receive a careless character.

A bidirectional voltage stabilizing diode is added to a A, B pin of the 485 communication chip U1, so that the voltage of GND and the voltage between A, B pins are controlled within 6.5V by a A, B pin, and the 485 communication chip U1 is protected.

Based on the above embodiments, the MOS transistor M1 is an NPN transistor.

The data transmission process comprises the following steps: when the TXD pin of the singlechip sends a low level, the MOS pipe M1 is not conducted, the sending enabling end DE is connected with a high level to enter a sending mode, the 485 communication chip U1 automatically sends the level on the sending input end DI to the A, B pin for outputting, the sending input end DI is connected with GND, so that the A, B pin outputs 0, and the receiving output end RO displays a low level.

When the TXD pin sends a high level, the MOS tube M1 is conducted, the RE of the receiving enabling end is connected with a low level, the receiving mode is entered, the 485 chip automatically enables the A, B pin to enter a high-resistance state, and the resistor R1 pulls the pin A high and the resistor R4 pulls the pin B low, so that the pin A, B transmits the high level; the receiving output RO receives the data transmitted from the A, B pin, and shows high level because a > B.

To sum up, the utility model discloses can realize receiving and dispatching data function certainly, data processing is simple swift, and has improved the value of utilizing of 485 communication chip U1 pin. Therefore, the utility model effectively overcomes various defects in the prior art and has high industrial utilization value.

The above embodiments are merely illustrative of the principles and effects of the present invention, and are not to be construed as limiting the invention. Modifications and variations can be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which may be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.

Claims

1. A485 communication self-transceiving circuit is characterized by comprising a socket P1, a bidirectional voltage stabilizing circuit, a communication circuit and a switch circuit which are connected in sequence, wherein the communication circuit adopts a 485 communication chip U1, the switch circuit comprises an MOS tube M1 and a resistor R6, the drain electrode of the MOS tube M1 is connected with a resistor R6, a resistor R6 is connected with VCC, the grid electrode of the resistor R6 is connected with a TXD pin of a singlechip, and the source electrode of the resistor R6 is connected with GND;

2. The 485 communication self-transceiver circuit of claim 1, wherein: the terminal Vout + of the socket P1 is connected with VCC, the terminal Vout-is connected with GND, and the terminals 485-A and 485-B are connected with a bidirectional voltage stabilizing circuit.

3. The 485 communication self-transceiver circuit of claim 2, wherein: the bidirectional voltage stabilizing circuit comprises a plurality of resistors and a plurality of bidirectional voltage stabilizing diodes;

4. The 485 communication self-transceiver circuit of claim 3, wherein: the pin A of the 485 communication chip U1 is connected with a resistor R3 and a resistor R5, the pin B is connected with a resistor R2 and a resistor R5, the pin GND is connected with GND, the pin VCC is connected with a capacitor C1 and VCC, and the other end of the capacitor C1 is connected with GND.

5. The 485 communication self-transceiver circuit of claim 1, wherein: the MOS transistor M1 is an NPN type triode.