CN208971390U - Power supply switch circuit - Google Patents
Power supply switch circuit Download PDFInfo
- Publication number
- CN208971390U CN208971390U CN201821721554.0U CN201821721554U CN208971390U CN 208971390 U CN208971390 U CN 208971390U CN 201821721554 U CN201821721554 U CN 201821721554U CN 208971390 U CN208971390 U CN 208971390U
- Authority
- CN
- China
- Prior art keywords
- voltage
- type high
- mos pipe
- source
- grid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn - After Issue
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 25
- 230000000694 effects Effects 0.000 claims description 9
- 239000000758 substrate Substances 0.000 claims description 8
- 230000005611 electricity Effects 0.000 description 13
- 238000000034 method Methods 0.000 description 9
- 230000003071 parasitic effect Effects 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 5
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 230000006837 decompression Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
Landscapes
- Dc-Dc Converters (AREA)
Abstract
The utility model discloses power supply switch circuit, the power supply switch circuit includes the switching circuit that the first power voltage terminal VIN, second source voltage end VOUT and supply voltage switch output end VDD, the level switch driving circuit that N-type high-voltage MOS pipe is constituted, voltage clamp circuit and p-type high-voltage MOS pipe composition, and the level switch driving circuit, the voltage clamp circuit and the switching circuit are both connected to same voltage node；The level switch driving circuit is acted on according to the voltage clamping of the voltage of the first power voltage terminal VIN of input and the voltage comparison result of second source voltage end VOUT and the voltage clamp circuit, the voltage of the first power voltage terminal VIN of the switching circuit switching output or the voltage of second source voltage end VOUT are controlled, and guarantees that the pressure voltage of the grid source of the p-type high-voltage MOS pipe and the N-type high-voltage MOS pipe is no more than the pressure voltage of the grid source of low pressure metal-oxide-semiconductor.
Description
Technical field
The utility model relates to switch power technology fields, and in particular to a kind of DC-DC transformation based on BCD making technology
Device, use the power supply switch circuit of the high-voltage MOS pipe of high drain-source pressure resistance.
Background technique
DC-DC converter is widely used in portable electronic equipment.Buck-Boost (buck) DC-DC (direct current
Converter) different operating modes are divided according to the relationship between input voltage VIN and output voltage VO UT, when VIN is greater than
When VOUT, system is in Buck (decompression) mode；When VIN is approximately equal to VOUT, system work (rises in Buck-Boost
Decompression) mode；When VIN is less than VOUT, system works under Boost (boosting) mode.Due to present portable electronic
BOOST circuit in equipment is designed frequently with the simultaneous techniques of integrated power pipe, so, in existing Switching Power Supply product,
When system is under different operating modes, by a power supply power supply switching circuit come the power supply of unified submodule, but this
Class switching circuit often increases the area of DC-DC chip, increases chip cost.
On the other hand, the manufacturing process of power supply product is usually BCD technique at present, this technique containing bipolar, CMOS,
DMOS and common resistance capacitor device, wherein high-voltage MOS pipe is usually used in bearing the high-pressure section in circuit.Although high pressure
The drain-source end of metal-oxide-semiconductor can bear the high-pressure section in circuit, but the pressure resistance of the pressure voltage of its grid source or low pressure metal-oxide-semiconductor
Value.
Utility model content
In order to overcome a series of technological deficiencies of the DC-DC converter under BCD making technology, the utility model proposes one kind
The power supply switch circuit being easily achieved in integrated circuits, its technical solution is as follows: power supply switch circuit, the power supply switch circuit
Switch output end VDD with the first power voltage terminal VIN, second source voltage end VOUT and supply voltage, wherein the first power supply
Voltage end VIN accesses the input voltage of DC-DC converter, and second source voltage end VOUT accesses the output electricity of DC-DC converter
Pressure, supply voltage switching output end VDD are used to provide supply voltage for the Subcircuits module of DC-DC converter, and the power supply is cut
Changing circuit includes level switch driving circuit, voltage clamp circuit as composed by N-type high-voltage MOS pipe and by p-type high-voltage MOS pipe
The switching circuit of composition, the level switch driving circuit, the voltage clamp circuit and the switching circuit are both connected to
One voltage node A and second voltage node B；The level switch driving circuit, for the electricity according to the first power voltage terminal VIN
The voltage comparison result of pressure and second source voltage end VOUT adjust the drain voltage of the N-type high-voltage MOS pipe, and described in cooperation
Voltage clamp circuit acts on the voltage clamping of first voltage node A and second voltage node B, controls institute in the switching circuit
The conducting and cut-off for the p-type high-voltage MOS pipe stated complete the first electricity of switching output in supply voltage switching output end VDD to realize
While the voltage of the voltage of source voltage end VIN or second source voltage end VOUT, guarantee the p-type high-voltage MOS pipe and the N
The pressure voltage of the grid source of type high-voltage MOS pipe is no more than the pressure voltage of the grid source of low pressure metal-oxide-semiconductor.
Further, the switching circuit includes the first p-type high-voltage MOS pipe P1 and the second p-type high-voltage MOS pipe P2, wherein
The drain electrode of first p-type high-voltage MOS pipe P1 connects second source voltage end VOUT, the drain electrode connection of the second p-type high-voltage MOS pipe P2 the
The source electrode of one power voltage terminal VIN, the source electrode of the first p-type high-voltage MOS pipe P1 and the second p-type high-voltage MOS pipe P2 are all connected to electricity
Source voltage switches output end VDD, and the grid of the first p-type high-voltage MOS pipe P1 connects first voltage node A, the second p-type high-pressure MOS
The grid of pipe P2 connects second voltage node B.
Further, the voltage clamp circuit includes the first PMOS tube MP1 and the second PMOS tube MP2, the first PMOS tube
The grid of the grid of MP1 and the second PMOS tube MP2 are connected to first voltage node A, the source electrode and second of the first PMOS tube MP1
The source electrode of PMOS tube MP2 is both connected to grid and its drain electrode connection of supply voltage switching output end VDD, the first PMOS tube MP1
In first voltage node A, the drain electrode of the second PMOS tube MP2 is connected to second voltage node B.
Further, the level switch driving circuit includes voltage comparator U1, phase inverter INV, the first N-type high pressure
Metal-oxide-semiconductor M1, the second N-type high-voltage MOS pipe M2 and the first current source I1 being connected respectively with the two N-type high-voltage MOS pipes and
Two current source I2；The backward end-of voltage comparator U1 is connect with the first power voltage terminal VIN, voltage comparator U1 it is in the same direction end+
It is connect with second source voltage end VOUT, the output end of voltage comparator U1 connects the input terminal and the first N of phase inverter INV simultaneously
The grid of type high-voltage MOS pipe M1, the output end of phase inverter INV connect the grid of the second N-type high-voltage MOS pipe M2；First N-type high pressure
The drain electrode of metal-oxide-semiconductor M1 connects first voltage node A, and the drain electrode of the second N-type high-voltage MOS pipe M2 connects second voltage node B；First
The source electrode and its substrate of N-type high-voltage MOS pipe M1 are connected to the anode of the first current source I1, the source electrode of the second N-type high-voltage MOS pipe M2
And its substrate is connected to the anode of the second current source I2；The negative terminal of the negative terminal of first current source I1 and the second current source I2 connect simultaneously
Enter earthing power supply voltage VSS.
Compared with prior art, the technical solution of the utility model has the advantage that institute provided by the utility model
The circuit structure for stating power supply switch circuit is simple, can be according to the voltage change of input supply terminal, in high pressure under BCD making technology
Under the premise of the grid source voltage terminal difference of metal-oxide-semiconductor and low pressure metal-oxide-semiconductor is no more than the pressure voltage of low pressure metal-oxide-semiconductor, voltage is automatically selected most
Power supply of the high power supply as DC-DC converter in-line power module guarantees the power supply automatic steady under BCD manufacturing process
Switching, to improve the reliability of circuit handoff procedure；In addition, the power supply switch circuit is under BCD making technology, inside
Electric current can be served as a contrast by the source of high-voltage MOS pipe between parasitic body diode carry out afterflow, to slow down the change rate of electric current,
Improve the reliability of circuit.
Detailed description of the invention
Fig. 1 is a kind of circuit frame schematic diagram of the power supply switch circuit provided in the utility model embodiment.
Specific embodiment
In buck (Buck-Boost) DC-DC converter, certain Subcircuits modules need Buck (decompression),
Power supply under Buck-Boost (buck) or Boost (boosting) different mode, and one kind that the utility model embodiment discloses
Power supply switch circuit is then applicable in the power supply of this Subcircuits module.Provided by the embodiment of the utility model is a kind of based on BCD system
The DC-DC converter of journey technique, using the power supply switch circuit for the high-voltage MOS pipe for being resistant to high-voltage value between leakage, source electrode, at this
Under embodiment, the pressure voltage between the drain-source of high-voltage MOS pipe reaches 12V or more.The power supply switch circuit is for switching DC-DC
The biggish supply voltage of numerical value is powered to the internal subcircuits module needed in the input voltage and output voltage of converter,
DC-DC converter is inputted voltage as supply voltage in startup stage and is supplied to the Subcircuits module, when DC-DC is converted
After the output voltage of device is higher than the certain nargin of its input voltage, the power supply switch circuit automatically switches the input voltage
For the output voltage, it then is supplied to internal subcircuits module as the supply voltage, and ensures the power supply switching electricity
All drop is between the drain-source end of high-voltage MOS pipe for the high-pressure section on road, to realize the system of the DC-DC converter under BCD technique
It makes.
As shown in Fig. 1, power supply switch circuit provided by the embodiment of the utility model includes being made of N-type high-voltage MOS pipe
Level switch driving circuit, voltage clamp circuit and the switching circuit being made of p-type high-voltage MOS pipe.The power supply switching electricity
There is the first power voltage terminal VIN, second source voltage end VOUT and supply voltage to switch output end VDD on road, wherein the first electricity
Source voltage end VIN accesses the input voltage of DC-DC converter, and second source voltage end VOUT accesses the output of DC-DC converter
Voltage, supply voltage switching output end VDD are used to provide supply voltage for the Subcircuits module of DC-DC converter.The level
Switch driving circuit, the voltage clamp circuit and the switching circuit are both connected to first voltage node A and second voltage section
Point B.The level switch driving circuit, for the voltage and second source voltage end VOUT according to the first power voltage terminal VIN
Voltage comparison result export corresponding voltage in the drain electrode of the N-type high-voltage MOS pipe, and cooperate the voltage clamp circuit
Current potential clamp down on effect, the voltage of first voltage node A and second voltage node B are vised respectively in the different level shape of height
Under state, the conducting of p-type high-voltage MOS pipe described in the switching circuit and off state are then by reversed voltage signal control
System completes the voltage or second of the first power voltage terminal VIN of switching output in supply voltage switching output end VDD to realize
The voltage of power voltage terminal VOUT is then based on the supply voltage control that supply voltage switching output end VDD completes switching output
The pressure voltage of the grid source of the p-type high-voltage MOS pipe and the N-type high-voltage MOS pipe is no more than the resistance to of the grid source of low pressure metal-oxide-semiconductor
Pressure value, at the same also ensure that the grid source of low pressure metal-oxide-semiconductor voltage and its drain-source end voltage all in safety pressure voltage range
It is interior.
The switching circuit includes the first p-type high-voltage MOS pipe P1 and the second p-type high-voltage MOS pipe P2, wherein the first p-type is high
The drain electrode of metal-oxide-semiconductor P1 is pressed to connect second source voltage end VOUT, the drain electrode of the second p-type high-voltage MOS pipe P2 connects the first power supply electricity
The source electrode of pressure side VIN, the source electrode of the first p-type high-voltage MOS pipe P1 and the second p-type high-voltage MOS pipe P2 are all connected to supply voltage and cut
Output end VDD is changed, so that the first p-type high-voltage MOS pipe P1 and the second p-type high-voltage MOS pipe P2 are as switching tube.First p-type high pressure
The grid of metal-oxide-semiconductor P1 connects first voltage node A, and the grid of the second p-type high-voltage MOS pipe P2 connects second voltage node B, and first
The control node of voltage node A and second voltage node B as the switching circuit, in conjunction with the voltage clamp circuit and described
Comparison result of the level switch driving circuit to the voltage of the first power voltage terminal VIN and the voltage of second source voltage end VOUT
Control action, realize that supply voltage switching output end VDD completes the voltage or the of the first power voltage terminal VIN of switching output
The voltage of two power voltage terminal VOUT.Specifically, the source electrode of the first p-type high-voltage MOS pipe P1 and the substrate of metal-oxide-semiconductor are connected to power supply
Voltage switches output end VDD, and the source electrode of the second p-type high-voltage MOS pipe P2 and the substrate of metal-oxide-semiconductor are also connected to supply voltage switching
Output end VDD.During powering on or power down, because there are second source voltage end VOUT to arrive by the first p-type high-voltage MOS pipe P1
Supply voltage switches the parasitic body diode of output end VDD, while there is also the first power supply electricity by the second p-type high-voltage MOS pipe P2
The parasitic body diode of pressure side VIN to supply voltage switching output end VDD, so supply voltage switching output end VDD will not go out
Show voltage jump and form surge current, so that the first power voltage terminal VIN and second source voltage end VOUT and supply voltage
There are good voltage, a current path between switching output end VDD, to provide power supply to numerous submodular circuits.?
During voltage and second source voltage end VOUT the switching output of first power voltage terminal VIN, the first p-type high-voltage MOS pipe
The gate source voltage of the gate source voltage of P1 and the second p-type high-voltage MOS pipe P2 are no more than the pressure resistance of the grid source of existing low pressure metal-oxide-semiconductor
Value.
The voltage clamp circuit includes the first PMOS tube MP1 and the second PMOS tube MP2, the grid of the first PMOS tube MP1
First voltage node A, the source electrode of the first PMOS tube MP1 and the second PMOS tube MP2 are connected to the grid of the second PMOS tube MP2
Source electrode be both connected to supply voltage switching output end VDD, the grid of the first PMOS tube MP1 and its drain electrode are connected to first voltage
Node A, the drain electrode of the second PMOS tube MP2 are connected to second voltage node B.The drain electrode of first PMOS tube MP1 is connected to grid
Diode structure is constituted together, for according to the voltage of the first power voltage terminal VIN and the voltage of second source voltage end VOUT
Comparison result vises the voltage of first voltage node A, and then latches the on state of the first p-type high-voltage MOS pipe P1 of control；Equally
Ground, the second PMOS tube MP2 according to the voltage of the first power voltage terminal VIN and the voltage of second source voltage end VOUT for comparing
As a result the voltage of second voltage node B is vised, and then latches the on state of the second p-type high-voltage MOS pipe P2 of control, so that first
The gate source voltage of PMOS tube MP1 and the second PMOS tube MP2 are no more than the pressure voltage of the grid source of existing low pressure metal-oxide-semiconductor, and its
The voltage at drain-source end is also no more than the pressure voltage at the drain-source end of existing low pressure metal-oxide-semiconductor.
The level switch driving circuit includes voltage comparator U1, phase inverter INV, the first N-type high-voltage MOS pipe M1,
Two N-type high-voltage MOS pipe M2, the first current source I1 and the second current source I2；Wherein, in the operating voltage domain of voltage comparator U1
Positive voltage domain is set as the voltage of the first power voltage terminal VIN, and negative voltage domain is set as earthing power supply voltage VSS；Phase inverter INV
Operating voltage domain in positive voltage domain the voltage for being dimensioned to the first power voltage terminal VIN, the size in negative voltage domain sets
It is set to earthing power supply voltage VSS.The backward end-of voltage comparator U1 is connect with the first power voltage terminal VIN, voltage comparator U1
It is in the same direction hold+connect with second source voltage end VOUT, the output end of voltage comparator U1 connects the input of phase inverter INV simultaneously
The grid at end and the first N-type high-voltage MOS pipe M1, the output end of phase inverter INV connect the grid of the second N-type high-voltage MOS pipe M2；The
The drain electrode of one N-type high-voltage MOS pipe M1 connects first voltage node A, and the drain electrode of the second N-type high-voltage MOS pipe M2 connects second voltage
Node B.The grid of first N-type high-voltage MOS pipe M1 and the second N-type high-voltage MOS pipe M2 receive opposite signal under identical conditions
Control, for according to voltage comparator U1 to the voltage of the first power voltage terminal VIN and the voltage of second source voltage end VOUT
Comparison result adjust the drain voltage of the first N-type high-voltage MOS pipe M1 and the drain voltage of the second N-type high-voltage MOS pipe M2 respectively,
And then drive control power supply voltage switching output end VDD completes the voltage or second of switching output the first power voltage terminal (VIN)
The voltage of power voltage terminal VOUT.In addition, the source electrode and its substrate of the first N-type high-voltage MOS pipe M1 are connected to the first current source I1
Anode, the source electrode and its substrate of the second N-type high-voltage MOS pipe M2 are connected to the anode of the second current source I2, the first current source I1
Negative terminal and the negative terminal of the second current source I2 access earthing power supply voltage VSS simultaneously, then the first N-type high-voltage MOS pipe M1 and the 2nd N
Type high-voltage MOS pipe M2 constitute a current mirror relation, be formed simultaneously power supply to ground current path.In the first power voltage terminal
VIN voltage and second source voltage end VOUT switching output during, the gate source voltage of the first N-type high-voltage MOS pipe M1 and
The gate source voltage of second N-type high-voltage MOS pipe M2 is no more than the pressure voltage of the grid source of existing low pressure metal-oxide-semiconductor.
It should be noted that due to the input voltage of the first power voltage terminal VIN access DC-DC converter, so first
The voltage representative value of power voltage terminal VIN is 5V, equal to the pressure voltage of the grid source of existing low pressure metal-oxide-semiconductor.Earthing power supply electricity
Pressure VSS be set as 0V, the voltage representative value of second source voltage end VOUT is set greater than the voltage of VIN, can be 12V or
It is higher, equal to the pressure voltage at the drain-source end of existing high-voltage MOS pipe.Wherein, the unlatching threshold value of high-voltage MOS pipe is preferably 5V.
The power supply switch circuit in conjunction with described in attached drawing 1, the utility model embodiment provide the specific of the power supply switch circuit
Working principle: when the output end of voltage comparator U1 is low level (logical zero, corresponding 0V), the first power voltage terminal VIN is indicated
Voltage be greater than second source voltage end VOUT voltage, under the present embodiment, the voltage of the first power voltage terminal VIN is set as
The voltage of 5V, second source voltage end VOUT are set as 2V.This is in the startup stage of DC-DC converter.In the level
In switch driving circuit, the first N-type high-voltage MOS pipe M1 is closed in the low level control of the output end of voltage comparator U1, then
The low level of the output end of voltage comparator U1, which negates effect by the level of phase inverter, becomes high level (logic 1, corresponding 5V),
The second N-type high-voltage MOS pipe M2 is connected, since the current regulation of the second current source I2 acts on, so the second N-type high-voltage MOS pipe M2
Grid source voltage terminal be no more than the first power voltage terminal VIN 5V voltage.
In the voltage clamp circuit, the drain electrode of the first PMOS tube MP1 and its grid link together and constitute diode
Structure is equivalent to and first voltage node A is accessed supply voltage switching output end VDD by a resistance, due to the first N-type height
Pressure metal-oxide-semiconductor M1 is in off state, so the voltage of first voltage node A, which is pulled up close to supply voltage, switches output end VDD
Voltage, and voltage or so in supply voltage switching output end VDD is vised, and due to the grid of the second PMOS tube MP2
First voltage node A is connected, the source electrode connection supply voltage of the second PMOS tube MP2 switches output end VDD, so the second PMOS tube
The grid voltage of MP2 causes the second PMOS tube MP2 to close close to its source voltage.
It should be noted that in the switching circuit, due to the second p-type high-voltage MOS pipe P2 and the first p-type high-voltage MOS pipe
There are parasitic diodes by P1, so before the second p-type high-voltage MOS pipe P2 and the first p-type high-voltage MOS pipe P1 are not turned on, power supply
The current potential that voltage switches output end VDD is in high pressure conditions under the afterflow effect of the parasitic diode, close to 5V or so.Then
The leakage source voltage terminal of first N-type high-voltage MOS pipe M1 is no more than the 5V voltage of the first power voltage terminal VIN.
After second N-type high-voltage MOS pipe M2 conducting, under the adjustment effect of the second current source I2, the electricity of second voltage node B
Position is pulled down to earthing power supply voltage VSS(0V), to the second p-type high-voltage MOS pipe P2 is connected, so that in the switching circuit
In, the 5V voltage transmission of the first power voltage terminal VIN switches output end VDD to supply voltage, wherein the second p-type high-voltage MOS pipe
The absolute value of voltage of the grid source of P2 is 5V, no more than the 5V voltage of the first power voltage terminal VIN.Then, first voltage node A
Voltage increase be the first power voltage terminal VIN 5V voltage, close the first p-type high-voltage MOS pipe P1, second source voltage end
The 2V voltage of VOUT can not be transmitted to supply voltage switching output end VDD by the first p-type high-voltage MOS pipe P1, at this point, the first P
Bear the high pressure of supply voltage switching output end VDD and the electricity of second source voltage end VOUT in the drain-source end of type high-voltage MOS pipe P1
The pressure difference of pressure, i.e. 5V-2V=3V, the absolute value of voltage of the grid source of the first p-type high-voltage MOS pipe P1 is close to 0.Meanwhile the first PMOS
Close to 0, the 12V voltage of first voltage node A controls in the voltage clamp circuit absolute value of voltage of the grid source of pipe MP1
Second PMOS tube MP2 is closed, then the current potential of second voltage node B will not be pulled up, and is vised instead left in earthing power supply voltage VSS
The right side, the voltage at the drain-source end of the second PMOS tube MP2 is close to 5V, in the pressure-resistant range of safety.In conclusion the utility model is real
The power supply switch circuit for applying example offer is provided input voltage as supply voltage automatically during the startup stage
Chip interior partial circuit is given, so that circuit performance of handoffs is reliable and stable.
When the output end of voltage comparator U1 is high level (logic 1, corresponding 5V), the first power voltage terminal VIN is indicated
Voltage be less than second source voltage end VOUT voltage, under the present embodiment, the voltage of the first power voltage terminal VIN is set as
The voltage of 5V, second source voltage end VOUT are set as 12V.In the level switch driving circuit, voltage comparator U1's
Output end exports high level (logic 1, corresponding 5V), and the first N-type high-voltage MOS pipe M1, the then output of voltage comparator U1 is connected
The high level at end, which negates effect by the level of phase inverter, becomes low level (logical zero, corresponding 0V), closes the second N-type high-pressure MOS
Pipe M2.Since the current regulation of the first current source I1 acts on, so the grid source voltage terminal of the first N-type high-voltage MOS pipe M1 is no more than
The 5V voltage of first power voltage terminal VIN.
In the voltage clamp circuit, the drain electrode of the first PMOS tube MP1 and its grid link together and constitute diode
Structure, since the first N-type high-voltage MOS pipe M1 is in the conductive state, so electric current of the first voltage node A in the first current source I1
Under adjustment effect, voltage value is pulled down to the voltage of second source voltage end VOUT and the electricity of the first power voltage terminal VIN
The pressure difference of pressure corresponds to pressure difference 12V-5V=7V, and vised in 7V voltage or so, by the first N-type high-voltage MOS pipe M1's
It bears at drain-source end.And since the grid of the second PMOS tube MP2 connects first voltage node A, the source electrode of the second PMOS tube MP2 connects
Supply voltage switching output end VDD is met, so the grid source voltage terminal of the second PMOS tube MP2 is equal to the grid source of the first PMOS tube MP1
Hold voltage.
It should be noted that in the switching circuit, due to the second p-type high-voltage MOS pipe P2 and the first p-type high-voltage MOS pipe
There are parasitic diodes by P1, so before the second p-type high-voltage MOS pipe P2 and the first p-type high-voltage MOS pipe P1 are not turned on, power supply
The current potential that voltage switches output end VDD is in high pressure conditions under the afterflow effect of the parasitic diode, close to 12V or so.
Again since first voltage node A is vised in 7V voltage or so, so the 2nd PMOS that the second PMOS tube MP2 can be connected, and be connected
The grid source voltage terminal of pipe MP2 is no more than the 5V voltage of the first power voltage terminal VIN, and the drain-source end of the second PMOS tube MP2 is born
The voltage of 12V-7V=5V.Meanwhile voltage turn-on the first p-type high-voltage MOS pipe P1 is vised at first voltage node A, so that second
The 12V voltage transmission of power voltage terminal VOUT switches output end VDD to supply voltage, at this point, the first p-type high-voltage MOS pipe P1
Grid source voltage terminal is no more than 5V.
After second N-type high-voltage MOS pipe M2 is closed, under the adjustment effect of the second current source I2, the second N-type high-voltage MOS pipe
The source electrode of M2 is pulled down to earthing power supply voltage VSS, and pull-up of the second voltage node B in the second PMOS tube MP2 of conducting is made
It is pulled under close to 12V, the second p-type high-voltage MOS pipe P2 is closed, so that the 12V high pressure at second voltage node B is by second
The drain-source end of N-type high-voltage MOS pipe M2 is born, and the drain-source end of the second p-type high-voltage MOS pipe P2 bears supply voltage and switches output end
The pressure difference of the voltage of the high pressure of VDD and the first power voltage terminal VIN, i.e. 12V-5V=7V, and the 5V of the first power voltage terminal VIN
Voltage can not be transmitted to supply voltage switching output end VDD by the second p-type high-voltage MOS pipe P2.In conclusion in the power supply
In switching circuit, after output exceeds input voltage certain nargin, which is switched to output voltage for input voltage automatically, makees
It is supplied to chip interior partial circuit for supply voltage, and ensures that the high-pressure section of internal circuit is all dropped in high-voltage MOS pipe
Drain-source between, realize manufacture based on the power supply switch circuit under BCD technique.
The application preferred forms above described embodiment only expresses, the description thereof is more specific and detailed, but not
The limitation to the application the scope of the patents therefore can be interpreted as.It should be pointed out that it will be apparent to those skilled in the art that not
It is detached under the concept thereof of the application, several deformations or improvement made belong to the protection scope of the application.
In embodiment provided herein, it should be understood that disclosed systems, devices and methods can pass through
Other modes are realized.For example, the apparatus embodiments described above are merely exemplary, for example, the division of the unit,
Only a kind of logical function partition, there may be another division manner in actual implementation, such as multiple units or components can be with
In conjunction with or be desirably integrated into another system, or some features can be ignored or not executed.Another point, it is shown or discussed
Mutual coupling, direct-coupling or communication connection can be through some interfaces, the INDIRECT COUPLING of device or unit or
Communication connection can be electrical property, mechanical or other forms.The unit as illustrated by the separation member can be or can also
Not to be physically separated, component shown as a unit may or may not be physical unit, it can be located at
One place, or may be distributed over multiple network units.Can select according to the actual needs part therein or
Whole units realize the mesh of this embodiment scheme.
Claims (4)
1. power supply switch circuit, which has the first power voltage terminal (VIN), second source voltage end (VOUT)
Switching output end (VDD) with supply voltage, wherein the first power voltage terminal (VIN) accesses the input voltage of DC-DC converter,
Second source voltage end (VOUT) accesses the output voltage of DC-DC converter, and supply voltage switching output end (VDD) is for being
The Subcircuits module of DC-DC converter provides supply voltage, which is characterized in that the power supply switch circuit includes by N-type high pressure
Level switch driving circuit, voltage clamp circuit composed by metal-oxide-semiconductor and the switching circuit being made of p-type high-voltage MOS pipe, it is described
Level switch driving circuit, the voltage clamp circuit and the switching circuit are both connected to first voltage node (A) and second
Voltage node (B)；
The level switch driving circuit, for the voltage and second source voltage end according to the first power voltage terminal (VIN)
(VOUT) voltage comparison result adjusts the drain voltage of the N-type high-voltage MOS pipe, and cooperates the voltage clamp circuit to
The effect of the voltage clamping of one voltage node (A) and second voltage node (B), controls p-type high pressure described in the switching circuit
The conducting and cut-off of metal-oxide-semiconductor complete switching the first power voltage terminal of output in supply voltage switching output end (VDD) to realize
(VIN) while the voltage of voltage or second source voltage end (VOUT), guarantee that the p-type high-voltage MOS pipe and the N-type are high
The pressure voltage of the grid source of metal-oxide-semiconductor is pressed to be no more than the pressure voltage of the grid source of low pressure metal-oxide-semiconductor.
2. power supply switch circuit according to claim 1, which is characterized in that the switching circuit includes the first p-type high-pressure MOS
Manage (P1) and the second p-type high-voltage MOS pipe (P2), wherein the drain electrode of the first p-type high-voltage MOS pipe (P1) connects second source voltage
It holds (VOUT), the drain electrode of the second p-type high-voltage MOS pipe (P2) connects the first power voltage terminal (VIN), the first p-type high-voltage MOS pipe
(P1) source electrode of source electrode and the second p-type high-voltage MOS pipe (P2) is all connected to supply voltage switching output end (VDD), the first p-type
The grid of high-voltage MOS pipe (P1) connects first voltage node (A), and the grid of the second p-type high-voltage MOS pipe (P2) connects second voltage
Node (B).
3. power supply switch circuit according to claim 1, which is characterized in that the voltage clamp circuit includes the first PMOS tube
(MP1) and the second PMOS tube (MP2), the grid of the first PMOS tube (MP1) and the grid of the second PMOS tube (MP2) are connected to
One voltage node (A), the source electrode of the first PMOS tube (MP1) and the source electrode of the second PMOS tube (MP2) are both connected to supply voltage and cut
It changes output end (VDD), the grid of the first PMOS tube (MP1) and its drain electrode are connected to first voltage node (A), the second PMOS tube
(MP2) drain electrode is connected to second voltage node (B).
4. power supply switch circuit according to claim 1, which is characterized in that the level switch driving circuit includes voltage ratio
Compared with device (U1), phase inverter (INV), the first N-type high-voltage MOS pipe (M1), the second N-type high-voltage MOS pipe (M2) and respectively with this two
A N-type high-voltage MOS pipe connected the first current source (I1) and the second current source (I2)；
The backward end (-) of voltage comparator (U1) is connect with the first power voltage terminal (VIN), the end in the same direction of voltage comparator (U1)
(+) connect with second source voltage end (VOUT), and the output end of voltage comparator (U1) connects the input of phase inverter (INV) simultaneously
The output end of the grid at end and the first N-type high-voltage MOS pipe (M1), phase inverter (INV) connects the second N-type high-voltage MOS pipe (M2)
Grid；
The drain electrode of first N-type high-voltage MOS pipe (M1) connects first voltage node (A), the drain electrode of the second N-type high-voltage MOS pipe (M2)
It connects second voltage node (B)；The source electrode and its substrate of first N-type high-voltage MOS pipe (M1) are connected to the first current source (I1)
Anode, the source electrode and its substrate of the second N-type high-voltage MOS pipe (M2) are connected to the anode of the second current source (I2)；
The negative terminal of first current source (I1) and the negative terminal of the second current source (I2) access earthing power supply voltage (VSS) simultaneously.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821721554.0U CN208971390U (en) | 2018-10-23 | 2018-10-23 | Power supply switch circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821721554.0U CN208971390U (en) | 2018-10-23 | 2018-10-23 | Power supply switch circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN208971390U true CN208971390U (en) | 2019-06-11 |
Family
ID=66760567
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201821721554.0U Withdrawn - After Issue CN208971390U (en) | 2018-10-23 | 2018-10-23 | Power supply switch circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN208971390U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109194126A (en) * | 2018-10-23 | 2019-01-11 | 珠海市微半导体有限公司 | A kind of power supply switch circuit |
-
2018
- 2018-10-23 CN CN201821721554.0U patent/CN208971390U/en not_active Withdrawn - After Issue
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109194126A (en) * | 2018-10-23 | 2019-01-11 | 珠海市微半导体有限公司 | A kind of power supply switch circuit |
| CN109194126B (en) * | 2018-10-23 | 2024-05-03 | 珠海一微半导体股份有限公司 | Power supply switching circuit |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN109039029B (en) | Bootstrap charging circuit suitable for GaN power device gate drive circuit | |
| CN104170254A (en) | System and apparatus for driver circuit for protection of gates of GaN FETs | |
| CN203206197U (en) | Delay circuit and circuit system with same | |
| CN109194126A (en) | A kind of power supply switch circuit | |
| US20130154710A1 (en) | Adaptive cascode circuit using mos transistors | |
| CN106533144B (en) | Anti-reverse and current flowing backwards circuit | |
| CN101976940A (en) | Drive bootstrap circuit for switching tube of switching power supply converter | |
| CN103219893A (en) | Switch power supply controller and switch power supply circuit | |
| CN201966801U (en) | Voltage resistance circuit | |
| CN116742920A (en) | NMOS power switch tube driving circuit and control method thereof | |
| CN107968567A (en) | A kind of nmos switch tube drive circuit | |
| CN208971390U (en) | Power supply switch circuit | |
| CN104578772A (en) | Boosting circuit | |
| CN102761257A (en) | Boost converter and control method thereof | |
| CN109660138B (en) | Active full-bridge rectifier | |
| CN108631565A (en) | Two-stage type Switching Power Supply | |
| CN110417243A (en) | A kind of high-voltage MOSFET driving circuit | |
| CN203289074U (en) | Power supply direct-supply protection circuit and set-top box | |
| CN109412436A (en) | A kind of synchronous rectification control chip and circuit | |
| CN106712497B (en) | A kind of cross-coupling charge pump | |
| CN108768358A (en) | A kind of ultra-low loss ideal diode | |
| CN202737742U (en) | DC-DC booster converter | |
| CN209072364U (en) | A kind of synchronous rectification control chip and circuit | |
| CN209516943U (en) | A kind of circuit system of the anti-over-voltage breakdown of chip embedded synchronous rectification DC/DC | |
| CN204334375U (en) | Two end rectifying devices and there is the circuit of two end rectifying devices |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20190611 Effective date of abandoning: 20240503 |
|
| AV01 | Patent right actively abandoned |
Granted publication date: 20190611 Effective date of abandoning: 20240503 |
|
| AV01 | Patent right actively abandoned | ||
| AV01 | Patent right actively abandoned |