CN208955894U - A kind of driving circuit of positive-negative power power supply half-bridge circuit - Google Patents
A kind of driving circuit of positive-negative power power supply half-bridge circuit Download PDFInfo
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- CN208955894U CN208955894U CN201821892035.0U CN201821892035U CN208955894U CN 208955894 U CN208955894 U CN 208955894U CN 201821892035 U CN201821892035 U CN 201821892035U CN 208955894 U CN208955894 U CN 208955894U
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Abstract
The utility model relates to a kind of driving circuits of positive-negative power power supply half-bridge circuit, including dead band time setting circuit, first voltage boostrap circuit, second voltage boostrap circuit, the first instantaneous common-mode suppression circuit, the second instantaneous common-mode suppression circuit and half-bridge drive circuit.Dead time can be arranged according to actual operation requirements in the dead band time setting circuit are as follows: the μ s of 100ns~10 burns to avoid complementary metal-oxide-semiconductor because of common conduct；Voltage raise circuit is made of bootstrap capacitor and zener diode, realizes effective control to complementary metal-oxide-semiconductor；Instantaneous common-mode suppression circuit is controlled by transistor switch with the reverse phase of corresponding metal-oxide-semiconductor, and the transient state common conduct in complementary metal-oxide-semiconductor " conducting " and " shutdown " stateful switchover process is inhibited, and is eliminated complementary metal-oxide-semiconductor and is damaged because of transient state common conduct.
Description
Technical field
The utility model relates to direct current generator actuation techniques fields, and in particular to a kind of positive-negative power power supply half-bridge circuit
Driving circuit.
Background technique
Direct current generator is widely used in industry and national defence, in space flight, aviation, ship, weapons, railway, communication, medical electric
It is used widely in the military-civil electronic system such as son, industrial automation equipment.Traditional either-rotation motor is brush motor, is relied on
Brush carrys out the steering of switch motor, and this brush control mode can generate biggish current impulse interference and voltage arteries and veins to system
Punching interference.Modern direct current generator is controlled using half-bridge circuit, and the one-directional rotation of direct current generator is by single supply power supply, positive arteries and veins
The revolving speed of PWM control mode control motor is rushed, and stepless speed regulation may be implemented.This control mode has used maturation in the market
Half-bridge driver monolithic integrated circuit, such as IR2110.The Double-directional rotary of direct current generator is by positive-negative power power supply, positive and negative amplitude arteries and veins
Revolving speed or the steering of signal PWM control mode control motor are rushed, motor is then positive when positive pulse width is greater than negative pulse width
Rotation, when negative pulse width is greater than positive pulse width, motor is then rotated backward, when positive pulse width is equal with negative pulse width
When motor then stop operating.And the half-bridge circuit of positive-negative power power supply, it there is no ready-made, available driving circuit both at home and abroad at present.
Utility model content
The purpose of this utility model is to provide a kind of driving circuits of positive-negative power power supply half-bridge circuit, can be according to reality
Need can self-setting dead time, eliminate half-bridge circuit common conduct, it is ensured that half-bridge circuit reliably and securely works.
To achieve the above object, the utility model uses following technical scheme:
A kind of driving circuit of positive-negative power power supply half-bridge circuit, including the bootstrapping of dead band time setting circuit, first voltage
Circuit, second voltage boostrap circuit, the first instantaneous common-mode suppression circuit, the second instantaneous common-mode suppression circuit and half-bridge driven electricity
Road；
The dead band time setting circuit ends simultaneously for being arranged and adjust two metal-oxide-semiconductors in half-bridge drive circuit
Time (i.e. dead time) avoids two metal-oxide-semiconductors in half-bridge drive circuit from simultaneously turning on (i.e. common conduct)；The first voltage
Boostrap circuit, for raising to PMOS tube G electrode potential in half-bridge drive circuit, realization is connected V14 pipe effective with cut-off
Control；The second voltage boostrap circuit, for being raised to NMOS tube in half-bridge drive circuit (V15) G electrode potential, realization pair
Effective control of V15 pipe conducting and cut-off；The first instantaneous common-mode suppression circuit, for accelerating PMOS tube (V14) by being connected
Switching of the state to off state reduces switching time to inhibit PMOS tube (V14) from being conducting in turn off process and NMOS tube
(V15) the transient state common conduct between；The second instantaneous common-mode suppression circuit, for accelerating NMOS tube (V15) by state
Switching to off state reduces switching time to inhibit NMOS tube (V15) from being conducting in turn off process and PMOS tube (V14)
Between transient state common conduct；The half-bridge drive circuit is alternately powered on for forward and reverse to load motor, realizes to motor
The control of operating speed, rotation direction.
As a further improvement of the above technical scheme:
The dead band time setting circuit includes the first current-limiting resistance (R1), the second current-limiting resistance (R2), the first triode
(V11), the second triode (V12), the first voltage-stabiliser tube (V13) and the first capacitor (C1) for adjusting dead time, described
One end of one current-limiting resistance (R1) is connect with input pulse signal, the other end and the second current-limiting resistance of the first current-limiting resistance (R1)
(R2) one end connection, the other end of the second current-limiting resistance (R2) and the base of the first triode (V11) and the second triode (V12)
The common end of pole connection, the first current-limiting resistance (R1) and the second current-limiting resistance (R2) is connected with one end of first capacitor (C1), the
The other end of one capacitor (C1) is connected with power ground, the collector and first voltage boostrap circuit of first triode (V11)
And first instantaneous common-mode suppression circuit low side connection, the emitter of the first triode (V11) and the hair of the second triode (V12)
Emitter-base bandgap grading connection, the collector and second voltage boostrap circuit of the second triode (V12) and the height of the second instantaneous common-mode suppression circuit
End is connected, and one end of first voltage-stabiliser tube (V13) is connect with the emitter of the first triode (V11), other end ground connection.
The first voltage boostrap circuit includes the first storage capacitor (C2), third current-limiting resistance (R5), the second voltage-stabiliser tube
(V5), third voltage-stabiliser tube (V9) and the first isolating diode (V7)；One end of first storage capacitor (C2) and dead time
Circuit connection is set, and the other end is connect with the anode of the first isolating diode (V7), first isolating diode (V7)
Anode is connect with the cathode of the second voltage-stabiliser tube (V5), and the anode of the second voltage-stabiliser tube (V5) is through third current-limiting resistance (R5) and positive supply
VCC is connected, and the cathode of the third voltage-stabiliser tube (V9) is connect with the cathode of the first isolating diode (V7), third voltage-stabiliser tube (V9)
Anode and dead band time setting circuit connection.
The second voltage boostrap circuit includes the second storage capacitor (C3), the 4th current-limiting resistance (R6), the second isolation two
Pole pipe (V8), the 4th voltage-stabiliser tube (V6), the 5th voltage-stabiliser tube (V10)；One end of second storage capacitor (C3) is isolated with second
The anode and dead band time setting circuit connection of diode (V8), the other end and the 4th voltage-stabiliser tube of the second storage capacitor (C3)
(V6) anode connection, the cathode of the 4th voltage-stabiliser tube (V6) are connect through the 4th current-limiting resistance (R6) with negative supply VEE, and described second
The cathode of isolating diode (V8) is connect with the cathode of the 5th voltage-stabiliser tube (V10), and the anode of the 5th voltage-stabiliser tube (V10) and the 4th is surely
The anode of pressure pipe (V6) connects.
The first instantaneous common-mode suppression circuit includes the 5th current-limiting resistance (R3), the 5th voltage-stabiliser tube (V1) and the three or three pole
It manages (V3)；The base stage of the third transistor (V3) is connect with the cathode of the 5th voltage-stabiliser tube (V1), collector and dead time
Circuit connection is set, and emitter is connect with positive supply (VCC), and the anode of the 5th voltage-stabiliser tube (V1) is through the 5th current-limiting resistance
(R3) it is connect with input pulse signal (VIN).
The second instantaneous common-mode suppression circuit includes the 6th current-limiting resistance (R4), the 6th voltage-stabiliser tube (V2) and the four or three pole
It manages (V4)；The base stage of 4th triode (V4) is connect with the anode of the 6th voltage-stabiliser tube (V2), the hair of the 4th triode (V4)
Emitter-base bandgap grading is connected with negative supply (VEE), and the collector of the 4th triode (V4) is connect with second voltage boostrap circuit, and the described 6th is steady
The cathode of pressure pipe (V2) is connect through the 6th current-limiting resistance (R4) with input pulse signal (VIN).
The half-bridge drive circuit includes the first metal-oxide-semiconductor (V14), the second NMOS tube (V15), the 4th capacitor (C4), the 7th
Resistance (R7), the 5th capacitor (C5) and the 8th resistance (R8)；The source electrode and positive supply (VCC) of first metal-oxide-semiconductor (V14) are even
It connects, the grid of the first metal-oxide-semiconductor (V14) is connect with first voltage boostrap circuit, the drain and the 2nd NMOS of the first metal-oxide-semiconductor (V14)
The drain connection for managing (V15), constitutes the output port of circuit, and the grid and second voltage of second NMOS tube (V15) are booted
The source electrode of circuit connection, the second NMOS tube (V15) is connected with negative supply (VEE), and the 4th capacitor (C4) and the 7th resistance (R7) are gone here and there
It is connected to after connection between positive supply (VCC) and output port, the 5th capacitor (C5) is connected to after connecting with the 8th resistance (R8)
Between output port and negative supply (VEE).
As shown from the above technical solution, driving circuit described in the utility model using bi-directional voltage bootstrap technique with it is two-way
Transient state suppression technology combines and transient state inhibits and half-bridge driven timing control technology, realization positive-negative power power supply half-bridge electricity
Effective control and driving on road.It the advantage is that the running speed that not only can control direct current generator, and can change direct current
The rotation direction of motor.Using complementary type push-pull circuit, bi-directional voltage stabilizing pipe and delay capacitor etc. in the utility model driving circuit
Constitute dead band time setting and adjust circuit, in actual use can self-setting dead time size, to effectively eliminate
Half-bridge circuit common conduct, it is ensured that half-bridge circuit reliably and securely works.
Detailed description of the invention
Fig. 1 is the circuit diagram of the utility model.
Specific embodiment
The utility model is described further with reference to the accompanying drawing:
As shown in Figure 1, the driving circuit of the positive-negative power power supply half-bridge circuit of the present embodiment, including dead band time setting electricity
Road, first voltage boostrap circuit, second voltage boostrap circuit, the first instantaneous common-mode suppression circuit, the second instantaneous common-mode inhibit electricity
Road and half-bridge drive circuit；
The dead band time setting circuit, for be arranged and adjust two metal-oxide-semiconductors in half-bridge drive circuit end simultaneously when
Between (i.e. dead time), avoid two metal-oxide-semiconductors in half-bridge drive circuit from simultaneously turning on (i.e. common conduct)；First voltage bootstrapping electricity
Road is raised for the G electrode potential to PMOS tube V14 in half-bridge drive circuit, and realize that PMOS tube V14 pipe is connected has with cut-off
Effect control；Second voltage boostrap circuit is raised for the G electrode potential to NMOS tube V15 in half-bridge drive circuit, is realized to V15
Effective control of pipe conducting and cut-off；The first instantaneous common-mode suppression circuit, for accelerate PMOS tube V14 from state to
The switching of off state reduces switching time to inhibit PMOS tube V14 from the wink being conducting in turn off process between NMOS tube V15
State common conduct；The second instantaneous common-mode suppression circuit, for accelerating NMOS tube V15 cutting from state to off state
It changes, reduces switching time to inhibit NMOS tube V15 from the transient state common conduct being conducting in turn off process between PMOS tube V14；
Half-bridge drive circuit is alternately powered on for forward and reverse to load motor, realizes the control of the operating speed, rotation direction to motor.
Dead time can be arranged according to actual operation requirements in the dead band time setting circuit are as follows: the μ s of 100ns~10, to avoid complementary MOS
Pipe is burnt because of common conduct；Voltage raise circuit is made of bootstrap capacitor and zener diode, and realization has complementary metal-oxide-semiconductor
Effect control；Instantaneous common-mode suppression circuit is controlled by transistor switch with the reverse phase of corresponding metal-oxide-semiconductor, and complementary metal-oxide-semiconductor is inhibited " to lead
It is logical " with the transient state common conduct in " shutdown " stateful switchover process, eliminate complementation metal-oxide-semiconductor and damaged because of transient state common conduct.
As shown in Figure 1, dead band time setting circuit 1 includes the first current-limiting resistance R1, the second current-limiting resistance R2, the one or three pole
Pipe V11, the second triode V12, the first voltage-stabiliser tube V13 of bi-directional voltage stabilizing and the first capacitor C1 for adjusting dead time, the
One end of one current-limiting resistance R1 is connect with input pulse signal, the other end of the first current-limiting resistance R1 and the second current-limiting resistance R2's
One end connection, the other end of the second current-limiting resistance R2 are connect with the base stage of the first triode V11 and the second triode V12, and first
The common end of current-limiting resistance R1 and the second current-limiting resistance R2 are connected with one end of first capacitor C1, the other end of first capacitor C1 with
Power ground is connected, the anode of the third voltage-stabiliser tube V9V9 in the collector of the first triode V11 and first voltage boostrap circuit 2 and
The collector of third transistor V3 in first instantaneous common-mode suppression circuit 4 connects, the emitter and second of the first triode V11
The emitter of triode V12 connects, and the collector of the second triode V12 is isolated two with second in second voltage boostrap circuit 3
The anode of pole pipe V8 connects and the collector connection of the 4th triode V4 in the second instantaneous common-mode suppression circuit 5, the first pressure stabilizing
One end of pipe V13 is connect with the emitter of the first triode V11, the other end ground connection of the first voltage-stabiliser tube V13.
Input pulse signal VIN be positive and negative amplitude bidirectional pulse signal, the pulse signal by the first current-limiting resistance R1,
First capacitor C1, the second current-limiting resistance R2 for adjusting dead time are added to be made of the first triode V11 and the second triode V12
The base input end of push-pull circuit the first triode V11 and the two or three pole are determined according to the positive and negative of input pulse signal VIN
The conducting and cut-off of pipe V12；
First voltage boostrap circuit 2 includes the first storage capacitor C2, third current-limiting resistance R5, the second voltage-stabiliser tube V5, determines
The third voltage-stabiliser tube V9 of bootstrap voltage mode size and the first isolating diode V7；One end of first storage capacitor C2 is set with dead time
Circuits 1 connect, and the other end is connect with the anode of the first isolating diode V7, the anode and second of the first isolating diode V7
The cathode of voltage-stabiliser tube V5 connects, and the anode of the second voltage-stabiliser tube V5 is connected through third current-limiting resistance R5 with positive supply VCC, third pressure stabilizing
The cathode of pipe V9 is connect with the cathode of the first isolating diode V7.
The collector level of first NPN pipe V11 is added to the low side of first voltage boostrap circuit 2, and control first voltage is certainly
Lift the conducting and cut-off of circuit 2；When first voltage boostrap circuit 2 is connected, the first storage capacitor C2 starts energy storage, the first energy storage
The voltage value at both ends is determined by the pressure stabilizing value of third voltage-stabiliser tube V9 after the full electric energy of capacitor C2 storage；Meanwhile first voltage boostrap circuit 2
When conducting, the conducting voltage of third current-limiting resistance R5 and third voltage-stabiliser tube V5 will be such that half-bridge PMOS tube V14 is connected；Work as first voltage
When boostrap circuit 2 ends, the energy storage in the second capacitor C2 is without Releasing loop, thus by the G electrode potential of half-bridge PMOS tube V14 than the
The collector of one triode V11 raises the pressure stabilizing value of third voltage-stabiliser tube V9, realizes voltage bootstrapping function, makes half-bridge PMOS tube V14
Quickly cut-off.
Second voltage boostrap circuit 3 include the second storage capacitor C3, the 4th current-limiting resistance R6, the second isolating diode V8,
4th voltage-stabiliser tube V6, the 5th voltage-stabiliser tube V10；The anode and dead zone of one end of second storage capacitor C3 and the second isolating diode V8
The collector connection of the second triode V12 in circuit 1, the other end and the 4th voltage-stabiliser tube of the second storage capacitor C3 is arranged in time
The anode of V6 connects, and the cathode of the 4th voltage-stabiliser tube V6 is connect through the 4th current-limiting resistance R6 with negative supply VEE, the second isolating diode
The cathode of V8 is connect with the cathode of the 5th voltage-stabiliser tube V10, and the anode of the 5th voltage-stabiliser tube V10 and the anode of the 4th voltage-stabiliser tube V6 connect
It connects.
The collector level of second triode V12 is added to the high-end of second voltage boostrap circuit 3, and control second voltage is certainly
Lift the conducting and cut-off of circuit 3；When second voltage boostrap circuit 3 is connected, the second storage capacitor C3 starts energy storage, the second energy storage
The voltage value at both ends is determined by the pressure stabilizing value of the 5th voltage-stabiliser tube V10 after the full electric energy of capacitor C3 storage；Meanwhile second voltage boostrap circuit
When 3 conducting, the conducting voltage of the 4th current-limiting resistance R6 and the 4th voltage-stabiliser tube V6 will be such that half-bridge NMOS tube V15 is connected；When the second electricity
When boostrap circuit 3 being pressed to end, the energy storage in the second storage capacitor C3 is without Releasing loop, so that the G of half-bridge NMOS tube V15 is extremely electric
Collector of the position than the second triode V12 reduces the pressure stabilizing value of (i.e. negative sense is raised) the 5th voltage-stabiliser tube V10, realizes voltage bootstrapping function
Can, end half-bridge NMOS tube V15 quickly.
First instantaneous common-mode suppression circuit 4 includes the 5th current-limiting resistance R3, the 5th voltage-stabiliser tube V1 and plays on-off action
Third transistor V3；The base stage of third transistor V3 is connect with the cathode of the 5th voltage-stabiliser tube V1, the collector of third transistor V3
It is connect with the collector of the first triode V11 in dead band time setting circuit 1, the emitter and positive supply of third transistor V3
The anode of VCC connection, the 5th voltage-stabiliser tube V1 is connect through the 5th current-limiting resistance R3 with input pulse signal VIN.
Input pulse signal VIN is added to the input terminal of instantaneous common-mode suppression circuit 4 simultaneously, passes through the 5th current-limiting resistance R3
It is added to the base stage of PNP pipe V3 with the 5th voltage-stabiliser tube V1, controls the conducting and cut-off of PNP pipe V3；PNP pipe V3 and half-bridge PMOS tube
The conducting of V14 and off state are just reversed, i.e. when half-bridge PMOS tube V14 is connected, PNP pipe V3 cut-off；Half-bridge PMOS tube V14
When cut-off, PNP pipe V3 conducting.That is when half-bridge PMOS tube V14 is connected, PNP pipe V3 does not work because of cut-off；Half-bridge PMOS
Pipe V14 end when, the second PNP pipe V3 because saturation conduction makes the collector potential of NPN pipe V11 draw high positive voltage VCC,
So that the grid potential of half-bridge PMOS tube V14 is higher than positive voltage VCC, and it is higher by the pressure stabilizing value of the second voltage-stabiliser tube V9,
When inhibiting half-bridge PMOS tube V14 to be in off state, because the moment of half-bridge NMOS tube V15 conducting forces half-bridge PMOS tube V14
Instantaneous conducting, to avoid or inhibit the instantaneous common conduct of half-bridge circuit.
Second instantaneous common-mode suppression circuit 5 includes the 6th current-limiting resistance R4, the 6th voltage-stabiliser tube V2 and the 4th triode V4；The
The base stage of four triode V4 is connect with the anode of the 6th voltage-stabiliser tube V2, and the emitter of the 4th triode V4 is connected with negative supply VEE,
The collector of 4th triode V4 is connect with the anode of the second isolating diode V8 in second voltage boostrap circuit 3, and the 6th is steady
The cathode of pressure pipe V2 is connect through the 6th current-limiting resistance R4 with input pulse signal VIN.
Input pulse signal VIN is added to the input terminal of instantaneous common-mode suppression circuit 5 simultaneously, passes through the 6th current-limiting resistance R4
It is added to the base stage of NPN pipe V4 with the 6th voltage-stabiliser tube V2, controls the conducting and cut-off of NPN pipe V4；NPN pipe V4 and half-bridge NMOS tube
The conducting of V15 and off state are just reversed, i.e. when half-bridge NMOS tube V15 is connected, NPN pipe V4 cut-off；Half-bridge NMOS tube V15 is cut
When only, NPN pipe V4 conducting.That is when half-bridge NMOS tube V15 is connected, NPN pipe V4 does not work because of cut-off；Half-bridge NMOS tube V15
When cut-off, NPN pipe V4 because saturation conduction makes the collector potential of triode V12 be pulled down to negative supply voltage VEE so that
The grid potential of half-bridge NMOS tube V15 is lower than negative supply voltage VEE, and the pressure stabilizing value of low 5th voltage-stabiliser tube V10 out, to inhibit half
When bridge NMOS tube V15 is in off state, because the moment of half-bridge PMOS tube V14 conducting forces instantaneously leading for half-bridge NMOS tube V15
It is logical, to avoid or inhibit the transient state common conduct of half-bridge circuit.
Half-bridge drive circuit 6 includes the first metal-oxide-semiconductor V14, the second metal-oxide-semiconductor V15, the 4th capacitor C4, the 7th resistance R7, the 5th
Capacitor C5 and the 8th resistance R8；The source electrode of first metal-oxide-semiconductor V14 is connect with positive supply VCC, the grid and first of the first metal-oxide-semiconductor V14
Voltage raise circuit 2 connects, and the drain of the first metal-oxide-semiconductor V14 is connect with the drain of the second metal-oxide-semiconductor V15, constitutes the output end of circuit
Mouthful, the grid of the second metal-oxide-semiconductor V15 is connect with second voltage boostrap circuit 3, source electrode and the negative supply VEE phase of the second metal-oxide-semiconductor V15
Even, the 4th capacitor C4 is connected between positive supply VCC and output port after connecting with the 7th resistance R7, the electricity of the 5th capacitor C5 and the 8th
It is connected between output port and negative supply VEE after resistance R8 series connection.
The PMOS tube V14 and NMOS tube V15 of half-bridge drive circuit 6 are to be connected in turn, when PMOS tube V14 conducting, NMOS
Pipe V15 cut-off, circuit output VOUT are high level, and voltage value is approximately positive voltage VCC；When PMOS tube V14 cut-off,
NMOS tube V15 conducting, circuit output VOUT are low level, and voltage value is approximately negative supply voltage VEE；4th capacitor C4 and
Seven resistance R7, the 5th capacitor C5 and the 8th resistance R8 respectively constitute uptake pathway, to absorb the positive and negative overshoot of output rectangular signal
High fdrequency component.
The working principle of the utility model are as follows:
In dead band time setting circuit, the T-type of the first current-limiting resistance R1, the second current-limiting resistance R2 and first capacitor C1 composition
The rising edge and failing edge of input pulse signal VIN is adjusted in network, realizes dead time regulatory function.NPN pipe V11 and
PNP pipe V12 constitutes push-pull configuration, and the pressure stabilizing value of bi-directional voltage stabilizing pipe V13 determines push-pull circuit input terminal (the i.e. base of V11 and V12
Pole) the positive size with reversed threshold voltage, forward and reverse threshold voltage size determines the initial value of dead time.When dead zone
Between setting, avoid the stable state common conduct phenomenon of half-bridge PMOS tube V14 and NMOS tube V15.
When input pulse signal VIN is high level (i.e. positive voltage, higher than the pressure stabilizing value of bi-directional voltage stabilizing pipe V13), NPN pipe
V11 saturation conduction, causes the conducting of first voltage boostrap circuit, storage capacitor C2 charging, and the voltage at the both ends storage capacitor C2 will be built
Found the pressure stabilizing value VZ9 of voltage-stabiliser tube V9.Because first voltage boostrap circuit 2 is connected, the grid and source electrode of half-bridge PMOS tube will be generated
Enough Negative Pressure Differences make the VGS(P of PMOS tube) it is lower than its threshold voltage VTH(P), at the same time, instantaneous common-mode suppression circuit 5
Conducting, NPN pipe V4 saturation conduction causes the C electrode potential of PNP pipe V12 to reach negative supply voltage VEE, the second storage capacitor C3's
Under effect, half-bridge NMOS tube grid potential is booted to VEE- VZ10, so that the pressure difference of half-bridge NMOS tube grid and source electrode is
It is negative, i.e. VGS(N)=- VZ10, not only make half-bridge NMOS tube completely switched off, and can inhibit the moment pair of half-bridge PMOS tube conducting
The transient state conducting that half-bridge NMOS tube generates, avoids the instantaneous common conduct phenomenon of half-bridge PMOS tube and NMOS tube.At this point, circuit is defeated
VOUT is high level out, and voltage value is approximately positive voltage VCC.
When input pulse signal VIN is low level (i.e. negative voltage), PNP pipe V12 saturation conduction causes second voltage to boot
The voltage of the conducting of circuit 3, the second storage capacitor C3 charging, the second both ends storage capacitor C3 will establish the pressure stabilizing for arriving voltage-stabiliser tube V10
Value VZ10.Because second voltage boostrap circuit 3 is connected, the grid and source electrode of half-bridge NMOS tube will generate enough positive differential pressures, make
The VGS(N of NMOS tube) it is higher than its threshold voltage VTH(N), make NMOS transistor conduction.At this point, NPN pipe V11 ends, first voltage is certainly
It lifts circuit no current to pass through, at the same time, instantaneous common-mode suppression circuit conducting, PNP pipe V3 saturation conduction causes the C of NPN pipe V11
Electrode potential reaches positive voltage VCC, and under the action of the first storage capacitor C2, half-bridge gate pmos electrode potential is lifted to
VCC+ VZ9, so that the pressure difference of half-bridge PMOS tube grid and source electrode is positive, i.e. VGS(P)=VZ9, not only make half-bridge PMOS tube complete
Full cut-off, and the transient state that half-bridge PMOS tube generates is connected in the moment that can inhibit half-bridge NMOS transistor conduction, avoids half-bridge PMOS
The instantaneous common conduct phenomenon of pipe and NMOS tube.At this point, circuit output VOUT is low level, voltage value is approximately negative supply electricity
Press VEE.
Embodiment described above is only that preferred embodiments of the present invention are described, not practical to this
Novel range is defined, and under the premise of not departing from the spirit of the design of the utility model, those of ordinary skill in the art are to this
The various changes and improvements that the technical solution of utility model is made should all fall into the protection that the utility model claims book determines
In range.
Claims (7)
1. a kind of driving circuit of positive-negative power power supply half-bridge circuit, it is characterised in that: including dead band time setting circuit (1),
First voltage boostrap circuit (2), second voltage boostrap circuit (3), the first instantaneous common-mode suppression circuit (4), the second instantaneous common-mode
Suppression circuit (5) and half-bridge drive circuit (6)；
The dead band time setting circuit, for being arranged and adjusting the time that two metal-oxide-semiconductors end simultaneously in half-bridge drive circuit,
Two metal-oxide-semiconductors in half-bridge drive circuit are avoided to simultaneously turn on；
The first voltage boostrap circuit, for raising to PMOS tube G electrode potential in half-bridge drive circuit, the pipe is led in realization
Logical effective control with cut-off；
The second voltage boostrap circuit, for raising to NMOS tube G electrode potential in half-bridge drive circuit, the pipe is led in realization
Logical effective control with cut-off；
The first instantaneous common-mode suppression circuit, for accelerating switching of the PMOS tube from state to off state, reduction is cut
The time is changed to inhibit PMOS tube from the transient state common conduct being conducting in turn off process between NMOS tube；
The second instantaneous common-mode suppression circuit, for accelerating switching of the NMOS tube from state to off state, reduction is cut
The time is changed to inhibit NMOS tube from the transient state common conduct being conducting in turn off process between PMOS tube；
The half-bridge drive circuit is alternately powered on for forward and reverse to load motor, and realization is to the operating speed of motor, operating side
To control.
2. the driving circuit of positive-negative power power supply half-bridge circuit according to claim 1, it is characterised in that: when the dead zone
Between setting circuit (1) include the first current-limiting resistance (R1), the second current-limiting resistance (R2), the first triode (V11), the second triode
(V12), the first voltage-stabiliser tube (V13) and the first capacitor (C1) for adjusting dead time, first current-limiting resistance (R1)
One end is connect with input pulse signal, and the other end of the first current-limiting resistance (R1) is connect with one end of the second current-limiting resistance (R2),
The other end of second current-limiting resistance (R2) is connect with the base stage of the first triode (V11) and the second triode (V12), the first current limliting
The common end of resistance (R1) and the second current-limiting resistance (R2) is connected with the one end of first capacitor (C1), first capacitor (C1) it is another
End is connected with power ground, the collector and first voltage boostrap circuit (2) and the first instantaneous common-mode of first triode (V11)
The low side of suppression circuit (4) connects, and the emitter of the first triode (V11) is connect with the emitter of the second triode (V12), the
The high-end phase of the collector of two triodes (V12) and second voltage boostrap circuit (3) and the second instantaneous common-mode suppression circuit (5)
Even, one end of first voltage-stabiliser tube (V13) is connect with the emitter of the first triode (V11), other end ground connection.
3. the driving circuit of positive-negative power power supply half-bridge circuit according to claim 1, it is characterised in that: first electricity
Pressing boostrap circuit (2) includes the first storage capacitor (C2), third current-limiting resistance (R5), the second voltage-stabiliser tube (V5), third voltage-stabiliser tube
(V9) and the first isolating diode (V7)；One end of first storage capacitor (C2) is connect with dead band time setting circuit (1),
Its other end is connect with the anode of the first isolating diode (V7), the anode of first isolating diode (V7) and the second pressure stabilizing
The cathode connection of (V5) is managed, the anode of the second voltage-stabiliser tube (V5) is connected through third current-limiting resistance (R5) with positive supply VCC, and described the
The cathode of three voltage-stabiliser tubes (V9) is connect with the cathode of the first isolating diode (V7), when the anode of third voltage-stabiliser tube (V9) and dead zone
Between setting circuit (1) connect.
4. the driving circuit of positive-negative power power supply half-bridge circuit according to claim 1, it is characterised in that: second electricity
To press boostrap circuit (3) include the second storage capacitor (C3), the 4th current-limiting resistance (R6), the second isolating diode (V8), the 4th steady
Pressure pipe (V6), the 5th voltage-stabiliser tube (V10)；One end of second storage capacitor (C3) and the anode of the second isolating diode (V8)
And dead band time setting circuit (1) connection, the other end of the second storage capacitor (C3) are connect with the anode of the 4th voltage-stabiliser tube (V6),
The cathode of 4th voltage-stabiliser tube (V6) is connect through the 4th current-limiting resistance (R6) with negative supply VEE, second isolating diode (V8)
Cathode connect with the cathode of the 5th voltage-stabiliser tube (V10), the anode of the 5th voltage-stabiliser tube (V10) and the anode of the 4th voltage-stabiliser tube (V6)
Connection.
5. the driving circuit of positive-negative power power supply half-bridge circuit according to claim 1, it is characterised in that: first wink
When common-mode suppression circuit (4) include the 5th current-limiting resistance (R3), the 5th voltage-stabiliser tube (V1) and third transistor (V3)；The third
The base stage of triode (V3) is connect with the cathode of the 5th voltage-stabiliser tube (V1), and collector is connect with dead band time setting circuit (1),
Its emitter is connect with positive supply (VCC), and the anode of the 5th voltage-stabiliser tube (V1) is through the 5th current-limiting resistance (R3) and input arteries and veins
Rush signal (VIN) connection.
6. the driving circuit of positive-negative power power supply half-bridge circuit according to claim 1, it is characterised in that: second wink
When common-mode suppression circuit (5) include the 6th current-limiting resistance (R4), the 6th voltage-stabiliser tube (V2) and the 4th triode (V4)；Described 4th
The base stage of triode (V4) is connect with the anode of the 6th voltage-stabiliser tube (V2), the emitter and negative supply of the 4th triode (V4)
(VEE) it is connected, the collector of the 4th triode (V4) is connect with second voltage boostrap circuit (3), the 6th voltage-stabiliser tube (V2)
Cathode connect through the 6th current-limiting resistance (R4) with input pulse signal (VIN).
7. the driving circuit of positive-negative power power supply half-bridge circuit according to claim 1, it is characterised in that: the half-bridge drives
Dynamic circuit (6) include the first PMOS tube (V14), the second NMOS tube (V15), the 4th capacitor (C4), the 7th resistance (R7), the 5th electricity
Hold (C5) and the 8th resistance (R8)；The source electrode of first PMOS tube (V14) is connect with positive supply (VCC), the first PMOS tube
(V14) grid is connect with first voltage boostrap circuit (2), drain and the second NMOS tube (V15) of the first PMOS tube (V14)
Drain connection constitutes the output port of circuit, and the grid of second NMOS tube (V15) and second voltage boostrap circuit (3) are even
It connects, the source electrode of the second NMOS tube (V15) is connected with negative supply (VEE), and the 4th capacitor (C4) connects after connecting with the 7th resistance (R7)
It is connected between positive supply (VCC) and output port, the 5th capacitor (C5) is connected to output end after connecting with the 8th resistance (R8)
Between mouth and negative supply (VEE).
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821892035.0U CN208955894U (en) | 2018-11-16 | 2018-11-16 | A kind of driving circuit of positive-negative power power supply half-bridge circuit |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201821892035.0U CN208955894U (en) | 2018-11-16 | 2018-11-16 | A kind of driving circuit of positive-negative power power supply half-bridge circuit |
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| CN208955894U true CN208955894U (en) | 2019-06-07 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109217647A (en) * | 2018-11-16 | 2019-01-15 | 中国电子科技集团公司第四十三研究所 | A kind of driving circuit and its driving method of positive-negative power power supply half-bridge circuit |
| CN110995081A (en) * | 2019-11-27 | 2020-04-10 | 佛山市顺德区美的洗涤电器制造有限公司 | Drive circuit, equipment and step motor drive circuit for direct current motor |
-
2018
- 2018-11-16 CN CN201821892035.0U patent/CN208955894U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109217647A (en) * | 2018-11-16 | 2019-01-15 | 中国电子科技集团公司第四十三研究所 | A kind of driving circuit and its driving method of positive-negative power power supply half-bridge circuit |
| CN109217647B (en) * | 2018-11-16 | 2023-10-27 | 中国电子科技集团公司第四十三研究所 | Driving circuit of positive and negative power supply half-bridge circuit and driving method thereof |
| CN110995081A (en) * | 2019-11-27 | 2020-04-10 | 佛山市顺德区美的洗涤电器制造有限公司 | Drive circuit, equipment and step motor drive circuit for direct current motor |
| CN110995081B (en) * | 2019-11-27 | 2021-05-07 | 佛山市顺德区美的洗涤电器制造有限公司 | Drive circuit, equipment and step motor drive circuit for direct current motor |
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