CN208873713U - A kind of gallium nitride device - Google Patents

A kind of gallium nitride device Download PDF

Info

Publication number
CN208873713U
CN208873713U CN201821877443.9U CN201821877443U CN208873713U CN 208873713 U CN208873713 U CN 208873713U CN 201821877443 U CN201821877443 U CN 201821877443U CN 208873713 U CN208873713 U CN 208873713U
Authority
CN
China
Prior art keywords
gallium nitride
dao
bare chip
pin
nitride device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201821877443.9U
Other languages
Chinese (zh)
Inventor
李孟
李幸辉
罗广豪
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Foshan Huayu Equity Investment Partnership (limited Partnership)
Gallium Energy Semiconductor (foshan) Co Ltd
Original Assignee
Foshan Huayu Equity Investment Partnership (limited Partnership)
Gallium Energy Semiconductor (foshan) Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Foshan Huayu Equity Investment Partnership (limited Partnership), Gallium Energy Semiconductor (foshan) Co Ltd filed Critical Foshan Huayu Equity Investment Partnership (limited Partnership)
Priority to CN201821877443.9U priority Critical patent/CN208873713U/en
Application granted granted Critical
Publication of CN208873713U publication Critical patent/CN208873713U/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

The utility model provides a kind of gallium nitride device, and the gallium nitride device includes: the Ji Dao including gallium nitride bare chip, the pin of lead frame and for radiating to the gallium nitride bare chip;The positive electrode of gallium nitride bare chip is connect using lead with the pin, and the gallium nitride bare chip back side is directly contacted with the Ji Dao;The gallium nitride bare chip, the pin and the Ji Dao are packaged into a gallium nitride device, and part Ji Dao is exposed at the top of the gallium nitride device.The utility model is able to solve existing gallium nitride bare chip in the device for being packaged into patch, the thermal resistance of encapsulating material is high, heat dissipation effect is poor, is unfavorable for playing the electric current Problem of Passing Capacity of gallium nitride power pipe, while can solve the problem of installing cooling fin at the top of patch power device.

Description

A kind of gallium nitride device
Technical field
The utility model relates to the encapsulation technology of gallium nitride bare chip, especially a kind of gallium nitride device.
Background technique
It will be cut down from wafer in the industry, the bare chip of individual unit before packaging is called die.Power switch tube is equal It is chip/device after encapsulation.Power switch tube can generate heat during the work time, and the heat of accumulation may allow switching tube Degradation, or even damage switching tube, it is therefore desirable to during the die of power switch tube is packaged into device, try every possible means The heat of chip is dispersed into external environment.
SMD packaging commonly used in the prior art, structure are generally two kinds, first is that without exposed heat dissipation metal plate Total incapsulation structure, the device of this type package are main to conduct the heat of internal die by encapsulating material or be radiated in air This approach radiates.Because the general thermal resistance of the encapsulating material of device is larger, the package cooling ability of this type is limited, general only suitable It only needs to use by the device of low current when for working.
Another kind is in bottom device configured with cooling fin, as depicted in figs. 1 and 2, inside encapsulating structure, by cooling fin It is connected together with internal die by the connection type of the low thermal resistances such as stickup, welding, the heat that such die is generated at work, It can be transferred on cooling fin by the approach of low thermal resistance, while when device is assembled on PCB, can also pass through the copper foil on PCB, mistake The modes such as hole are reinforced radiating.The encapsulation of this type, because of the cooling fin limited area that it is internally integrated, the capacity of heat transmission of PCB also has Limit, in the application of high current, heat-sinking capability is also insufficient.The flange-cooled form of SOP-8 package bottom is as shown in Figure 1, DFN The flange-cooled form of package bottom is as shown in Figure 2.
Utility model content
For the problems of the prior art, the utility model provides a kind of good heat conductivity and the strong gallium nitride of heat-sinking capability The packaging method of device and gallium nitride device.
In a first aspect, the utility model provides a kind of gallium nitride device, including gallium nitride bare chip, lead frame draws Foot, the Ji Dao for radiating to the gallium nitride bare chip;
The positive electrode of gallium nitride bare chip is connect using lead with the pin,
The gallium nitride bare chip back side is directly contacted with the Ji Dao;
The gallium nitride bare chip, the pin and the Ji Dao are packaged into a gallium nitride device, and outside the Ji Dao of part It is exposed at the top of the gallium nitride device.
Optionally, it is exposed at the top of the Ji Dao at the top of the gallium nitride device and the gallium nitride device and flushes.
Optionally, being exposed at the Ji Dao at the top of the gallium nitride device has the notch knot connecting with other radiators Structure, other radiators are and the independent radiator of gallium nitride device.
Optionally, the length of the Ji Dao is wider than the length and width of the gallium nitride bare chip.
Optionally, the gallium nitride bare chip back side is directly contacted with the Ji Dao, comprising:
The gallium nitride bare chip back side is connect with the Ji Dao using welding manner;
Alternatively, the gallium nitride bare chip back side is connect with the Ji Dao using glue bonding way.
Optionally, the gallium nitride bare chip, pin and the Ji Dao are packaged into the gallium nitride device of SMD form.
The utility model has the advantages that
1) by the die formal dress of gallium nitride on Ji Dao, electrode is connected by the way of routing with pin the utility model, right It is packaged into for SMD device in gallium nitride die, processing method is simple, and the thermal resistance from die to Ji Dao is also minimum, conducive to by die's Heat is transmitted on Ji Dao.Existing gallium nitride chip is solved as a result, in the device for being packaged into patch, the thermal resistance of encapsulating material Height, heat dissipation effect is poor, is unfavorable for playing the electric current Problem of Passing Capacity of gallium nitride power pipe.
2) when the die of GaN to be packaged into the device of SMD form, increase cooling fin at the top of SMD, it so can be in SMD The top of device reuses additional cooling fin to enhance heat-sinking capability, and allowing can be by big using the gallium nitride device of SMD encapsulation Electric current controls bigger power.That is, it is limited to solve existing SMD device heat-sinking capability, inside cannot be given full play to The advantage of GaN chip (i.e. bare chip) high current.
3) using the die electrodeless one side electroneutral of GaN the characteristics of, the heat dissipation that the one side of electroneutral is encapsulated with SMD Piece is connected to together, thus outside SMD when radiation fin, it is only necessary to be used the good material of heating conduction, not had to consider electrical isolation The problem of.It solves Ji Dao electrification inside packaging in the prior art, needs to increase between internal Ji Dao and outside heat sink The problem of adding insulating materials, meanwhile, when the SMD device of multiple same types is applied on circuit boards, the same outside can be used Cooling fin reduces the cost and the space occupied of heat dissipation.It is also beneficial to forming the device of multiple same types into the shape of a mould group Formula uses.
4) packaging body below the cooling fin of SMD top device is stayed into a part of notch, passed through conducive to the cooling fin at top Mechanical buckle class device touches the cooling fin of outside heat sink and SMD device well helps device heat dissipation together, together When it is fixed outside cooling fin.It solves the cooling fin inside packaging in the prior art and consolidates between outside heat sink Fixed problem reduces cost, and can be conducive to device miniaturization.
5) in the cooling fin of the top of SMD configuration electroneutral, the safe distance requirement between electrode is so readily satisfied, together When do not influence the heat dissipation of device.That is, the area that can be encapsulated SMD reduces, benefit under the requirement for meeting safety standard In the miniaturization of device.
Detailed description of the invention
Fig. 1 is the flange-cooled structural schematic diagram of SOP-8 package bottom in the prior art;
Fig. 2 is the flange-cooled structural schematic diagram of DFN package bottom in the prior art;
Fig. 3 is the schematic diagram for the gallium nitride device that the utility model embodiment one provides;
Fig. 4 is a kind of top view of SMD packaging of the utility model;
Fig. 5 is a kind of bottom view of SMD packaging of the utility model;
Fig. 6 is the side view of the SMD packaging of corresponding diagram 4 in the utility model;
Fig. 7 is the side view of the SMD packaging of corresponding diagram 5 in the utility model;
Fig. 8 is the schematic diagram of internal structure of the utility model Fig. 4 to Fig. 7.
Specific embodiment
It is with reference to the accompanying drawing, right by specific embodiment in order to understand in order to preferably explain the utility model The utility model is described in detail.
For the content for better understanding the utility model, partial words used in the utility model are explained as follows:
Formal dress: upward by the front (face comprising electrode) of chip, bottom is directly welded on package support or substrate;
Upside-down mounting: chip top and bottom are overturn, and positive (face comprising electrode) downward, the electrode on front, which is directly welded at, to be set On the pcb board for counting connection cabling;
GaN HEMT: GaN high electron mobility transistor;The PN junction of GaN HEMT chip is planar structure, three poles Distribution in the same plane, i.e. three electrodes G, D, S on die in the same plane, in the another side (back side) of electrode It is electroneutral.
Embodiment 1
As shown in figure 3, the gallium nitride device of the present embodiment include: including gallium nitride bare chip 3, the pin 1 of lead frame, Base island 4 for radiating to the gallium nitride bare chip;
The positive electrode of gallium nitride bare chip is connect using lead 2 with the pin 1,
The gallium nitride bare chip back side is directly contacted with the Ji Dao;
The gallium nitride bare chip 3, the pin 1 and the base island 4 are packaged into a gallium nitride device, and part Ji Dao 4 are exposed at the top of the gallium nitride device.
For example, the gallium nitride bare chip back side is connect with the Ji Dao using welding manner;
Alternatively, the gallium nitride bare chip back side is connect with the Ji Dao using glue bonding way.It is in the present embodiment and unlimited Determine the gallium nitride chip back side and the connection type of Ji Dao, can be realized any connection type directly contacted.It illustrates , the island the present embodiment Zhong Ji belongs to the part-structure of packaging frame.
In addition, the capsulation material 5 used when encapsulation is also shown in Fig. 3, which can make gallium nitride device by needs The place of insulation separates, while determining the shape of gallium nitride device together with pin, heat dissipation Ji Dao.
In practical applications, the lead frame in Fig. 1 by as cooling fin base island 4 and pin 1 form.It is being packaged into After device, being usually exposed at the Ji Dao at the top of gallium nitride device can flush with the gallium nitride device top.
In a particular application, Ji Dao above-mentioned is the structure of cooling fin.Since the electrodeless one side of bare chip is in electricity Property, when cooling fin and bare chip directly contact thus, cooling fin is simultaneously not charged, after being packaged into device, as scattered in device When the Ji Dao of backing is connected with the cooling fin of device exterior, without considering the problems of insulation performance, so that exposed Ji Dao can be with External cooling fin is directly connected to.
For example, the Ji Dao being exposed at the top of the gallium nitride device has and other radiators (i.e. external cooling fin) The gap structure of connection, other radiators are and the independent radiator of gallium nitride device.
In conjunction with shown in Fig. 4 to Fig. 7, Fig. 4 shows the top view of another SMD packaging, and Fig. 5 shows this SMD envelope The bottom view of device is filled, Fig. 6 shows the side view of this SMD packaging.Fig. 7 shows the side view of this SMD packaging. In addition, Fig. 8 shows the schematic diagram of internal structure of Fig. 4 to Fig. 7.
The present embodiment only shows a kind of gap structure, not limit notch concrete shape, can and external radiating device Connection/clamping gap structure is ok, and belongs to the protection scope of the utility model.Fig. 4 is to notch knot shown in fig. 7 Structure is made by mold design.
Further, be illustrated in conjunction with Fig. 3, the island the present embodiment Zhong Ji i.e. be used as cooling fin to use, length be wider than or Equal to the length and width of gallium nitride bare chip, to increase the area of heat dissipation Ji Dao, conducive to the heat dissipation of internal gallium nitride die.
In addition, the power device of SMD encapsulation, small volume, parasitic inductance, capacity effect are smaller than straight cutting class device, Be conducive to play the high-speed switch characteristic of gallium nitride power switch, gallium nitride power switching tube is partly led as the newest third generation Body is all encapsulated using SMD, to play the performance of gallium nitride power switching tube as far as possible when packaged.For this purpose, in the present embodiment The gallium nitride bare chip, pin and the Ji Dao are packaged into the gallium nitride device of SMD form.It should be noted that Fig. 3 and The pin of gallium nitride device in Fig. 8 represents the gallium nitride device of two kinds of structures.
The utility model solves existing gallium nitride chip in the device for being packaged into patch as a result, the heat of encapsulating material Resistance is high, and heat dissipation effect is poor, is unfavorable for playing the electric current Problem of Passing Capacity of gallium nitride power pipe.
When the die of GaN is carried out SMD encapsulation, increase the Ji Dao used as cooling fin at the top of die, it so can be The top of SMD device reuses additional cooling fin to enhance heat-sinking capability, and allowing can be led to using the gallium nitride device of SMD encapsulation Super-high-current controls bigger power.That is, it is limited to solve existing SMD device heat-sinking capability, cannot give full play to The advantage of internal GaN chip (i.e. bare chip) high current.
The characteristics of one side electroneutral electrodeless using the die of GaN, the cooling fin that the one side of electroneutral is encapsulated with SMD It is connected to together, thus outside SMD when radiation fin, it is only necessary to the good material of heating conduction is used, without considering electrical isolation Problem.It solves packaging inner fin electrification in the prior art, increases between inner fin and outside heat sink The problem of adding insulation performance material.
Embodiment 2
The utility model also provides a kind of packaging method of gallium nitride device comprising:
S1, the positive electrode of gallium nitride bare chip is connected on the pin of lead frame using lead;
S2, the gallium nitride bare chip back side and the Ji Dao are directly connected to;
S3, the gallium nitride bare chip, pin and the Ji Dao are packaged into a gallium nitride device, and outside the Ji Dao of part It is exposed at the top of the gallium nitride device.
Specifically, in above-mentioned steps S2 bare chip and Ji Dao connection type are as follows: the gallium nitride bare chip back side and institute The island Shu Ji is connected using welding manner;Alternatively, the gallium nitride bare chip back side and the Ji Dao are connected using glue bonding way It connects.
The gallium nitride device of the present embodiment further include: to be exposed at the top of the gallium nitride device Ji Dao setting with it is other The gap structure of radiator connection, other radiators are and the independent radiator of gallium nitride device.
By taking the encapsulation of DFN as an example,
S1, as shown in figure 3, lead frame using base island 4 and pin 1 in corresponding two planes;
S2, by gallium nitride bare chip die3 formal dress on base island 4, the connection of die and Ji Dao, can be used welding, glue connect Connect or other means;
S3, the electrode on die is connected on the pin 1 of lead frame by lead 2;
Die, lead, frame of package interior etc. are covered, Ji Dao do not weld die one by S4, filling encapsulating material It shows out, but with coplanar packaging body in approximately the same plane;
Rib cutting, shaping, as finished product after S5, package curing molding.
Note: the cooling fin area at top is small than the area of encapsulation, maintains an equal level, or the area than encapsulating is big.
In addition, the process of SMD encapsulation and above-mentioned S1 to S4 according to other forms is essentially the same, go out in S5 step Outside rib cutting, also need to bend to pin.
It illustrates, as shown in Figures 4 to 7, as the plastic-sealed body leaving certain gaps uncovered by the economic plan below the cooling fin of Ji Dao, with side Just the assembly of outside heat sink.
That is, gallium nitride power switching tube, when being packaged into SMD device, cooling fin frame is free of electricity upward, by gallium nitride die Pole lurches on the cooling fin frame of SMD.In addition, the packaging body leaving certain gaps uncovered by the economic plan below the cooling fin of top base island, reserves Notch facilitate fixed outside heat sink, it may be unnecessary to punch and realize on PCB, facilitate connection and it is fixed outside cooling fin/ Radiator.
Cooling fin at the top of SMD is electroneutral, does not have to consider safety standard, Insulation Problems, is conducive to outside heat sink Selection and installation.
Further, the Ji Dao above-mentioned that play heat spreading function in packaging frame is also used as pcb board use, this When, for gallium nitride bare chip formal dress on the Ji Dao as pcb board, the electrode of bare chip connects bare chip by pcb board lead Outside, then complete to be electrically connected lead or directly with by way of pin welding, then injection molding packaging.
It should also be noted that, the exemplary embodiment referred in the utility model, is based on a series of step or dress Set description certain methods or system.But the utility model is not limited to the sequence of above-mentioned steps, that is to say, that can be according to The sequence referred in embodiment executes step, may also be distinct from that the sequence in embodiment or several steps are performed simultaneously.
Above-mentioned each embodiment can be cross-referenced, and the present embodiment is not defined each embodiment.
Finally, it should be noted that above-described each embodiment is merely to illustrate the technical solution of the utility model, rather than It is limited;Although the utility model is described in detail with reference to the foregoing embodiments, those skilled in the art It is understood that it can still modify to technical solution documented by previous embodiment, or to part of or whole Technical characteristic is equivalently replaced;And these modifications or substitutions, it does not separate the essence of the corresponding technical solution the utility model The range of each embodiment technical solution.

Claims (5)

1. a kind of gallium nitride device, including gallium nitride bare chip, the pin of lead frame, which is characterized in that further include: for pair The Ji Dao that the gallium nitride bare chip radiates;
The positive electrode of gallium nitride bare chip is connect using lead with the pin,
The gallium nitride bare chip back side is directly contacted with the Ji Dao;
The gallium nitride bare chip, the pin and the Ji Dao are packaged into a gallium nitride device, and part Ji Dao is exposed at The top of the gallium nitride device.
2. gallium nitride device according to claim 1, which is characterized in that
It is exposed at the top of the Ji Dao at the top of the gallium nitride device and the gallium nitride device and flushes.
3. gallium nitride device according to claim 1, which is characterized in that
Being exposed at the Ji Dao at the top of the gallium nitride device has the gap structure connecting with other radiators, described other scattered Hot charging is set to and the independent radiator of gallium nitride device.
4. gallium nitride device according to claim 1 or 2, which is characterized in that the gallium nitride bare chip back side with it is described Ji Dao is directly contacted, comprising:
The gallium nitride bare chip back side is connect with the Ji Dao using welding manner;
Alternatively, the gallium nitride bare chip back side is connect with the Ji Dao using glue bonding way.
5. gallium nitride device according to any one of claims 1 to 3, which is characterized in that
The gallium nitride bare chip, pin and the Ji Dao are packaged into the gallium nitride device of SMD form.
CN201821877443.9U 2018-11-15 2018-11-15 A kind of gallium nitride device Expired - Fee Related CN208873713U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201821877443.9U CN208873713U (en) 2018-11-15 2018-11-15 A kind of gallium nitride device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201821877443.9U CN208873713U (en) 2018-11-15 2018-11-15 A kind of gallium nitride device

Publications (1)

Publication Number Publication Date
CN208873713U true CN208873713U (en) 2019-05-17

Family

ID=66471501

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201821877443.9U Expired - Fee Related CN208873713U (en) 2018-11-15 2018-11-15 A kind of gallium nitride device

Country Status (1)

Country Link
CN (1) CN208873713U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116169113A (en) * 2023-04-21 2023-05-26 江苏芯德半导体科技有限公司 QFN packaging structure capable of reducing heat conduction to PCB and preparation method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116169113A (en) * 2023-04-21 2023-05-26 江苏芯德半导体科技有限公司 QFN packaging structure capable of reducing heat conduction to PCB and preparation method thereof
CN116169113B (en) * 2023-04-21 2023-08-04 江苏芯德半导体科技有限公司 QFN packaging structure capable of reducing heat conduction to PCB and preparation method thereof

Similar Documents

Publication Publication Date Title
CN100435324C (en) Semiconductor package structure having enhanced thermal dissipation characteristics
CN104681525B (en) A kind of encapsulating structure and its method for packing of multi-chip lamination
KR20170086828A (en) Clip -bonded semiconductor chip package using metal bump and the manufacturing method thereof
CN101971332A (en) Semiconductor die package including embedded flip chip
US9275983B2 (en) Integrated circuit package
CN214043635U (en) Intelligent power module and power electronic equipment
CN103608917A (en) Ultra-thin power transistor and synchronous buck converter having customized footprint
CN105632947A (en) Semiconductor device packaging structure and manufacturing method thereof
US9666557B2 (en) Small footprint semiconductor package
JP2004006603A (en) Semiconductor power device
CN207165543U (en) A kind of low stray inductance two-side radiation power model
CN208873713U (en) A kind of gallium nitride device
CN110959191A (en) Semiconductor device with a plurality of semiconductor chips
CN107146775A (en) A kind of low stray inductance two-side radiation power model
CN219435850U (en) MOSFET chip packaging structure
CN111540723A (en) Power semiconductor device
CN114256172A (en) High-reliability packaging structure and packaging process of power MOSFET
CN210200717U (en) Silicon controlled rectifier adopting insulation encapsulation
CN111192860A (en) Gallium nitride device and packaging method thereof
JP2012238737A (en) Semiconductor module and manufacturing method therefor
CN106469704A (en) Semiconductor chip package, system and manufacture method
CN106449585B (en) A kind of encapsulating structure of high current field-effect tube
CN220604667U (en) Frameless high-power MOS packaging module and circuit structure
CN104425412A (en) Molded semiconductor package with pluggable lead
CN218299797U (en) Multi-chip sealed semiconductor packaging structure

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20190517

Termination date: 20201115