CN208797577U - A kind of Surge Protector chip of high safety performance - Google Patents

Abstract

The utility model discloses a kind of Surge Protector chips of high safety performance, including piezoresistive wafer, posive temperature coefficient thermistor piece, gas-discharge tube, overcurrent protector and leading-out terminal, the gas-discharge tube is in parallel with the posive temperature coefficient thermistor piece after connecting with the overcurrent protector, the series-parallel branch is connected with the piezoresistive wafer again, constitute a single port combinational circuit, wherein, the performance of the overcurrent protector tolerance surge impact is higher than the gas-discharge tube, the performance of the gas-discharge tube tolerance surge impact is higher than the piezoresistive wafer；At least one in two leading-out terminals of the single port combinational circuit is the thermally conductive end of low thermal resistance, the piezoresistive wafer and the posive temperature coefficient thermistor piece thermal coupling, the thermally conductive end of low thermal resistance is thermally coupled to each other simultaneously with wherein one or two in the piezoresistive wafer, the posive temperature coefficient thermistor piece.

Description

A kind of Surge Protector chip of high safety performance

Technical field

The utility model relates to field of power supplies, in particular to the Surge Protector chip of a kind of high safety performance.

Background technique

A kind of low-voltage electrical apparatus of the Surge Protector (abbreviation SPD) as standard, is widely used in low pressure electric line, The surge as caused by thunder and lightning etc. occurred in route effectively can be absorbed and be inhibited, to improvement grid power transmission quality, be protected Card electrical appliance has safely apparent effect.

The core component of SPD is Surge suppression element, and the most commonly used is based varistor chips.Due to electric line Transmission range is longer, but be easy to be exposed to it is outdoor, compared to indoor electric appliance equipment be easier by high-energy surge pulse, in SPD Phase projected life in, based varistor chip be easier by be more than rated specification high-energy surge repeat impact, Cause the deterioration failure of varistor.Since varistor is short circuit failure mode, once breakdown failure, will cause supply lines Road short trouble, breakdown point will appear burst, smolder, arcing, it is serious when in addition will cause catching fire.

Improvement plan is first is that most common method, concrete principle figure are shown in attached drawing 1, at two of based varistor chip 1 It on end electrode, is respectively welded and connects a piece of conductive and all excellent heating conduction scale copper electrode 2, scale copper electrode 2 is prefabricated There is leading-out terminal 3, scale copper electrode 2 also forms thermal coupling with based varistor chip 1 while playing the role of conductive electrode It closes, the heat that based varistor chip 1 generates can be transmitted on leading-out terminal 3.Wherein with low on a leading-out terminal 3 Melting alloy 5 welds a piece of elastic sheet metal 4 and forms overheat disconnector.It is flowed into when based varistor chip 1 is deteriorated to electric leakage When entering milliampere grade, accelerated deterioration area is initially entered, leakage current can make the fever of based varistor chip 1 promote leakage current further Increase, and accelerate the fever of based varistor chip 1, will finally make 1 thermal breakdown of based varistor chip.When heat reaches When 5 fusing-off temperature of low-melting alloy, disconnector action power dump is overheated, makes based varistor chip 1 before puncture short Power grid is exited, has achieved the purpose that protection.The program can be by the failure mode of most based varistor chip 1 from pernicious Short-circuit mode is converted to the open circuit mode for influencing very little, greatly improves the safety of SPD.

But still there is also some defects for the program, since the movement of overheat disconnector needs to be delayed by several seconds the time, and 1 leakage current of based varistor chip enters milliampere grade and starts accelerated deterioration adstante febre, and the defect inside porcelain body is very serious , there is the defect of partial chip seriously to arrive very short to the time of puncture short from starting to generate heat, heat also has little time to be transmitted to Hot disconnector melts low-melting alloy 5, and short circuit accident just has occurred.Another much situation is exactly when pressure-sensitive electricity Resistance ceramic chip 1 is deteriorated to when closing on accelerated deterioration area, and at this moment the leakage current of based varistor chip 1 is also less than milliampere grade, It can also maintain thermostabilization, additionally it is possible to work is maintained under the operating voltage of power grid, but its pressure sensitive voltage value at this time has compared Initial value when just starting to come into operation has apparent sharp fall, the anti-surge punching of based varistor chip 1 at this moment The ability hit is very fragile, an energy not counting it can be punctured or close to breakdown by too big surge, at this time it Puncture short speed is also that too fastly, overheat disconnector has little time response action and do not have protective effect.

For improvement plan second is that application No. is 201310268111.6 Chinese utility model patent, schematic diagram is shown in attached drawing 2, It will connect again with piezoresistive wafer 11 after ceramic positive temperature coefficient thermistor piece 12 and 13 parallel connection of gas-discharge tube, and temperature-sensitive Resistor disc 12 and piezoresistive wafer 11 are welded together to form thermal coupling, and exit 14 and exit 15 are connected in parallel on by protection power source line On the road, encapsulated layer 16 is formed using epoxy resin enclosed, solidification after welding lead.Its main feature is that when piezoresistive wafer 11 deteriorates It is significantly increased to leakage current and starts to generate heat into after accelerated deterioration area, heating temperature is coupled to ceramic positive temperature coefficient thermistor Piece 12, resistance value rises after keeping it heated, reduces the leakage current for flowing into piezoresistive wafer 11, plays the work for extending the deterioration time With, and after the heating temperature of piezoresistive wafer 11 reaches the Curie point of thermosensitive resistor film 12, positive temperature coefficient ceramic heat Quick resistor disc 12 becomes high-impedance state, limits the increase of leakage current, and piezoresistive wafer 11 is forced to reach near Curie point To thermal balance, piezoresistive wafer 11 can maintain work under network operation voltage in spite of illness.

But the program still has some serious defects, is firstly because ceramic positive temperature coefficient thermistor piece 12 Metering function, piezoresistive wafer 11 deteriorates severe again, and heating temperature also only maintains the curie point temperature of thermosensitive resistor film 12 Near degree, work is exited without departing from power grid, until the pressure sensitive voltage value deterioration of piezoresistive wafer 12 is reduced to network operation electricity When the about half of voltage crest value, after concatenated discharge tube is connected for another surge impact, too low pressure sensitive voltage value pincers The power network current constantly followed causes gas-discharge tube 13 not return to off-state, will protect 12 short circuit of thermosensitive resistor film Protection circuit failure, at this time piezoresistive wafer 11 will puncture short immediately, cause serious short trouble.Theoretically, if do not had There are other safeguard procedures, most of varistor can all fail in this way.Another failure procedure and scheme one Situation is similar, i.e., when piezoresistive wafer 11 deteriorates to a certain extent, even if having not been entered into accelerated deterioration area, but because of its internal junction Structure has been seriously damaged, and the ability sharp fall of tolerance surge impact, a surge can be hit at this time It wears or close to breakdown, and gas-discharge tube 13 is also on state at this time, breakdown or same close to the piezoresistive wafer 11 of breakdown Sample also loses the ability of pincers power-off net follow current, causes thermosensitive resistor film 12 to protect circuit malfunction, causes serious short circuit Failure.

Utility model content

The purpose of the utility model is to overcome the above-mentioned deficiencies in the presence of the prior art, provide a kind of high safety performance Surge Protector chip.

In order to achieve the above-mentioned object of the invention, the utility model provides following technical scheme:

A kind of Surge Protector chip of high safety performance, including piezoresistive wafer, posive temperature coefficient thermistor piece, gas Body discharge tube, overcurrent protector and leading-out terminal, the gas-discharge tube connect with the overcurrent protector after with the positive temperature It is in parallel to spend coefficient resistance piece, which connects with the piezoresistive wafer again, constitutes a single port combination electricity Road, wherein the performance of the overcurrent protector tolerance surge impact is higher than the gas-discharge tube, the gas-discharge tube tolerance The performance of surge impact is higher than the piezoresistive wafer；

At least one in two leading-out terminals of the single port combinational circuit is the thermally conductive end of low thermal resistance, described pressure-sensitive Resistor disc and the posive temperature coefficient thermistor piece thermal coupling, the thermally conductive end of low thermal resistance and the piezoresistive wafer, institute It states wherein one or two in posive temperature coefficient thermistor piece while being thermally coupled to each other.In use, being led in the low thermal resistance Hot end head connection overheat disconnector, the Curie point of the posive temperature coefficient thermistor piece are higher than the overheat disconnector Operating temperature.

The principle Analysis of the utility model is as follows:

Led to by the master that the series arm that piezoresistive wafer, gas-discharge tube, overcurrent protector form is absorption surge pulse Road, when not having surge pulse, gas-discharge tube is in an off state, which is in open-circuit condition；When surge arrives, gas is put Fulgurite conducting, surge energy thus release by branch.It is neglected at this point, pressure drop on gas-discharge tube and overcurrent protector is all very low Slightly disregard, the voltage-limiting protection level of SPD is mainly determined by piezoresistive wafer.After surge disappears, piezoresistive wafer is in high-impedance state, Pincers has broken the afterflow of discharge tube, and discharge tube is made to return to off-state.In tolerance surge impact capacity selection, overcurrent guarantor should be followed Dangerous device > gas-discharge tube > piezoresistive wafer, to guarantee deterioration since piezoresistive wafer, ability effectively start deterioration is exited Defencive function.

Another branch is the Thermal protection branch being connected in series by piezoresistive wafer and posive temperature coefficient thermistor piece, and Overheat disconnector is connected to by thermally conductive end.When element is intact, the leakage current for flowing through piezoresistive wafer is minimum (microampere order), Protect branch not generate heat, though when surge come it is interim, since posive temperature coefficient thermistor piece still has at normal temperature tens to several Hundred ohm of resistance value, surge current can also pass through from the gas-discharge tube low-resistance branch of conducting connected in parallel, will not make positive temperature The overload fever of coefficient resistance piece.

The Analysis of Failure Mechanism of the utility model is as follows:

After piezoresistive wafer, which is deteriorated to leakage current, to be reached milliampere grade and enter accelerated deterioration area, by the varistor being coupled to Fever caused by the heat of piece and the leakage current of increase, promotes the resistance value of posive temperature coefficient thermistor piece to rise, and finally exist Reach thermal balance above Curie point, leakage current strangulation compared with fractional value, so that the deterioration process of piezoresistive wafer is able to It elongates.Heat can be at leisure from thermally conductive end be transmitted to overheat disconnector, temperature can achieve near Curie temperature, and overheat is de- Operating temperature from device is set below at Curie temperature, so that it may which reliably disengaging acts, so that the SPD deteriorated be made to be detached from Power network line.The technical program can make the SPD after most of deteriorate exit power grid in this safe mode.

For those much special circumstances, i.e., when deterioration to a certain extent or has been in accelerated deterioration area Piezoresistive wafer, anti-impulse ability has declined to a great extent at this time, and a stronger surge of energy can directly hit it It wears or approaches breakdown, and lose the ability of the disconnected discharge tube follow current of pincers.After surge disappears, the operating voltage in power grid will The branch road for being applied to this conducting forms short circuit current, and the overcurrent protector being connected in branch at this time fuses horse back, by force It is about to branch and is converted to open-circuit condition.And thermosensitive resistor film and the piezoresistive wafer punctured are still connected in power grid, electricity Net operating voltage still will be applied to posive temperature coefficient thermistor piece both ends, it still can generate heat to Curie point and make The tripping of hot disconnector, overheat disconnector will action power dump, so that the SPD of damage is safely exited power grid.It is de- due to overheating It is generally provided with positioning indicator or electricity, sound, light warning device from device, will soon be found, maintenance personal can be square Just it is replaced, has achieved the purpose that safe handling.To substantially increase the safety and reliability of SPD, connect on route The electrical equipment crash rate connect also will significantly reduce.

It should be noted that in Thermal protection branch, the piezoresistive wafer and the posive temperature coefficient thermistor piece It is not necessarily to form thermal coupling, after choosing suitable component parameters, the piezoresistive wafer or positive temperature coefficient heat Fever caused by the leakage current of heat and increase that quick resistor disc individually generates can equally promote to overheat disconnector movement, It can achieve the goal of the invention of the utility model.

Further, the posive temperature coefficient thermistor piece could alternatively be the resistance of linear feature, linear special The electric current of the resistance of sign is substantially proportional to voltage, i.e., its characteristic equation is mainly linear homogeneous, and defers to Ohm's law. The resistance of linear feature can also play the role of following in Thermal protection branch: first is that metering function, when the varistor After piece accelerated deterioration even puncture short, the resistance of linear feature can be by the current limit in Thermal protection branch in safety value Within, it not will cause the Surge Protector chip short circuit and burn；Second is that heating functioin, the electric current within safety value is continued through The piezoresistive wafer and the resistance of linear feature, which will be such that they are warming up to, makes to overheat disconnector movement, equally can achieve The purpose of Thermal protection.To reach said effect, (the piezoresistive wafer breakdown in the most adverse case of the current value of Thermal protection branch Short circuit) it is advisable for tens milliamperes to several amperes, the resistance value of corresponding linear feature is several kilohms to tens ohm.

In the present invention, the resistance of linear feature both includes linear resistance, also allow containing it is some it is non-linear at Divide (non-linear component is smaller, mainly still embodies Ohm's law feature), but power is required to want sufficiently large, pressure resistance is wanted It is sufficiently high, at least to adhere to that failure cannot be damaged before overheating disconnector movement.

Preferably, positive temperature coefficient temperature-sensitive is welded and connected on a piezoresistive wafer electrode surface of the piezoresistive wafer It is separately connected on another electrode of resistor disc and gas-discharge tube, the posive temperature coefficient thermistor piece and gas-discharge tube There are two electrodes of the overcurrent protector, the piezoresistive wafer and/or the posive temperature coefficient thermistor on piece are also welded It is connected to the thermally conductive end of low thermal resistance, to realize the thermal coupling of element.

Preferably, the thermally conductive end of low thermal resistance with thermally conductive function has foot using excellent materials of heating conductions such as copper Enough big cross-sectional areas.And pyrotoxin (piezoresistive wafer or positive temperature coefficient temperature-sensitive are connected to using thermal couplings modes such as welding On resistor disc), and distance of the thermally conductive end away from pyrotoxin will as far as possible it is short, to obtain minimum thermal resistance, guarantee has enough Heat is transmitted to overheat disconnector.

Preferably, the piezoresistive wafer, posive temperature coefficient thermistor piece, gas-discharge tube, the encapsulation of overcurrent protector It is integrated.

Preferably, the piezoresistive wafer, posive temperature coefficient thermistor piece, gas-discharge tube are packaged as a whole to form envelope Body is filled, the overcurrent protector is fixed on outside the packaging body.

Preferably, solder joint, the overcurrent insurance are reserved on the posive temperature coefficient thermistor piece and gas-discharge tube Device is fixedly connected on the solder joint.

Preferably, the overcurrent protector is made of low-melting alloy silk or self- recoverage safety element, not only small in size, and It is resistant to the better performances of big surge impact.

Preferably, the impact resistance current rating of the overcurrent protector is higher than the impact resistance electric current of the gas-discharge tube Rated value, the impact resistance current rating of the gas-discharge tube are higher than the impact resistance current rating of the piezoresistive wafer.

The invention also discloses a kind of Surge Protector chips of high safety performance, including piezoresistive wafer, positive temperature Coefficient resistance piece, gas-discharge tube, overcurrent protector and leading-out terminal are spent, the gas-discharge tube and the overcurrent are insured In parallel with the posive temperature coefficient thermistor piece after device series connection, which connects with the piezoresistive wafer again, structure At a single port combinational circuit, wherein the performance of the overcurrent protector tolerance surge impact is higher than the gas-discharge tube, The performance of the gas-discharge tube tolerance surge impact is higher than the piezoresistive wafer；

At least one in two leading-out terminals of the single port combinational circuit is the thermally conductive end of low thermal resistance, the low-heat It hinders thermally conductive end and wherein one or two in the piezoresistive wafer, the posive temperature coefficient thermistor piece is mutual simultaneously Thermal coupling.

Compared with prior art, the utility model has the beneficial effects that

The utility model is equipped with simultaneously Absorb the main channel of surge pulse, and the Thermal protection branch being connected in series by piezoresistive wafer and posive temperature coefficient thermistor piece Road, and two branch circuit parallel connections.Under conventional failure conditions and special failure conditions, the overheat disconnector of SPD can act cutting Power supply, relative to traditional short-circuit mode, greatly improves the safety of SPD so that SPD finally exits circuit with open circuit mode Property, it is therefore prevented that short circuit breakdown when generate smolder, arcing, even catching fire serious accident.Meanwhile it overheating and being set on disconnector Some positioning indicators or electricity, sound, light warning device, so that the SPD of damage will soon be found, maintenance personal can be square Just it is replaced, has achieved the purpose that safe handling, to substantially increase the safety and reliability of SPD, connected on route The electrical equipment crash rate connect also will significantly reduce.

Detailed description of the invention:

Fig. 1 is the schematic illustration of improvement plan one described in background technique.

It is marked in Fig. 1: 1- based varistor chip, 2- scale copper electrode, 3- leading-out terminal, 4- elastic sheet metal, 5- Low-melting alloy.

Fig. 2 is the schematic illustration of improvement plan two described in background technique.

Mark in Fig. 2: 11- piezoresistive wafer, 12- thermosensitive resistor film, 13- gas-discharge tube, 14- exit, 15- are drawn End, 16- encapsulated layer.

Fig. 3 is a kind of schematic illustration of the Surge Protector chip of high safety performance described in the utility model.

Fig. 4 is a kind of top view of the Surge Protector chip of high safety performance described in the utility model.

Fig. 5 is a kind of side view of the Surge Protector chip of high safety performance described in the utility model.

It is marked in Fig. 3-Fig. 5: 1- piezoresistive wafer, 11- piezoresistive wafer electrode surface, 2- posive temperature coefficient thermistor Piece, 21- thermosensitive resistor film electrode surface, 3- gas-discharge tube, 4- overcurrent protector, 5- leading-out terminal, 6- internal connection line.

Specific embodiment

The utility model is described in further detail below with reference to test example and specific embodiment.But it should not be by this The range for being interpreted as the above-mentioned theme of the utility model is only limitted to embodiment below, all to be realized based on the content of the present invention Technology belongs to the scope of the utility model.

Embodiment 1

As shown in Figure 3-Figure 5, the Surge Protector chip of a kind of high safety performance, including piezoresistive wafer 1, positive temperature system Number thermosensitive resistor film 2, gas-discharge tube 3, overcurrent protector 4 and leading-out terminal 5, the gas-discharge tube 3 are protected with the overcurrent Dangerous device 4 is in parallel with the posive temperature coefficient thermistor piece 2 after connecting, which goes here and there with the piezoresistive wafer 1 again Connection, constitutes a single port combinational circuit, wherein the performance that the overcurrent protector 4 is resistant to surge impact is higher than the gas Discharge tube 3, the performance that the gas-discharge tube 3 is resistant to surge impact are higher than the piezoresistive wafer 1.

At least one in two leading-out terminals 5 of the single port combinational circuit is the thermally conductive end of low thermal resistance, the pressure Quick resistor disc 1 and 2 thermal coupling of posive temperature coefficient thermistor piece, the thermally conductive end of low thermal resistance and the piezoresistive wafer 1 thermal coupling, and the thermally conductive end of the low thermal resistance and 2 thermal coupling of posive temperature coefficient thermistor piece.In use, described low The thermally conductive end connection overheat disconnector of thermal resistance, the Curie point of the posive temperature coefficient thermistor piece 2 are higher than the overheat The operating temperature of disconnector.Elastic sheet metal is welded on thermally conductive end using low-melting alloy and forms overheat by preferential recommendation Disconnector, the fusion temperature of low-melting alloy will be lower than the Curie point of the posive temperature coefficient thermistor.

Specific assembling mode are as follows:

Posive temperature coefficient thermistor is welded and connected on one piezoresistive wafer electrode surface 11 of the piezoresistive wafer 1 Piece 2 and gas-discharge tube 3, another thermosensitive resistor film electrode surface 21 of the posive temperature coefficient thermistor piece 2 and gas discharge It is connected with two electrodes of the overcurrent protector 4, the piezoresistive wafer 1 and positive temperature on pipe 3 by internal connection line 6 respectively It spends on another electrode surface of coefficient resistance piece 2 and is also welded with the thermally conductive end of low thermal resistance, on the thermally conductive end of low thermal resistance A piece of elastic sheet metal is welded with low-melting alloy and forms overheat disconnector, and the fusion temperature of low-melting alloy is lower than the positive temperature Spend the Curie point of coefficient resistance.The piezoresistive wafer 1, posive temperature coefficient thermistor piece 2, gas-discharge tube 3, Envelope is wrapped up in insulating materials in surface in addition to two leading-out terminals by overcurrent protector 4, completes the combination of single port described in this technology Circuit.

Embodiment 2

The present embodiment the difference from embodiment 1 is that, the piezoresistive wafer 1, posive temperature coefficient thermistor piece 2, gas Body discharge tube 3 is packaged as a whole to form packaging body, and the overcurrent protector 4 is fixed on outside the packaging body.Specifically, described Solder joint is reserved on posive temperature coefficient thermistor piece 2 and gas-discharge tube 3, the overcurrent protector 4 is fixedly connected on described On solder joint.

Above embodiments are only to illustrate the utility model and not limit technical solution described in the utility model, to the greatest extent Pipe this specification has been carried out detailed description to the utility model referring to above-mentioned each embodiment, but the utility model not office It is limited to above-mentioned specific embodiment, therefore any pair of the utility model is modified or equivalent replacement；And all do not depart from it is practical The technical solution and its improvement of novel spirit and scope, should all cover in the scope of the claims of the utility model.

Claims (9)

1. a kind of Surge Protector chip of high safety performance, including piezoresistive wafer (1), posive temperature coefficient thermistor piece (2), gas-discharge tube (3), overcurrent protector (4) and leading-out terminal (5), which is characterized in that the gas-discharge tube (3) and institute State overcurrent protector (4) series connection after it is in parallel with posive temperature coefficient thermistor piece (2), the series-parallel branch again with the pressure Quick resistor disc (1) series connection, constitutes a single port combinational circuit, wherein the property of overcurrent protector (4) the tolerance surge impact The gas-discharge tube (3) can be higher than, the performance of gas-discharge tube (3) the tolerance surge impact is higher than the piezoresistive wafer (1)；

At least one in two leading-out terminals (5) of the single port combinational circuit is the thermally conductive end of low thermal resistance, described pressure-sensitive Resistor disc (1) and posive temperature coefficient thermistor piece (2) thermal coupling, the thermally conductive end of low thermal resistance and the varistor Wherein one or two in piece (1), the posive temperature coefficient thermistor piece (2) is thermally coupled to each other simultaneously.

2. a kind of Surge Protector chip of high safety performance according to claim 1, which is characterized in that the pressure-sensitive electricity Posive temperature coefficient thermistor piece (2) is welded and connected on one piezoresistive wafer electrode surface (11) of resistance piece (1) and gas is put It is separately connected on another electrode of fulgurite (3), the posive temperature coefficient thermistor piece (2) and gas-discharge tube (3) Two electrodes of overcurrent protector (4) are stated, on the piezoresistive wafer (1) and/or the posive temperature coefficient thermistor piece (2) Also it is welded with the thermally conductive end of low thermal resistance.

3. a kind of Surge Protector chip of high safety performance according to claim 2, which is characterized in that the pressure-sensitive electricity Resistance piece (1), posive temperature coefficient thermistor piece (2), gas-discharge tube (3), overcurrent protector (4) are packaged as a whole.

4. a kind of Surge Protector chip of high safety performance according to claim 2, which is characterized in that the pressure-sensitive electricity Resistance piece (1), posive temperature coefficient thermistor piece (2), gas-discharge tube (3) are packaged as a whole to form packaging body, and the overcurrent is protected Dangerous device (4) is fixed on outside the packaging body.

5. a kind of Surge Protector chip of high safety performance according to claim 4, which is characterized in that the positive temperature Solder joint is reserved on coefficient resistance piece (2) and gas-discharge tube (3), the overcurrent protector (4) is fixedly connected on described On solder joint.

6. the Surge Protector chip of -5 any a kind of high safety performances according to claim 1, which is characterized in that described Overcurrent protector (4) is made of low-melting alloy silk or self- recoverage safety element.

7. the Surge Protector chip of -5 any a kind of high safety performances according to claim 1, which is characterized in that described The impact resistance current rating of overcurrent protector (4) is higher than the impact resistance current rating of the gas-discharge tube (3), the gas The impact resistance current rating of body discharge tube (3) is higher than the impact resistance current rating of the piezoresistive wafer (1).

8. a kind of Surge Protector chip of high safety performance, including piezoresistive wafer (1), posive temperature coefficient thermistor piece (2), gas-discharge tube (3), overcurrent protector (4) and leading-out terminal (5), which is characterized in that the gas-discharge tube (3) and institute State overcurrent protector (4) series connection after it is in parallel with posive temperature coefficient thermistor piece (2), the series-parallel branch again with the pressure Quick resistor disc (1) series connection, constitutes a single port combinational circuit, wherein the property of overcurrent protector (4) the tolerance surge impact The gas-discharge tube (3) can be higher than, the performance of gas-discharge tube (3) the tolerance surge impact is higher than the piezoresistive wafer (1)；

At least one in two leading-out terminals (5) of the single port combinational circuit is the thermally conductive end of low thermal resistance, the low-heat Wherein one or two hindered in thermally conductive end and the piezoresistive wafer (1), the posive temperature coefficient thermistor piece (2) is same When be thermally coupled to each other.

9. a kind of Surge Protector chip of high safety performance according to claim 1 or 8, which is characterized in that it is described just Temperature coefficient thermistor piece (2) can be replaced the resistance of linear feature.