CN208754276U - A kind of ground radar data receiving system - Google Patents
A kind of ground radar data receiving system Download PDFInfo
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- CN208754276U CN208754276U CN201821363053.XU CN201821363053U CN208754276U CN 208754276 U CN208754276 U CN 208754276U CN 201821363053 U CN201821363053 U CN 201821363053U CN 208754276 U CN208754276 U CN 208754276U
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- data receiving
- radar data
- receiving system
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Abstract
The utility model relates to a kind of ground radar data receiving systems, including intermediate-frequency signal sampler, further include digital signal processor, controller, down coversion and host computer；The intermediate-frequency signal sampler includes signal acquisition module, modem and filter.The features such as this system has data receiver acquisition transmission fast, high reliablity, at low cost, has important practical significance and wide application prospect.
Description
Technical field
The utility model relates to a kind of ground radar data receiving systems, belong to digital signal processing technique field.
Background technique
With the rapid development and universal, radar data reception acquisition system of computer technology and Digital Signal Processing
Also application is quickly got, the application of especially high-speed data reception acquisition system is increasingly extensive.Especially it is being related to number
Can information processing and radar signal processing field realize that accurately data receiver acquisition will undoubtedly determine whole system to high speed
Performance.
Utility model content
The shortcomings that technical problem to be solved in the utility model is, overcomes the prior art provides a kind of information reception biography
The ground radar data receiving system that defeated speed is fast, stability is good, high-efficient.
In order to solve the above technical problems, the utility model provides a kind of ground radar data receiving system, including intermediate frequency
Signal sampler, it is characterised in that: further include digital signal processor, controller, down coversion and host computer；The intermediate frequency letter
Number sampler includes signal acquisition module, modem and filter；The signal acquisition module is by collected intermediate frequency
After transmitting filter carries out High frequency filter processing after the modulated demodulator demodulation process of signal, obtained original signal is transmitted to
Digital signal processor；The digital signal processor is sent to controller after being demodulated the original signal received；Institute
It states controller and the data-signal received is sent to host computer, and the signal instruction that host computer issues is sent to down coversion.
The technical solution that the utility model further limits is: further including clock controller；The clock controller difference
Control port connection corresponding with intermediate-frequency signal sampler and digital signal processor.
It further, further include the SDRAN memory being connect with digital signal processor signal.
It further, further include the external drive being connect with digital signal processor signal.
The beneficial effects of the utility model are: this system has data receiver acquisition transmission fast, high reliablity is at low cost etc.
Feature has important practical significance and wide application prospect.
Detailed description of the invention
Fig. 1 is the system construction drawing of embodiment 1.
Fig. 2 is 1 down coversion functional block diagram of embodiment.
Specific embodiment
The utility model is described further with reference to the accompanying drawings and detailed description.
Embodiment 1
A kind of ground radar data receiving system provided in this embodiment, as shown in Figs. 1-2: being adopted including at least intermediate-freuqncy signal
Sample device, digital signal processor, controller, down coversion, host computer, clock controller；Intermediate-frequency signal sampler includes that signal is adopted
Collect module, modem and filter；Signal acquisition module mediates the modulated demodulator solution of collected intermediate-freuqncy signal
After transmitting filter carries out High frequency filter processing after reason, obtained original signal is transmitted to digital signal processor.Number letter
Number processor is sent to controller after being demodulated the original signal received；Controller sends the data-signal received
Down coversion is sent to host computer, and by the signal instruction that host computer issues.Clock controller respectively with intermediate-frequency signal sampler
It is connected with the corresponding control port of digital signal processor.The structure of the present embodiment further includes connecting with digital signal processor signal
The SDRAN memory connect and external drive.
Intermediate-freuqncy signal is sampled using the ADC16DV160 of TI company in the present embodiment, recycles Xilinx company
XC6VSX315T carries out Digital Signal Processing, and STM32F103RBT6 processor has been selected to be used to make control and data interaction, choosing
Clock is provided for FPGA and AD sampler with clock controller AD9516, to guarantee system performance, while utilizing M25P64-MF6
Serial Flash memory and the 256MB/8bits memory chip HYB39S256800 of Modern Corporation carry out necessary data storage.
The ADC16DV160 of TI company is 16 precision, and 160MHz sample rate, the SNR in input signal 30MHz reaches
78dBFS, SNR still has 76dBS when input signal is 197MHz.
Carrier synchronization belongs to one kind of frequency modulation, it is contemplated that system performance, using the method for coherent demodulation, and coherent signal and load
Frequency obtains original signal and a high-frequency signal after being multiplied, and being filtered out high-frequency signal by low-pass filter can be obtained original letter
Number.
The XC5VLX110T of Xilinx company, which carries out Digital Signal Processing, 110k logic unit, 64 DSP resources, selection
Configuration chip of the M25P64 as it.
Synchronization signal processing is to generate a bit timing pulse sequence as sampling judgement in receiving end, the sequence
Repetition rate is identical as chip rate, and phase is consistent with the optimal judgement moment, by correctly sampling judgement, from useful signal
Single bit data stream is extracted, receipts rope is carried out in the bit stream that step extracts in front, checks sync check, to realize to solution
The frame of tune carries out localization process.
Theoretically FPGA can complete to control, but to mitigate whole system complexity, guarantee progress, select in the present embodiment
STM32F103RBT6 processor is used to make control and data interaction.
The method of the present embodiment signal processing is as follows:
1. sample frequency
Sample rate selects 698.254kHz, such 70MHz to fall near sample rate 1/4, relatively good processing.
2. the control of the bit error rate
There are three the factor of the influence bit error rate is main: signal-to-noise ratio, frequency deviation and frequency error.
The minimum frequency deviation of FSK and GFSK demodulates the signal that FSK and GFSK are modulated, when signal-to-noise ratio 0dB, frequency error
Maximum 4kHz or so can guarantee that decoding accuracy rate, the frequency deviation of minimum 10kHz decode enough.
For the signal demodulation of MSK modulation, minimum frequency deviation is conditional.Due to the characteristic of MSK, frequency deviation is proportional to code
Rate, therefore the bit rate of MSK modulated signal has lower limit requirement, in terms of simulated program, minimum bit rate is related with signal-to-noise ratio.Its
Frequency deviation is too small, so frequency error requires to control very harsh, as bit rate 2kHz, signal-to-noise ratio 10dB, frequency error is obtained
Less than 200Hz.For the frequency acquisition problem of FSK and GFSK modulated signal, can be realized by FFT, to sampled signal
It is continuously one 1024 point FFT, the frequency that maximum position of spectral line calculates a frequency point is taken out, center can be calculated further according to frequency deviation
Frequency, at this moment max=sample rate/1024 of frequency error=682Hz, can satisfy decoding request.
In addition to the implementation, the utility model can also have other embodiments.It is all to use equivalent replacement or equivalent change
The technical solution to be formed is changed, the protection scope of the requires of the utility model is all fallen within.
Claims (4)
1. a kind of ground radar data receiving system, including intermediate-frequency signal sampler, it is characterised in that: further include at digital signal
Manage device, controller, down coversion and host computer；The intermediate-frequency signal sampler include signal acquisition module, modem with
And filter；The signal acquisition module by transmitting filter after the modulated demodulator demodulation process of collected intermediate-freuqncy signal into
After the processing of row High frequency filter, obtained original signal is transmitted to digital signal processor；The digital signal processor will connect
The original signal received is sent to controller after being demodulated；The data-signal received is sent to upper by the controller
Machine, and the signal instruction that host computer issues is sent to down coversion.
2. ground radar data receiving system according to claim 1, it is characterised in that: further include clock controller；Institute
State clock controller control port connection corresponding with intermediate-frequency signal sampler and digital signal processor respectively.
3. ground radar data receiving system according to claim 1, it is characterised in that: further include and Digital Signal Processing
The SDRAN memory of device signal connection.
4. ground radar data receiving system according to claim 1, it is characterised in that: further include and Digital Signal Processing
The external drive of device signal connection.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821363053.XU CN208754276U (en) | 2018-08-23 | 2018-08-23 | A kind of ground radar data receiving system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821363053.XU CN208754276U (en) | 2018-08-23 | 2018-08-23 | A kind of ground radar data receiving system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN208754276U true CN208754276U (en) | 2019-04-16 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201821363053.XU Active CN208754276U (en) | 2018-08-23 | 2018-08-23 | A kind of ground radar data receiving system |
Country Status (1)
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| CN (1) | CN208754276U (en) |
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2018
- 2018-08-23 CN CN201821363053.XU patent/CN208754276U/en active Active
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