CN208506697U - A kind of cold reset circuit of controllable time delay - Google Patents
A kind of cold reset circuit of controllable time delay Download PDFInfo
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- CN208506697U CN208506697U CN201821119510.0U CN201821119510U CN208506697U CN 208506697 U CN208506697 U CN 208506697U CN 201821119510 U CN201821119510 U CN 201821119510U CN 208506697 U CN208506697 U CN 208506697U
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- circuit
- switching tube
- cold reset
- time delay
- control unit
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Abstract
The utility model relates to resetting technique field, in particular to the cold reset circuit of a kind of controllable time delay.The cold reset circuit of the controllable time delay includes sequentially connected control unit, delay circuit, reset circuit and power supply circuit, control unit is after getting the signal needed to be reset, its communication between delay circuit is controlled to be connected, delay circuit exports control signal after being delayed a period of time and turns it on to insulated-gate type switching tube, so that control unit is connected to power supply circuit.The cold reset circuit of the controllable time delay realizes that the cold reset to application system, delay circuit realize that the time delays control to application system realizes that different cold resets controls the time to different application systems to reach.Main application is in the scm application system or built-in applied system of energy monitoring system; application system can be made to realize long-range power-off restoration i.e. cold reset; a kind of safety protecting mechanism is provided for the normal operation of system, application system is enable to run stably in a long term.
Description
Technical field
The utility model relates to resetting technique field, in particular to the cold reset circuit of a kind of controllable time delay.
Background technique
Currently, China has become production of energy big country and energy-consuming big country.Especially over the past two years, fast in national economy
Under the pulling of speed growth, China's energy demand increases comparatively fast, and energy shortage, which also has become, restricts economic lasting, stable development weight
Want problem.Especially in industry, energy-consuming is increasing, and therefore, country has also put into effect corresponding policy, consumes energy to emphasis single
Energy consumption data monitoring is implemented in position, to realize that multi-energy data monitoring must have energy consumption data acquisition equipment, it is ensured that the reality of data
When it is online, will have higher requirement to energy consumption data acquisition equipment, especially in some particular applications, in severe work
Industry environment, and when data acquisition applications system is in unattended state, when application system by external strong interfere and
System is caused to occur abnormal, relying solely on some conventional protection mechanisms at this time possibly can not be restored to normal operating status.
Utility model content
The purpose of this utility model is that avoid above-mentioned shortcoming in the prior art and provide a kind of development difficulty and
The cold reset circuit of the relatively low controllable time delay of cost of implementation, the processor of system.
To achieve the above object, the utility model provides the cold reset circuit of controllable time delay, including sequentially connected control
Unit, delay circuit, reset circuit and power supply circuit, described control unit include two control signal output mouth CPOW,
DOGCON, the two control signal output mouths are connected respectively to opposite control terminal switching tube Q1, the Q2 of two conducting directions, institute
The control terminal for stating delay circuit is connected with switching tube Q3, the two control terminal switching tube Q1, Q2 co- controlling switching tubes Q3 it is logical/
It is disconnected, so that it is connected to/disconnects the communication between described control unit and the delay circuit, the signal output end of the delay circuit
Be connected to power supply circuit by an insulated-gate type switching tube, the insulated-gate type switching tube according to the output signal of delay circuit it is logical/
The disconnected communication to described in ON/OFF between delay circuit and the power supply circuit.
Wherein, described control unit is connected with the cloud platform being in communication with each other with it.
Wherein, described control unit is MCU control chip or application system chip.
Wherein, control terminal switching tube Q1 is PNP type triode, and base stage is connected to the control signal output of control unit
Mouth CPOW；Control terminal switching tube Q2 is NPN type triode, and base stage is connected to the control signal output mouth of control unit
DOGCON；Emitter-base bandgap grading, the collector of control terminal switching tube Q2 of control terminal switching tube Q1 is connected with the base stage three of switching tube Q3.
Wherein, the delay circuit includes the when base chip U1 for being connected with the model LM555 of buffer circuit, the buffering
Circuit includes capacitor E1, the control signal input TR of base chip U1 when the collector of the switching tube Q3 is connected to this.
Wherein, it is connected with two-part switching circuit between the delay circuit and the insulated-gate type switching tube, described two
Segmentation switching circuit includes switching tube Q4, Q5, the control signal output of base chip U1 when the base stage of the switching tube Q4 is connected to
OUT is held, the collector of the switching tube Q4 is connected to the base stage of the switching tube Q5, and the collector of the switching tube Q5 is connected to
The source electrode of the insulated-gate type switching tube.
Wherein, the insulated-gate type switching tube is the switching tube U2 of model AP9620.
Wherein, the power supply circuit is power supply VCC.
The utility model has the advantages that the cold reset circuit of the controllable time delay includes sequentially connected control unit, delay circuit, resets electricity
Road and power supply circuit, control unit control its communication between delay circuit and lead after getting the signal needed to be reset
Logical, delay circuit exports control signal after being delayed a period of time and turns it on to insulated-gate type switching tube, so that control
Unit is connected to power supply circuit.The cold reset circuit of the controllable time delay realizes that the cold reset to application system, delay circuit are realized
Different cold resets, which controls the time, to be realized to different application systems to reach to the time delays control of application system.It is main
It applies in the scm application system or built-in applied system of energy monitoring system, application system can be made to realize long-range disconnected
Reset, that is, cold reset provides a kind of safety protecting mechanism for the normal operation of system, enables application system stably in a long term
Operation.
Detailed description of the invention
Fig. 1 is the block schematic illustration of the cold reset circuit of controllable time delay.
Fig. 2 is the enabled control circuit schematic diagram of the cold reset circuit of controllable time delay.
Fig. 3 is the delay circuit schematic diagram of the cold reset circuit of controllable time delay.
Fig. 4 is the cold reset circuit diagram of the cold reset circuit of controllable time delay.
Specific embodiment
The utility model is further described with the following Examples.
As shown in figures 1-4, the cold reset circuit of the controllable time delay includes control unit (the MCU control for circuiting sequentially connection
Chip or application system chip, control unit are connected with the cloud platform being in communication with each other with it, to realize depositing in real time for signal
Storage), controllable time delay cold reset unit (including delay circuit, reset circuit) and power supply circuit (power supply system, power supply VCC).
Wherein, control unit controls the on-off of controllable time delay cold reset unit by enable signal.Specifically, control unit includes two
Control signal output mouth CPOW, DOGCON, it is opposite that the two control signal output mouths are connected respectively to two conducting directions
Control terminal switching tube Q1 (low level open high level pass), Q2 (high level opens low level pass).Control terminal switching tube Q1 is positive-negative-positive
Triode, base stage are connected to the control signal output mouth CPOW of control unit；Control terminal switching tube Q2 is three pole of NPN type
Pipe, base stage are connected to the control signal output mouth DOGCON of control unit；The emitter-base bandgap grading of control terminal switching tube Q1, control terminal are opened
The collector for closing pipe Q2 is connected with the base stage three of switching tube Q3.The two control terminal switching tube Q1, Q2 co- controlling switching tubes
The on/off of Q3, to be connected to/disconnect control unit and delay circuit and reset circuit (the switching tube U2 of model AP9620)
Between communication, and then control the communication between power supply system and control unit.
Specifically, as shown in figure 3, delay circuit includes the when base chip U1 for being connected with the model LM555 of buffer circuit,
This when base chip U1 control signal input TR be connected to the collector of switching tube Q3 as shown in Figure 2.Buffer circuit includes
Capacitor E1, when base chip U1 power-up hold the mode of E1 and complete delay function, it is at low cost, and can arbitrarily adjust reset delay
Time.As shown in figure 4, when base chip U1 and switching tube U2 between be connected with two-part switching circuit, two-part switching circuit packet
Switching tube Q4, Q5 are included, the control signal output OUT of base chip U1, the collection of switching tube Q4 when the base stage of switching tube Q4 is connected to
Electrode is connected to the base stage of switching tube Q5, and the collector of switching tube Q5 is connected to the source electrode of switching tube U2.
As shown in Figure 2, MCU or the I/O port of application system control the output of Connet1 by pin CPOW and DOGCON
Level nature, CPOW and DOGCON's is used in mixed way the enabled and control output for being equivalent to control chip, and doing so makes control more
Add safe and reliable.Also, base chip when LM555 chip is, wherein TR foot is control foot, be can be seen that in conjunction with Fig. 2 and Fig. 3 flat
When be pulled upward to high level power supply on, when this foot is pulled low, base chip operation when just will start, when 6 foot level exceed 5 feet electricity
Flat, this when of OUT foot exports low level, and after the G foot of AP9620 is pulled low, AP9620 will end, and power supply will not be defeated
Out, the OUT foot output low level time is controlled by E1, and the capacity of E1 capacitor is bigger, is just grown by the time that 7 feet discharge, then
The deadline of AP9620 output power supply is just grown, after the electricity of E1 is given out light, after voltage of the voltage equal to less than 5 feet, OUT foot
Voltage reversal is output HIGH voltage, this when, AP9620 was connected again, restarts to power.Discharge capacity selects putting for 22 μ F
The electric delay time can arrive 10s, and R15 resistance will select greatly, prevent DIS foot from directly discharging by VCC.
The calculation method of delay time is as follows:
T=0.693*R*C=0.693*500k*22 μ F=0.693*500*1000*22*0.000001=7.623s；
It is found that delay time can be adjusted accordingly according to the practical situations at scene from above-mentioned calculation formula
To adapt to different application systems.
As can be seen from Figure 4, the cold reset circuit of the controllable time delay uses the AP9620 chip of AP company, this chip belongs to insulation
Grid-type switching tube, when Vsd is greater than 2.5V, SD can be fully on, and conducting speed is fast, and conduction impedance is low, and such temperature rise is compared
It is low.The peripheral circuit needed simultaneously is fewer, when the I/O mouth control grid of MCU, the voltage of grid is made to be lower than the voltage of source electrode
When 2.5V, SD can be connected, and electric current flows through switching tube, otherwise switch cut-off, without voltage output, reach the control to VCC.When
VCC electricity is cut off, and when back-end circuit is not powered, the element of whole equipment will stop working, and until VCC is exported again, is reached
To the purpose of cold reset.
Control program of the cold reset circuit of the controllable time delay using LM555+AP9620, base when wherein LM555 is
Chip can work in wide-voltage range, and exemplary operation electric current is 36mA, and operating temperature is -40 DEG C~85 DEG C, particularly suitable
In severe industrial environment, delay time can be adjusted according to external connect element, and peripheral circuit is few, design cost
It is low；Control system power supply part is controlled using AP9620, this chip belongs to insulated-gate type switching tube, and supply current is big, leads
The resistance that is powered is low.Switching mode AP9620 pipe peripheral circuit is few, and load capacity is strong, and conducting speed is fast, and conduction impedance low-temperature-rise is low.Conducting
Electric current maximum can reach 9.5A, and low driving voltage, minimum can be -55 DEG C~150 DEG C down to 2.5V, operating temperature range.
The cold reset circuit of the controllable time delay is controlled using AP9620+LM555；Wherein AP9620 is realized to application system
Cold reset, LM555 realize to the control of the time delays of application system with reach different application systems is realized it is different cold multiple
The position control time.Main application in the scm application system or built-in applied system of energy monitoring system, for pair
This type application system realizes long-range power-off restoration, that is, cold reset, provides a kind of safety protecting mechanism for the normal operation of system,
Application system is set to run stably in a long term, also, the control unit of the cold reset circuit of the controllable time delay is connected with cloud and puts down
Platform enables application system at every moment to acquire energy consumption data, does Energy Efficiency Analysis for the product that enterprise produces and provides data foundation,
It reduces application system on-site maintenance cost, increase economic efficiency.
Claims (8)
1. a kind of cold reset circuit of controllable time delay, which is characterized in that including sequentially connected control unit, delay circuit, answer
Position circuit and power supply circuit, described control unit include two control signal outputs mouth CPOW, DOGCON, the two controls
Signal output port is connected respectively to opposite control terminal switching tube Q1, the Q2 of two conducting directions, the control of the delay circuit
End is connected with switching tube Q3, the on/off of the two control terminal switching tube Q1, Q2 co- controlling switching tubes Q3, to be connected to/disconnect
The signal output end of communication between described control unit and the delay circuit, the delay circuit is opened by an insulated-gate type
It closes pipe and is connected to power supply circuit, the insulated-gate type switching tube is according to the output signal on/off of delay circuit to ON/OFF institute
State the communication between delay circuit and the power supply circuit.
2. the cold reset circuit of controllable time delay according to claim 1, which is characterized in that described control unit be connected with
Its cloud platform being in communication with each other.
3. the cold reset circuit of controllable time delay according to claim 2, which is characterized in that described control unit is MCU control
Coremaking piece or application system chip.
4. the cold reset circuit of controllable time delay according to claim 1, which is characterized in that control terminal switching tube Q1 is PNP
Type triode, base stage are connected to the control signal output mouth CPOW of control unit；Control terminal switching tube Q2 is three pole of NPN type
Pipe, base stage are connected to the control signal output mouth DOGCON of control unit；The emitter-base bandgap grading of control terminal switching tube Q1, control terminal are opened
The collector for closing pipe Q2 is connected with the base stage three of switching tube Q3.
5. the cold reset circuit of controllable time delay according to claim 4, which is characterized in that the delay circuit includes connection
There is the when base chip U1 of the model LM555 of buffer circuit, the buffer circuit includes capacitor E1, the current collection of the switching tube Q3
The control signal input TR of base chip U1 when pole is connected to this.
6. the cold reset circuit of controllable time delay according to claim 5, which is characterized in that the delay circuit and it is described absolutely
Two-part switching circuit is connected between edge grid-type switching tube, the two-part switching circuit includes switching tube Q4, Q5, described to open
The control signal output OUT of base chip U1, the collector of the switching tube Q4 are connected to institute when the base stage of pass pipe Q4 is connected to
The base stage of switching tube Q5 is stated, the collector of the switching tube Q5 is connected to the source electrode of the insulated-gate type switching tube.
7. the cold reset circuit of controllable time delay according to claim 6, which is characterized in that the insulated-gate type switching tube is
The switching tube U2 of model AP9620.
8. the cold reset circuit of controllable time delay according to claim 1, which is characterized in that the power supply circuit is power supply
VCC。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821119510.0U CN208506697U (en) | 2018-07-13 | 2018-07-13 | A kind of cold reset circuit of controllable time delay |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821119510.0U CN208506697U (en) | 2018-07-13 | 2018-07-13 | A kind of cold reset circuit of controllable time delay |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN208506697U true CN208506697U (en) | 2019-02-15 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
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| CN201821119510.0U Active CN208506697U (en) | 2018-07-13 | 2018-07-13 | A kind of cold reset circuit of controllable time delay |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111966195A (en) * | 2020-07-28 | 2020-11-20 | 武汉光迅科技股份有限公司 | Start control circuit and method |
-
2018
- 2018-07-13 CN CN201821119510.0U patent/CN208506697U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111966195A (en) * | 2020-07-28 | 2020-11-20 | 武汉光迅科技股份有限公司 | Start control circuit and method |
| CN111966195B (en) * | 2020-07-28 | 2022-09-09 | 武汉光迅科技股份有限公司 | Start control circuit and method |
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