CN208111440U - One-way low-capacitance TVS device - Google Patents
One-way low-capacitance TVS device Download PDFInfo
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- CN208111440U CN208111440U CN201721901384.XU CN201721901384U CN208111440U CN 208111440 U CN208111440 U CN 208111440U CN 201721901384 U CN201721901384 U CN 201721901384U CN 208111440 U CN208111440 U CN 208111440U
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Abstract
A kind of one-way low-capacitance TVS device is disclosed, one-way low-capacitance TVS device is formed by semiconductor integrated technique it is possible thereby to improve the reliability of one-way low-capacitance TVS device, reduces the volume of one-way low-capacitance TVS device.Further, the first triode, the second triode, general-purpose diode and zener diode are formd in one-way low-capacitance TVS device, wherein, first triode and the second triode form SCR structure, and general-purpose diode and SCR structure are connected in parallel between power supply and ground；Zener diode is connected between the base stage and ground of the first triode.One-way low-capacitance TVS device compared to the prior art can significantly reduce capacitor, making the capacitor of power Vcc GND over the ground can achieve less than 0.6pF, peak-peak electric current can achieve 7A, and the corresponding maximum clamp voltage of peak-peak electric current can achieve less than 10V.
Description
Technical field
The utility model relates to technical field of manufacturing semiconductors, in particular to a kind of one-way low-capacitance TVS device.
Background technique
The above one-way low-capacitance TVS of 0.3pF (containing) (Transient Voltage Suppressor, wink currently on the market
State inhibits diode) circuit of chip is usually that a first general-purpose diode D1 (is typically chosen common two pole of low capacitor
Pipe) it connects with a zener diode Z1, then (common the two of low capacitor are typically chosen with another second general-purpose diode D2
Pole pipe) parallel combination formation (see Fig. 1), from the point of view of power Vcc over the ground electric current~voltage (I~V) curve of GND, positive and negative characteristic
Still equivalent to a general-purpose diode, but the corresponding capacitor of equivalent circuit is well below the single general T VS of identical voltage
Diode.
The low capacitor VTS device being composed, the capacitance C of power Vcc GND over the groundTIt can be expressed as：
Wherein, CD1For the capacitor of the first general-purpose diode D1, CD1For the capacitor of the second general-purpose diode D2, CZ1For pressure stabilizing
The capacitor of diode Z1.
Here CD1And CD2It is all smaller, CZ1It is more order of magnitude greater than the above two, so the first general-purpose diode D1 and pressure stabilizing
After diode Z1 series connection, total series capacitance is essentially identical to the capacitor of the first general-purpose diode D1.
When power Vcc plus positive potential, when ground GND adds negative potential：Since the second general-purpose diode D2 breakdown voltage is higher,
Zener diode Z1 breakdown voltage is lower, so zener diode Z1 takes the lead in puncturing, the reverse breakdown electricity of power Vcc GND over the ground
Pressure can be expressed as：
VBR=VfD1+VZ1
Wherein, VfD1For the forward voltage drop of the first general-purpose diode D1.
When power Vcc plus negative potential, when ground GND adds positive potential：Since the second general-purpose diode D2 breakdown voltage is higher,
Zener diode Z1 breakdown voltage is lower, so zener diode Z1 takes the lead in puncturing, the reverse breakdown electricity of power Vcc GND over the ground
Pressure can be expressed as：
Vf=VfD2
Wherein, VfD2For the forward voltage drop of the second general-purpose diode D2.
It can be seen that the forward and reverse characteristic of one-way low-capacitance TVS device being composed substantially corresponds to a general-purpose diode,
Breakdown reverse voltage is mainly controlled by the breakdown voltage of zener diode Z1；Capacitor is mainly by CD1And CD2Control, so for reality
Existing low capacitor, is actually exactly to reduce CD1And CD2；Positive and negative direction static discharge (the Electrosta of power Vcc GND over the ground simultaneously
Tic Discharge, ESD) ability is practical and is respectively equivalent to the positive ESD ability (pressure stabilizing of two general-purpose diodes of D1, D2
The breakdown reverse voltage of diode Z1 is lower, and generally between 3.3~7.0V, reversed ESD ability is very high, can not examine
Consider).So being actually exactly the positive ESD ability for improving two general-purpose diodes of D1, D2 to realize high ESD ability.
The positive clamping voltage of the power supply of one-way low-capacitance TVS chip over the ground is mainly by Vf currently on the marketD1+VZ1Control,
High clamp voltage can cause dissipated power higher, be easy to be burned out.
Utility model content
In view of the above problems, the purpose of this utility model is to provide a kind of one-way low-capacitance TVS devices, to reduce highest
The corresponding maximum clamp voltage of peak point current.
It is according to the present utility model in a first aspect, provide a kind of one-way low-capacitance TVS device, including：First conduction type
Substrate；First conductive type epitaxial layer, first conductive type epitaxial layer are formed in first conductivity type substrate；The
One conduction type buried layer, the first conduction type buried layer are formed in first conductive type epitaxial layer；Second conductive-type
Type buried layer, the second conduction type buried layer are formed on the first conduction type buried layer；Second conductive type epitaxial layer, institute
The second conduction type buried layer is stated to be formed on first conductive type epitaxial layer；First conduction type well region, described first leads
Electric type well region is formed in second conductive type epitaxial layer；Multiple isolation structures, the multiple isolation structure run through institute
The second conductive type epitaxial layer and first conductive type epitaxial layer are stated, the multiple isolation structure is conductive by described second
Type epitaxial layer is divided into multiple regions, and the multiple region includes first area and second area, and the multiple isolation structure prolongs
Extend to first conductivity type substrate；Second conductivity type implanted region, second conductivity type implanted region are formed in described
In first area and the well region part of second area；First conductivity type implanted region, first conductivity type implanted region shape
In the non-well region part of second area described in Cheng Yu and well region part.
Preferably, the one-way low-capacitance TVS device further includes：Multiple tungsten plug structures, the multiple tungsten plug structure run through
Second conductive type epitaxial layer and the first conductive type epitaxial layer, the multiple tungsten plug structure extend to described first and lead
Electric type substrates.
Preferably, the one-way low-capacitance TVS device further includes：First metal wire, described in first metal wire connection
The first conduction type injection in the non-well region part of the second conductivity type implanted region and the second area in first area
Area；Second metal wire, second metal wire connect the first conductivity type implanted region in the well region part of the second area,
Second conductivity type implanted region and multiple tungsten plug structures.
Preferably, first metal wire connects to power supply, and first conductivity type substrate is connected to ground.
Preferably, first conduction type is p-type, and second conduction type is N-type；Alternatively, described first is conductive
Type is N-type, and second conduction type is p-type.
Preferably, first conductivity type substrate is attached most importance to doped structure, and first conductive type epitaxial layer is gently to mix
Miscellaneous structure, the first conduction type buried layer are attached most importance to doped structure, and the second conduction type buried layer is attached most importance to doped structure, described
Second conductive type epitaxial layer is light-dope structure, and the first conduction type well region is attached most importance to doped structure, and described second is conductive
Type implanted region is attached most importance to doped structure, and first conductivity type implanted region is attached most importance to doped structure.
Preferably, first conductivity type substrate is attached most importance to doped structure, and first conductive type epitaxial layer is gently to mix
Miscellaneous structure, the first conduction type buried layer are light-dope structure, and the second conduction type buried layer is attached most importance to doped structure, described
Second conductive type epitaxial layer is light-dope structure, and the first conduction type well region is attached most importance to doped structure, and described second is conductive
Type implanted region is attached most importance to doped structure, and first conductivity type implanted region is attached most importance to doped structure.
Preferably, the resistivity of first conductivity type substrate is 0.005 Ω of Ω .cm~0.008 .cm.
Preferably, the resistivity of first conductive type epitaxial layer is the 2.0 Ω .cm of Ω .cm~4.0, with a thickness of 6.0 μm
~14.0 μm.
Preferably, the resistivity of second conductive type epitaxial layer 28 is the 25 Ω .cm of Ω .cm~35, with a thickness of 6.0 μm
~12.0 μm.
Preferably, the first conduction type buried layer includes that first injected in first conductive type epitaxial layer is led
Electric types of ion, wherein the implantation dosage of first conductive type ion is 2.0E15-6.0E15.
Preferably, the first conduction type buried layer includes that first injected in first conductive type epitaxial layer is led
Electric types of ion, wherein the implantation dosage of first conductive type ion is 1.0E14-8.0E14.
Preferably, the second conduction type buried layer includes the second conduction injected on the first conduction type buried layer
Types of ion, the implantation dosage of second conductive type ion are 6.0E15-1.0E16.
Preferably, the first conduction type well region includes that first injected in second conductive type epitaxial layer is led
Electric types of ion, the implantation dosage of first conductive type ion are 1.0E14~1.0E15.
Preferably, the isolation structure includes groove and the polysilicon for filling groove, wherein the multiple groove runs through
Second conductive type epitaxial layer and the first conductive type epitaxial layer, the multiple groove extend to the first conduction type lining
In bottom, second conductive type epitaxial layer is divided into first area and second area by the multiple groove.
Preferably, the depth of the groove is 10 μm~20 μm, and width is 1.5 μm~3 μm.
Preferably, second conductivity type implanted region includes the well region part in the first area and second area
Second conductive type ion of middle injection, the implantation dosage of second conductive type ion are 1.0E15~1.0E16.
Preferably, first conductivity type implanted region includes in the non-well region part of the second area and well region part
First conductive type ion of middle injection, the implantation dosage of first conductive type ion are 1.0E15~1.0E16.
Preferably, the tungsten plug includes multiple grooves and the tungsten plug for filling groove, wherein the multiple groove runs through institute
The second conductive type epitaxial layer and the first conductive type epitaxial layer are stated, the multiple groove extends to the first conductivity type substrate
In, second conductive type epitaxial layer is divided into first area and second area by the multiple groove.
Preferably, the depth of the groove 40 is 10 μm~20 μm, and width is 1.5 μm~2 μm.
Preferably, the second conductive type epitaxial layer in the first area and first conductive type epitaxial layer are constituted
General-purpose diode；The first conduction type buried layer and the second conduction type buried layer in the second area constitute pressure stabilizing
Diode；The second conductive type epitaxial layer, the first conduction type well region and the second area in the second area
The first conductivity type implanted region in non-well region part constitutes the first triode；The first conductive type of trap in the second area
The second conductivity type implanted region in area and the well region part of the second conductive type epitaxial layer and the second area forms the
Two triodes.
Preferably, when the power supply adds positive potential, adds negative potential describedly, reverse breakdown of the power supply to the ground
Voltage is：VBR=VebfT1+VZ1, wherein VBRIt is the power supply to the breakdown reverse voltage on the ground；VebfT1For the one or three pole
The backward voltage of pipe, VZ1For the voltage of zener diode.
Preferably, when the power supply adds positive potential, adds negative potential describedly, reverse breakdown of the power supply to the ground
Voltage is：VBR=Vsb, wherein VBRIt is the power supply to the breakdown reverse voltage on the ground；Vsb is the first triode and second
The rebound voltage for the SCR structure that triode is formed.
Preferably, when the power supply adds negative potential, adds positive potential describedly, forward voltage drop of the power supply to the ground
For Vf=VfD1, wherein Vf is forward voltage drop of the power supply to the ground, VfD1For the pressure drop of general-purpose diode.
One-way low-capacitance TVS device provided by the embodiment of the utility model is formed unidirectional low by semiconductor integrated technique
Capacitance TVS device reduces the volume of one-way low-capacitance TVS device it is possible thereby to improve the reliability of one-way low-capacitance TVS device.
Further, the first triode, the second triode, general-purpose diode are formd in one-way low-capacitance TVS device
And zener diode, wherein first triode and the second triode form SCR structure, and general-purpose diode and SCR structure are simultaneously
Connection is connected between power supply and ground；Zener diode is connected between the base stage and ground of the first triode.
One-way low-capacitance TVS device compared to the prior art can significantly reduce capacitor, make power Vcc GND over the ground
Capacitor can achieve less than 0.6pF, peak-peak electric current can achieve 7A, and the corresponding maximum clamper of peak-peak electric current
Voltage can achieve less than 10V.
Detailed description of the invention
By referring to the drawings to the description of the utility model embodiment, above-mentioned and other mesh of the utility model
, feature and advantage will be apparent from, in the accompanying drawings：
Fig. 1 shows the circuit diagram of existing one-way low-capacitance TVS device；
Fig. 2 shows the circuit diagrams of the one-way low-capacitance TVS device of an embodiment of the present invention；
It is special that Fig. 3 shows volt-ampere of the one-way low-capacitance TVS device of an embodiment of the present invention when SCR is not triggered
Property figure；
Fig. 4 shows C-V characteristic of the one-way low-capacitance TVS device of an embodiment of the present invention when SCR is triggered
Figure；
The manufacturing method that Fig. 5 to Figure 18 shows the one-way low-capacitance TVS device of an embodiment of the present invention is formed
Structure diagrammatic cross-section；
Specific embodiment
Hereinafter reference will be made to the drawings is more fully described the various embodiments of the utility model.In various figures, identical
Element is indicated using same or similar appended drawing reference.For the sake of clarity, the various pieces in attached drawing are not drawn to draw
System.
With reference to the accompanying drawings and examples, specific embodiment of the present utility model is described in further detail.
Fig. 2 shows the circuit diagrams of the one-way low-capacitance TVS device of an embodiment of the present invention.As shown in Fig. 2,
In the embodiment of the present application, the one-way low-capacitance TVS device 1 includes：First triode T1, the second triode T2, common two
Pole pipe D1 and zener diode Z1, wherein with the one or three after the second triode T2 is in parallel with the zener diode Z1
Pole pipe T1 connects to form the first branch, and the first branch is in parallel with the general-purpose diode D1.Wherein, the one or three pole
Pipe T1 and the second triode T2 forms silicon-controlled (Silicon Controlled Rectifier, SCR) structure.
Wherein, the collector of the second triode T2 is connect with the base stage of the first triode T1, and the described 2nd 3
The emitter of pole pipe T2 is connect with ground GND, and the collector of the base stage of the second triode T2 and the first triode T1 connect
It connects；The anode of the zener diode Z1 is connect with ground GND, and cathode is connect with the base stage of the first triode T1.Described 1st
The emitter of pole pipe T1 is connect with power Vcc.The anode of the general-purpose diode D1 is connect with power Vcc, and cathode and ground GND connect
It connects.
Here, passing through shape of connecting after the second triode T2 and the zener diode Z1 parallel connection with the first triode T1
At the first branch, the first branch is in parallel with the general-purpose diode D1, therefore, the forward direction of the one-way low-capacitance TVS device
Power dissipation characteristics in leakage current region is equivalent to a general-purpose diode, and positive large current characteristic is equivalent to a SCR structure, may be implemented lower
Clamp voltage reduces dissipated power.
Specifically, the capacitance C of power Vcc GND over the groundTIt can be expressed as：
Here CD1And CT1All smaller (within 0.3pF), CZ1And CT2Than the above two order of magnitude greater (50-100pF),
So the capacitor of the first branch is essentially identical to the capacitor of the first triode T1.The capacitor of circuit entirety is just within 0.6pF.
When power Vcc plus positive potential, when ground GND adds negative potential：(1) if electric current is smaller (such as microampere order), the one or three
The SCR structure that pole pipe T1 and the second triode T2 is formed fails to trigger, and zener diode Z1 breakdown voltage is lower, so pressure stabilizing two
Pole pipe Z1 takes the lead in puncturing, and the breakdown reverse voltage of power Vcc GND over the ground can be expressed as：VBR=VebfT1+VZ1；Wherein,
VebfT1For the backward voltage of the first triode T1, VZ1For the voltage of zener diode, specific C-V characteristic is shown in Fig. 3.(2) if
Electric current (such as milliampere grade) is larger, and the SCR structure that the first triode T1 and the second triode T2 are formed is triggered, and returns after triggering
It plays voltage and there was only 1~2V.Since the breakdown voltage of zener diode Z1 is higher than the rebound voltage of SCR structure；So power Vcc pair
The breakdown reverse voltage of ground GND can be expressed as：VBR=Vsb, wherein Vsb is the rebound voltage of SCR structure, and specific volt-ampere is special
Property is shown in Fig. 4.Since SCR structure has rebound characteristics, when the peak-peak electric current of power Vcc GND over the ground reaches 7A, correspond to
Clamp voltage be still less than 10V.
When power Vcc plus negative potential, when ground GND adds positive potential：Electric current preferentially passes through the anode of general-purpose diode D1, power supply
The forward voltage drop of Vcc GND over the ground can be expressed as：Vf=VfD1, VfD1For the pressure drop of general-purpose diode.
Subsequently, Fig. 5 to Figure 18 is please referred to, is the manufacture of the one-way low-capacitance TVS device of the utility model embodiment
The diagrammatic cross-section for the structure that method is formed.More specifically, Fig. 5 to Figure 18 describes the one-way low-capacitance comprising SCR structure
The forming method of TVS device.
In the embodiment of the present application, the manufacturing method of the one-way low-capacitance TVS device includes the following steps：
Step S10：First conductivity type substrate is provided；
Step S12：The first conductive type epitaxial layer is formed, it is conductive that first conductive type epitaxial layer is located at described first
In type substrates；
Step S14：The first conduction type buried layer is formed, the first conduction type buried layer is located at first conduction type
In epitaxial layer；
Step S16：The second conduction type buried layer is formed, the second conduction type buried layer is located at first wire type
On buried layer；
Step S18：The second conductive type epitaxial layer is formed, it is conductive that second conductive type epitaxial layer is located at described first
On type epitaxial layer；
Step S20：The first conduction type well region is formed, first conductive type of trap area is located at second conduction type
In epitaxial layer；
Step S22：Form multiple isolation structures, the multiple isolation structure through second conductive type epitaxial layer with
And second conductive type epitaxial layer is divided into multiple areas by first conductive type epitaxial layer, the multiple isolation structure
Domain, the multiple region include first area and second area, and the multiple isolation structure extends to first conduction type
Substrate；
Step S24：The second conductivity type implanted region is formed, second conductivity type implanted region is located at the first area
In the well region part of the second area；
Step S26：The first conductivity type implanted region is formed, first conductivity type implanted region is located at the second area
Well region part and non-well region part in；
Step S28：Form multiple tungsten plug structures, the multiple tungsten plug structure through second conductive type epitaxial layer with
And first conductive type epitaxial layer, the multiple tungsten plug structure extend to first conductivity type substrate；
Step S30：The first metal wire and the second metal wire are formed, first metal wire connects in the first area
The first conductivity type implanted region in second conductivity type implanted region and the well region part of the second area；Second metal
Line connect the first conductivity type implanted region in the well region part of the second area, the second area non-well region part in
The second conductivity type implanted region and multiple tungsten plug structures；
Step S32：First metal wire is connected to power supply, first conductivity type substrate is connected to ground.
General-purpose diode D1 will be formed in the first area as a result,；The one or three pole is formed in the second area
Pipe T1 and the second triode T2 and zener diode Z1.Specifically, the first conductive type epitaxial layer in the first area
General-purpose diode D1 is constituted with the second conductive type epitaxial layer；Second conductive type epitaxial layer in the second area,
The first conductivity type implanted region in the non-well region part of first conduction type well region and the second area constitutes the one or three pole
Pipe T1；The well region of the first conduction type well region, the second conductive type epitaxial layer and the second area in the second area
The second conductivity type implanted region in part constitutes the second triode T2；The first conduction type buried layer in the second area and
Second conduction type buried layer constitutes zener diode Z1.
Wherein, first conduction type can be p-type, and second conduction type is N-type；Alternatively, described first leads
Electric type can be N-type, and second conduction type is p-type.It in the present embodiment, can be P with first conduction type
Type, second conduction type are further described for N-type.Wherein, the P-type conduction type can by doping boron ion or
The realization such as ion is transferred, the N-type conduction type can be realized by doping phosphonium ion or antimony ion etc..
Firstly, as shown in figure 5, the first conductivity type substrate 20 is provided, here, namely first conductivity type substrate 20
For P type substrate.In the other embodiments of the application, first conductivity type substrate 20 or N-type substrate.
Preferably, the resistivity of first conductivity type substrate 20 is 0.005 Ω of Ω .cm~0.008 .cm.Preferably
Ground, first conductivity type substrate 20 are attached most importance to doped structure, it is possible thereby to by making between first conductivity type substrate 20
The size of chip not only can be reduced, is met without drawing ground connection GND electrode from front for the electrode for being grounded GND
The encapsulation of smaller volume, and the multichannel product that thus structure extends can also be suitble to a variety of different packing forms, in addition
First conductivity type substrate 20 described in when encapsulation is drawn directly as ground connection GND electrode, can to avoid the routing that is grounded when encapsulation,
Reduce packaging cost.
Then, as shown in fig. 6, forming the first conductive type epitaxial layer 22, institute in first conductivity type substrate 20
Stating the first conductive type epitaxial layer 22 is p-type epitaxial layer, can be generated by chemical vapor deposition method.In the present embodiment,
First conductive type epitaxial layer is light-dope structure, i.e., described in the doping concentration ratio of described first conductive type epitaxial layer 22
The doping concentration of first conductivity type substrate 20 is low.Preferably, the resistivity of first conductive type epitaxial layer 22 is 2.0
The Ω .cm of Ω .cm~4.0, with a thickness of 6.0 μm~14.0 μm.
As shown in fig. 7, the first conduction type buried layer 24 is formed in first conductive type epitaxial layer 22, described first
Conduction type buried layer is p type buried layer.In the present embodiment, the first conduction type buried layer 24 is attached most importance to doped structure.Specifically,
The first conduction type buried layer 24 can be formed by following technique；First is injected in first conductive type epitaxial layer 22
Conductive type ion is herein boron ion, and the implantation dosage of the boron ion is 2.0E15-6.0E15；The boron ion is held
Row annealing process, the temperature of annealing process are 1050 DEG C -1150 DEG C；The time of annealing process is 2.0~6.0h.
In a preferred embodiment, the first conduction type buried layer 24 is light-dope structure.Specifically, can pass through
Following technique forms the first conduction type buried layer 24；The first conductive-type is injected in first conductive type epitaxial layer 22
Type ion is herein boron ion, and the implantation dosage of the boron ion is 1.0E14-8.0E14；Annealing is executed to the boron ion
Technique, the temperature of annealing process are 1050 DEG C -1150 DEG C；The time of annealing process is 2.0~6.0h.
As shown in figure 8, forming the second conduction type buried layer 26 on the first conduction type buried layer 24；Described second
Conduction type buried layer is n type buried layer.In the present embodiment, the second conduction type buried layer 26 is attached most importance to doped structure.Specifically,
The second conduction type buried layer 26 can be formed by following technique；Injection first is led on the first conduction type buried layer 24
Electric types of ion is herein antimony ion, and the implantation dosage of the phosphonium ion is 6.0E15-1.0E16；The phosphonium ion is executed
Annealing process, the temperature of annealing process are 1100 DEG C -1200 DEG C；The time of annealing process is 2.0~4.0h.
The first conduction type buried layer 24 and the second conduction type buried layer 26 constitute zener diode Z1, and described the
One conduction type buried layer 24 attach most importance to doped structure when, zener diode Z1 is the diode of 3.3~7.0V, and described first is conductive
When type buried layer 24 is light-dope structure, zener diode Z1 is the diode of 7.0V~18V.
As shown in figure 9, the second conductive type epitaxial layer 28 is formed on first conductive type epitaxial layer 22, described
Two conductive type epitaxial layers 28 are N-type epitaxy layer, can be generated by chemical vapor deposition method.In the present embodiment, described
Second conductive type epitaxial layer is light-dope structure, i.e., the doping concentration of described second conductive type epitaxial layer 28 is than described second
The doping concentration of conduction type buried layer 26 is low, so that it is guaranteed that CD1And CT1Low capacitance characteristic.Preferably, second conductive-type
The resistivity of type epitaxial layer 28 is the 25 Ω .cm of Ω .cm~35, with a thickness of 6.0 μm~12.0 μm.
Then, as shown in Figure 10, the first conduction type well region 30, institute are formed in second conductive type epitaxial layer 28
Stating the first conduction type well region 30 is P type trap zone.In the embodiment of the present application, the first conduction type well region 30 is heavy doping
Structure.Specifically, the first conduction type well region 30 can be formed by following technique：In second conductive type epitaxial layer
The first conductive type ion is injected in 28, is herein boron ion, the implantation dosage of the boron ion is 1.0E14~1.0E15,
Annealing process is executed to the boron ion, the temperature of annealing process is 1000 DEG C~1500 DEG C；The time of annealing process be 2.0~
4.0h。
Then, as shown in figure 12, multiple isolation structures 34 are formed, the multiple isolation structure 34 is led through described second
Electric type epitaxial layer 28 and the first conductive type epitaxial layer 22, the multiple isolation structure 36 will be outside second conduction types
Prolong layer 28 to divide for multiple regions, the multiple region includes first area 28a and second area 28b, wherein the first area
The second conductive type epitaxial layer and first conductive type epitaxial layer 22 in 28a constitute general-purpose diode.Here, described
The concentration of the second conductive type epitaxial layer of one region 28a and first conductive type epitaxial layer 22 is all very light, as long as to institute
It states general-purpose diode area and does certain selection, that is, can ensure that the ultra-low capacitance and high peak current of the general-purpose diode.
In the embodiment of the present application, forming multiple isolation structures 34 includes：Forming multiple grooves 32 (can be accordingly with reference to figure
11), the multiple groove 32 through second conductive type epitaxial layer 28 and the first conductive type epitaxial layer 22 (here,
The multiple groove 32 also extends in the first conductivity type substrate 20), the multiple groove 32 is by second conduction type
Epitaxial layer 28 divides for first area 28a and second area 28b；Fill polysilicon in each groove 32, can be obtained it is multiple every
From structure 34.
Preferably, the depth of the groove 32 is 10 μm~20 μm, and width is 1.5 μm~3 μm.In the present embodiment, it adopts
It is isolated with groove, not only simple process, also can ensure that and do not posted between each diode and each triode being subsequently formed
It comes into force and answers, especially the structure of multichannel, to improve the reliability of one-way low-capacitance TVS device.
Then, as shown in figure 13, second is formed in the well region part of the first area 28a and second area 28b
Conductivity type implanted region, here, the second conductivity type implanted region 36a in respectively first area 28a, second area 28b's
Second conductivity type implanted region 36a of well region part.In the embodiment of the present application, second conductivity type implanted region is attached most importance to
Doped structure.The first conduction type well region 30, the second conductive type epitaxial layer 28 in the second area 28b and described
The second conductivity type implanted region 36b in the well region part of two region 28b forms the second triode T2.
Specifically, it is conductive that second is formed in the first area and the well region part of second area by the following method
Type implanted region：The second conductive type ion is injected in the well region part of the first area 28a and second area 28b,
It is herein phosphonium ion, the implantation dosage of the phosphonium ion is 1.0E15~1.0E16, executes annealing process to the phosphonium ion, moves back
The temperature of fire process is 800 DEG C~900 DEG C；The time of annealing process is 30~60min.Wherein, changing annealing process may insure
While forming good ohmic contact, the collector of the second triode T2 is also formed.
Then, as shown in figure 14, the first conductive-type is formed in the non-well region part of the second area and well region part
Type injection region, here, the first conductivity type implanted region 38b1 of the non-well region part of the respectively described second area, described second
First conductivity type implanted region 38b2 of the well region part in region.The second conductive type epitaxial layer in the second area 28b
28, the first conductivity type implanted region in the non-well region part of the first conduction type well region 30 and the second area 28b
38b1 constitutes the first triode T1.
Specifically, it is conductive that first is formed in the non-well region part of the second area and well region part by the following method
Type implanted region：The first conductive type ion is injected in the well region part of the second area 28b and non-well region part, herein
For boron ion, the implantation dosage of the boron ion is 1.0E15~1.0E16, executes annealing process, annealing to the boron ion
The temperature of technique is 800 DEG C~900 DEG C；The time of annealing process is 30~60min.
In the embodiment of the present application, first conductivity type implanted region is attached most importance to doped structure.Here, the second area
The concentration of the second conductive type epitaxial layer of 28b is very light, as long as the area of the first conductivity type implanted region 38b1 is done centainly
Selection, that is, can ensure that the ultra-low capacitance and high peak current of the first triode T1.In addition, the eb of the first triode T1 is tied
With zener diode Z1 lontitudinal series, area is saved.
Then, as shown in figure 16, multiple tungsten plug structures 42 are formed, the multiple tungsten plug structure 42 is led through described second
Electric type epitaxial layer 28 and the first conductive type epitaxial layer 22.
In the embodiment of the present application, forming multiple tungsten plug structures 42 includes：Forming multiple grooves 40 (can be accordingly with reference to figure
15, the multiple groove 40 is through second conductive type epitaxial layer 28 and the first conductive type epitaxial layer 22 (here, institute
Multiple grooves 40 are stated to also extend in the first conductivity type substrate 20), tungsten plug is filled in each groove 40, can be obtained multiple
Tungsten plug structure 42.
Preferably, the depth of the groove 40 is 10 μm~20 μm, and width is 1.5 μm~2 μm.In the present embodiment, it adopts
It is electrically connected with tungsten plug structure 42, not only simple process, also can ensure that the collector and the first conductive-type of the second triode T2
Type substrate 20 is connected and then connect with ground connection GND, without drawing ground connection routing from front.
Then, as shown in figure 18, the first metal wire 46a and the second metal wire 46b, the first metal wire 46a company are formed
Connect the first triode T1 and general-purpose diode D1, the second metal wire 46b connection the second triode T2 and multiple tungsten
Plug structure 42.Specifically, it can refer to Figure 17, form dielectric layer 44, the medium on second conductive type epitaxial layer 28
Layer 44 exposes the collector of the anode of general-purpose diode D1, the collector of the first triode T1, the second triode T2；Then, may be used
The first metal wire 46a and the second metal wire 46b is formed by evaporation or splash-proofing sputtering metal layer with reference to Figure 18.Normally, the gold
The material for belonging to layer is aluminium, and thickness can be 2.0 μm.
In the present embodiment, the first metal wire 46a is connect with power Vcc, first conductivity type substrate 20
It is connect with ground GND.Electrode between i.e. described first conductivity type substrate 20 as ground connection GND, without drawing from front
Be grounded GND electrode out, the size of chip not only can be reduced, meet the encapsulation of smaller volume, when in addition encapsulating described in the
One conductivity type substrate 20 is drawn directly as ground connection GND electrode, it is possible to reduce 1 wires, greatly reduction packaging cost.It is excellent
The capacitor of selection of land, power Vcc GND over the ground can achieve less than 0.6pF, and peak-peak electric current can achieve 7A, and peak-peak
The corresponding maximum clamp voltage of electric current can achieve less than 10V.
Further, it can also be formed passivation layer (being not shown in Figure 18).The passivation layer covers second conduction type
Epitaxial layer 28.The structure in one-way low-capacitance TVS device is protected by the passivation layer, to improve the one-way low-capacitance
The quality and reliability of TVS device.Normally, the material of the passivation layer is silicon nitride, and thickness can be 1.0 μm.
Please continue to refer to Figure 18, following unidirectional low electricity is formd by the manufacturing method of above-mentioned one-way low-capacitance TVS device
Hold TVS device, specifically includes：
First conductivity type substrate 20；
First conductive type epitaxial layer 22, first conductive type epitaxial layer 22 are formed in the first conduction type lining
On bottom 20；
First conduction type buried layer 24, the first conduction type buried layer 24 are formed in first conductive type epitaxial layer
In 22；
Second conduction type buried layer 26, the second conduction type buried layer 26 are formed in the first conduction type buried layer 24
On；
Second conductive type epitaxial layer 28, the second conduction type buried layer 28 are formed in the first conduction type extension
On layer 22；
First conduction type well region 30, the first conduction type well region 30 are formed in the second conduction type buried layer 28
In；
Multiple isolation structures 34, the multiple isolation structure 34 is through second conductive type epitaxial layer 28 and described
First conductive type epitaxial layer 22, the multiple isolation structure 34 divide second conductive type epitaxial layer 28 for multiple areas
Domain, the multiple region include first area 28a and second area 28b, wherein second in the first area 28a is conductive
Type epitaxial layer 28 and first conductive type epitaxial layer 22 constitute general-purpose diode；
Second conductivity type implanted region, second conductivity type implanted region are formed in the first area 28a and
In the well region part of two region 28b (it is herein respectively the second conductivity type implanted region 36a being formed in the 28a of first area,
Second conductivity type implanted region 36b of the well region part of second area 28b), the first conduction type in the second area 28b
The second conduction type injection in the well region part of well region 30, the second conductive type epitaxial layer 28 and the second area 28b
Area 36b forms the second triode T2.
First conductivity type implanted region, first conductivity type implanted region are formed in the non-trap of the second area 28b
It (is herein respectively the first conduction type injection for being formed in the non-well region part of the second area in area part and well region part
Area 38b1, the first conductivity type implanted region 38b2 of the well region part of the second area), in the second area 28b
First in the non-well region part of two conductive type epitaxial layers 28, the first conduction type well region 30 and the second area 28b
Conductivity type implanted region 38b1 constitutes the first triode T1.
Multiple tungsten plug structures 42, the multiple tungsten plug structure 42 run through second conductive type epitaxial layer 28 and first
Conductive type epitaxial layer 22.The multiple tungsten plug structure 42 also extends in the first conductivity type substrate 20.
First metal wire 46a, the first metal wire 46a connects the note of the second conduction type in the first area 28a
Enter the first conductivity type implanted region 38b1 in the non-well region part of the area 36a and second area 28b；Second metal wire 46b,
The second metal wire 46b connects the first conductivity type implanted region 38b2 in the well region part of the second area, second leads
Electric type implanted region 36b and multiple tungsten plug structures 42.I.e. described first metal wire 46a connection the first triode T1 and
General-purpose diode D1, the second metal wire 46b connection the second triode T2 and multiple tungsten plug structures 42.
Wherein, the first metal wire 46a is connect with power Vcc, and first conductivity type substrate 20 connects with ground GND
It connects.
Here, the resistivity of first conductivity type substrate 20 is 0.005 Ω of Ω .cm~0.008 .cm.Described first
The resistivity of conductive type epitaxial layer 22 is 2.0 Ω of Ω .cm~4.0 .cm.The resistivity of second conductive type epitaxial layer 28
For 25 Ω of Ω .cm~35 .cm.The isolation structure 34 includes the polysilicon of groove and the filling groove.The tungsten plug knot
Structure 42 includes the tungsten plug of groove and the filling groove.
To sum up, in one-way low-capacitance TVS device provided by the embodiment of the utility model, work is integrated by semiconductor
Skill forms one-way low-capacitance TVS device it is possible thereby to improve the reliability of one-way low-capacitance TVS device, reduces one-way low-capacitance
The volume of TVS device.Further, the first triode, the second triode, common is formd in one-way low-capacitance TVS device
Diode and zener diode, wherein first triode and the second triode form SCR structure, general-purpose diode and SCR
Structure is connected in parallel between power supply and ground；Zener diode is connected between the base stage and ground of the first triode.Compared to existing
Capacitor can significantly be reduced by having the one-way low-capacitance TVS device of technology, can achieve the capacitor of power Vcc GND over the ground small
In 0.6pF, peak-peak electric current can achieve 7A, and the corresponding maximum clamp voltage of peak-peak electric current can achieve and be less than
10V。
It is as described above according to the embodiments of the present invention, these embodiments details all there is no detailed descriptionthe,
Also not limiting the utility model is only the specific embodiment.Obviously, as described above, many modification and change can be made
Change.These embodiments are chosen and specifically described to this specification, is in order to preferably explain the principles of the present invention and actually to answer
With so that skilled artisan be enable to utilize the utility model and repairing on the basis of the utility model well
Change use.The utility model is limited only by the claims and their full scope and equivalents.
Claims (24)
1. a kind of one-way low-capacitance TVS device, which is characterized in that including：
First conductivity type substrate；
First conductive type epitaxial layer, first conductive type epitaxial layer are formed in first conductivity type substrate；
First conduction type buried layer, the first conduction type buried layer are formed in first conductive type epitaxial layer；
Second conduction type buried layer, the second conduction type buried layer are formed on the first conduction type buried layer；
Second conductive type epitaxial layer, the second conduction type buried layer are formed on first conductive type epitaxial layer；
First conduction type well region, the first conduction type well region are formed in second conductive type epitaxial layer；
Multiple isolation structures, the multiple isolation structure run through second conductive type epitaxial layer and first conductive-type
Second conductive type epitaxial layer is divided into multiple regions, the multiple region packet by type epitaxial layer, the multiple isolation structure
First area and second area are included, the multiple isolation structure extends to first conductivity type substrate；
Second conductivity type implanted region, second conductivity type implanted region are formed in the first area and second area
In well region part；
First conductivity type implanted region, first conductivity type implanted region be formed in the second area non-well region part and
In well region part.
2. one-way low-capacitance TVS device according to claim 1, which is characterized in that further include：
Multiple tungsten plug structures, the multiple tungsten plug structure is outside second conductive type epitaxial layer and the first conduction type
Prolong layer, the multiple tungsten plug structure extends to first conductivity type substrate.
3. one-way low-capacitance TVS device according to claim 2, which is characterized in that further include：
First metal wire, first metal wire connect the second conductivity type implanted region and described second in the first area
The first conductivity type implanted region in the non-well region part in region；
Second metal wire, second metal wire connect the injection of the first conduction type in the well region part of the second area
Area, the second conductivity type implanted region and multiple tungsten plug structures.
4. one-way low-capacitance TVS device according to claim 3, which is characterized in that first metal wire and power supply connect
It connects, first conductivity type substrate is connected to ground.
5. the one-way low-capacitance TVS device according to any one of claim 2-4, which is characterized in that described first is conductive
Type is p-type, and second conduction type is N-type；Alternatively, first conduction type is N-type, second conduction type is
P-type.
6. one-way low-capacitance TVS device according to claim 5, which is characterized in that first conductivity type substrate is
Heavy doping structure, first conductive type epitaxial layer are light-dope structure, and the first conduction type buried layer is heavy doping knot
Structure, the second conduction type buried layer are attached most importance to doped structure, and second conductive type epitaxial layer is light-dope structure, and described the
One conduction type well region is attached most importance to doped structure, and second conductivity type implanted region is attached most importance to doped structure, first conductive-type
Type injection region is attached most importance to doped structure.
7. one-way low-capacitance TVS device according to claim 5, which is characterized in that first conductivity type substrate is
Heavy doping structure, first conductive type epitaxial layer are light-dope structure, and the first conduction type buried layer is that knot is lightly doped
Structure, the second conduction type buried layer are attached most importance to doped structure, and second conductive type epitaxial layer is light-dope structure, and described the
One conduction type well region is attached most importance to doped structure, and second conductivity type implanted region is attached most importance to doped structure, first conductive-type
Type injection region is attached most importance to doped structure.
8. one-way low-capacitance TVS device according to claim 5, which is characterized in that first conductivity type substrate
Resistivity is 0.005 Ω of Ω .cm~0.008 .cm.
9. one-way low-capacitance TVS device according to claim 5, which is characterized in that first conductive type epitaxial layer
Resistivity be the 2.0 Ω .cm of Ω .cm~4.0, with a thickness of 6.0 μm~14.0 μm.
10. one-way low-capacitance TVS device according to claim 5, which is characterized in that second conductive type epitaxial layer
28 resistivity is the 25 Ω .cm of Ω .cm~35, with a thickness of 6.0 μm~12.0 μm.
11. one-way low-capacitance TVS device according to claim 6, which is characterized in that the first conduction type buried layer packet
Include the first conductive type ion injected in first conductive type epitaxial layer, wherein first conductive type ion
Implantation dosage be 2.0E15-6.0E15.
12. one-way low-capacitance TVS device according to claim 7, which is characterized in that the first conduction type buried layer packet
Include the first conductive type ion injected in first conductive type epitaxial layer, wherein first conductive type ion
Implantation dosage be 1.0E14-8.0E14.
13. one-way low-capacitance TVS device according to claim 6 or 7, which is characterized in that second conduction type buries
Layer includes the second conductive type ion injected on the first conduction type buried layer, the note of second conductive type ion
Entering dosage is 6.0E15-1.0E16.
14. one-way low-capacitance TVS device according to claim 6 or 7, which is characterized in that first conductive type of trap
Area includes the first conductive type ion injected in second conductive type epitaxial layer, first conductive type ion
Implantation dosage is 1.0E14~1.0E15.
15. one-way low-capacitance TVS device according to claim 6 or 7, which is characterized in that the isolation structure includes ditch
Slot and the polysilicon for filling groove, wherein the multiple groove is led through second conductive type epitaxial layer and first
Electric type epitaxial layer, the multiple groove extend in the first conductivity type substrate, and the multiple groove is conductive by described second
Type epitaxial layer is divided into first area and second area.
16. one-way low-capacitance TVS device according to claim 15, which is characterized in that the depth of the groove is 10 μm
~20 μm, width is 1.5 μm~3 μm.
17. one-way low-capacitance TVS device according to claim 6 or 7, which is characterized in that the second conduction type note
Entering area includes the second conductive type ion injected in the first area and the well region part of second area, and described second
The implantation dosage of conductive type ion is 1.0E15~1.0E16.
18. one-way low-capacitance TVS device according to claim 6 or 7, which is characterized in that the first conduction type note
Entering area includes the first conductive type ion injected in the non-well region part of the second area and well region part, and described first
The implantation dosage of conductive type ion is 1.0E15~1.0E16.
19. one-way low-capacitance TVS device according to claim 6 or 7, which is characterized in that the tungsten plug includes multiple recessed
Slot and the tungsten plug for filling groove, wherein the multiple groove is conductive through second conductive type epitaxial layer and first
Type epitaxial layer, the multiple groove extend in the first conductivity type substrate, and the multiple groove is by second conductive-type
Type epitaxial layer is divided into first area and second area.
20. one-way low-capacitance TVS device according to claim 19, which is characterized in that the depth of the groove 40 is 10 μ
M~20 μm, width are 1.5 μm~2 μm.
21. one-way low-capacitance TVS device described in any one of -4 according to claim 1, which is characterized in that the first area
In the second conductive type epitaxial layer and first conductive type epitaxial layer constitute general-purpose diode；In the second area
The first conduction type buried layer and the second conduction type buried layer constitute zener diode；Second in the second area
The first conduction type note in the non-well region part of conductive type epitaxial layer, the first conduction type well region and the second area
Enter area and constitutes the first triode；The first conduction type well region and the second conductive type epitaxial layer and institute in the second area
The second conductivity type implanted region stated in the well region part of second area forms the second triode.
22. one-way low-capacitance TVS device according to claim 21, which is characterized in that when power supply plus positive potential, ground adds negative
When current potential, the power supply is to the breakdown reverse voltage on the ground：VBR=VebfT1+VZ1, wherein VBRIt is the power supply to described
The breakdown reverse voltage on ground；VebfT1For the backward voltage of the first triode, VZ1For the voltage of zener diode.
23. one-way low-capacitance TVS device according to claim 21, which is characterized in that when power supply plus positive potential, ground adds negative
When current potential, the power supply is to the breakdown reverse voltage on the ground：VBR=Vsb, wherein VBRIt is the power supply to the anti-of the ground
To breakdown voltage；Vsb is the rebound voltage for the SCR structure that the first triode and the second triode are formed.
24. one-way low-capacitance TVS device according to claim 21, which is characterized in that when power supply plus negative potential, ground adds just
When current potential, the power supply is Vf=Vf to the forward voltage drop on the groundD1, wherein Vf is that the power supply presses the positive of the ground
Drop, VfD1For the pressure drop of general-purpose diode.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201721901384.XU CN208111440U (en) | 2017-12-29 | 2017-12-29 | One-way low-capacitance TVS device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721901384.XU CN208111440U (en) | 2017-12-29 | 2017-12-29 | One-way low-capacitance TVS device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108109998A (en) * | 2017-12-29 | 2018-06-01 | 杭州士兰集成电路有限公司 | One-way low-capacitance TVS device and its manufacturing method |
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2017
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108109998A (en) * | 2017-12-29 | 2018-06-01 | 杭州士兰集成电路有限公司 | One-way low-capacitance TVS device and its manufacturing method |
| CN108109998B (en) * | 2017-12-29 | 2023-06-16 | 杭州士兰集成电路有限公司 | Unidirectional low-capacitance TVS device and manufacturing method thereof |
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