CN208077982U - insulated gate bipolar transistor - Google Patents
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- CN208077982U CN208077982U CN201820585100.9U CN201820585100U CN208077982U CN 208077982 U CN208077982 U CN 208077982U CN 201820585100 U CN201820585100 U CN 201820585100U CN 208077982 U CN208077982 U CN 208077982U
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Abstract
The utility model proposes insulated gate bipolar transistor, which includes：Drift region；P-well region is arranged in the side of drift region；N+The side far from drift region in p-well region is arranged in emitter；Two grooves, each groove are opened in N+In emitter, p-well region and drift region, and run through N+Emitter and p-well region；Trench oxide layer is arranged in two grooves and covers the surface of each groove；Two polysilicon gates, each polysilicon gate is filled in side of the trench oxide layer far from drift region, also, each polysilicon gate includes the sub- grid of N-type being cascading and the sub- grid of p-type.The grid for the IGBT that the utility model is proposed is set as PN junction, in this way, can reduce the parasitic capacitance Cgc between grid and collector, so as to shorten service time, and then reduces turn-on consumption.
Description
Technical field
The utility model is related to technical field of semiconductors, specifically, the utility model is related to insulated gate bipolar transistors.
Background technology
Currently, insulated gate bipolar transistor (InsulatedGateBipolarTransistor, abbreviation IGBT) be by
The compound full-control type voltage driven type power of double pole triode (BJT) and insulating gate type field effect tube (MOSFET) composition is partly led
Body device has the low conducting pressure of the high input impedance and power transistor (i.e. huge transistor, abbreviation GTR) of MOSFET element concurrently
Advantage of both drop, since IGBT has the advantages that driving power is small and saturation pressure reduces, so IGBT is as a kind of novel
Power electronic devices be widely applied to every field.
At this stage, Fig. 1 is the sectional structure chart of existing igbt, and when IGBT is opened, electronics is from transmitting
Pole 300 is injected into drift region 100, hole and is injected into drift region 100 from collector 600, and electrons and holes occur in drift region 100
Conductivity modulation effect so that the conduction voltage drop of IGBT is relatively low；And when IGBT is turned off, the hole in drift region 100 mainly passes through
With the electronics in drift region is compound eliminates, to realizing the shutdown of IGBT.
Utility model content
The utility model is intended to solve at least some of the technical problems in related technologies.
The utility model is the following discovery based on inventor and completes：
The inventor of the utility model has found that the performance of IGBT can be divided into dynamic characteristic and static state is special in the course of the research
Sign.Dynamic characteristic was mainly reflected on the switch time of IGBT, i.e. switch time is shorter, then the switching power loss of IGBT it is smaller,
IGBT dynamic characteristics are better；And static characteristic is mainly reflected on the conduction voltage drop of IGBT, i.e., conduction voltage drop is lower, then IGBT
On-state power consumption is lower, IGBT static characteristic is better.Wherein, the switch time of IGBT and parasitic capacitance Cge (grid and emitter
Between parasitic capacitance) and Cgc (parasitic capacitance between grid and collector) it is closely related, the smaller then IGBT's of parasitic capacitance
Service time is shorter.The parasitic capacitance of IGBT can be reduced by increasing the thickness of trench oxide layer, but as groove aoxidizes
The increase of layer thickness can cause the threshold voltage of IGBT to increase, and in turn result in conduction voltage drop rising, static characteristic is deteriorated.
The inventor of the utility model has found by further investigation, the grid of IGBT can be set to PN junction, in this way, can subtract
Parasitic capacitance Cgc between small grid and collector, so as to shorten the service time of IGBT, and then reduce IGBT opens damage
Consumption.Moreover, can be also common drift region and low mobility drift region by drift region design, in this way, when IGBT is opened, it is common to float
Shifting area is electronics, the drift in hole provides resistance smaller channel, the conduction voltage drop without influencing whether IGBT；It is turned off in IGBT
When, low mobility drift region can accelerate electrons and holes recombination velocity, so as to shorten the turn-off time of IGBT, and then reduce IGBT
Shutdown power consumption.
In view of this, a purpose of the utility model be to propose a kind of reduction parasitic capacitance, shorten switch time or
Person does not influence the insulated gate bipolar transistor of conducting voltage.
In the utility model in a first aspect, the utility model proposes a kind of insulated gate bipolar transistors.
Embodiment according to the present utility model, the insulated gate bipolar transistor include：Drift region；P-well region, the P
The side in the drift region is arranged in well region；N+Emitter, the N+Emitter is arranged in the p-well region far from the drift region
Side；Two grooves, each groove are opened in the N+In emitter, the p-well region and the drift region, and run through
The N+Emitter and the p-well region；Trench oxide layer, the trench oxide layer are arranged in described two grooves, and cover
The surface of each groove；Two polysilicon gates, it is separate that each polysilicon gate is filled in the trench oxide layer
The side of the drift region, also, each polysilicon gate includes the sub- grid of N-type being cascading and the sub- grid of p-type
Pole.
Inventor has found that the insulated gate bipolar transistor of the utility model embodiment, grid is by N-type
The PN junction of sub- grid and the sub- grid composition of p-type, in this way, the parasitic capacitance Cgc between grid and collector can be reduced, to not
Shorten the service time of IGBT under the premise of increasing conduction voltage drop, and then reduces the turn-on consumption of IGBT.
In addition, according to the insulated gate bipolar transistor of the utility model above-described embodiment, can also have following additional
Technical characteristic：
Embodiment according to the present utility model, the insulated gate bipolar transistor further comprise：Insulating layer, it is described exhausted
Edge layer is arranged on surface of the polysilicon gate far from the drift region, and positive throwing of the insulating layer on the drift region
Shadow covers orthographic projection of the polysilicon gate on the drift region；P+Collector layer, the P+Collector layer is arranged described
Side of the drift region far from the p-well region.
Embodiment according to the present utility model, the sub- grid of N-type is close to the surface of the sub- grid of the p-type to the groove
Bottom wall distance be less than the p-well region close to the drift region surface to the groove bottom wall distance.
The doping concentration of embodiment according to the present utility model, the sub- grid of N-type is more than 1*1018/cm3, p-type
The doping concentration of grid is less than 5*1017/cm3。
Embodiment according to the present utility model, the drift region include：Two the first drift regions, first drift region with
The trench contact；Second drift region, second drift region are arranged between described two first drift regions, and described in formation
The material of second drift region is to be handled by low mobility the material of first drift region to obtain.
The width of embodiment according to the present utility model, the groove is 1.5 microns, and the width of first drift region
It it is 5 microns, the width of second drift region is 2 microns.
Embodiment according to the present utility model, the drift region include multiple second drift regions and the drift of multiple thirds
Area, the multiple second drift region and the multiple third drift region distribute alternately between described two first drift regions, and
The material identical of the material of the third drift region and first drift region.
The width of embodiment according to the present utility model, the groove is 1.5 microns, and the width of first drift region is
5 microns, and the width of second drift region and the third drift region is all 0.3 micron.
The additional aspect and advantage of the utility model will be set forth in part in the description, partly will be from following description
In become apparent, or recognized by the practice of the utility model.
Description of the drawings
The above-mentioned and/or additional aspect and advantage of the utility model will in the description from combination following accompanying drawings to embodiment
Become apparent and is readily appreciated that, wherein：
Fig. 1 is the cross section structure schematic diagram of the insulated gate bipolar transistor of the prior art；
Fig. 2 is the cross section structure schematic diagram of the insulated gate bipolar transistor of the utility model one embodiment；
Fig. 3 is the cross section structure schematic diagram of the insulated gate bipolar transistor of the utility model another embodiment；
Fig. 4 is the cross section structure schematic diagram of the insulated gate bipolar transistor of the utility model another embodiment.
Reference numeral
100 drift regions
110 first drift regions
120 second drift regions
130 third drift regions
200 p-well regions
300 N+Emitter
410 grooves
420 trench oxide layers
The sub- grid of 431 N-types
The sub- grid of 432 p-types
440 insulating layers
500 P+Collector
Specific implementation mode
The embodiments of the present invention are described below in detail, those skilled in the art is it will be appreciated that following example is intended to use
In explanation the utility model, and it is not construed as limitations of the present invention.Unless stated otherwise, do not have in embodiment below
It is expressly recited particular technique or condition, those skilled in the art according to common technology in the art or condition or can press
It is carried out according to product description.
In the one side of the utility model, the utility model proposes a kind of insulated gate bipolar transistors.
Embodiment according to the present utility model, with reference to Fig. 2, which includes：Drift region 100, p-well
Area 200, N+Emitter 300, two grooves 410, trench oxide layer 420 and two polysilicon gates；Wherein, p-well region 200 is arranged
Side in drift region 100；N+Emitter 300 is arranged in side of the p-well region 200 far from drift region 100；Each groove 410 is opened
It is located at N+In emitter 300, p-well region 200 and drift region 100, and run through N+Emitter 300 and p-well region 200；Trench oxide layer
420 are arranged in two grooves 410, and cover the surface of each groove 410；Each polysilicon gate is filled in trench oxide layer
420 sides far from drift region 100, also, each polysilicon gate includes the sub- grid 431 of N-type being cascading and p-type
Sub- grid 432.
The utility model inventor has found that PN junction can be set the grid of IGBT to, in this way, applying grid
When pressure, grid PN junction is reverse-biased, and makes to be equivalent between N-type polycrystalline silicon grid and p-type polysilicon grid and constitute a capacitance C1, P
A capacitance C2 is constituted between type polycrystalline silicon gate and collector again.Therefore, the parasitic capacitance between the grid and collector of IGBT
Cgc ' is equal to capacitance C1 in the series capacitance of C2, i.e. Cgc '=C1*C2/ (C1+C2).It can be seen that and set the grid of IGBT to PN
After knot, parasitic capacitance Cgc ' is less than C2 (i.e. the parasitic capacitance Cgc of the prior art).So the polysilicon gate of IGBT is set
It is set to PN junction, the parasitic capacitance Cgc between the grid of IGBT and collector can be effectively reduced, to not influence conducting voltage
Under the premise of shorten IGBT service time, and then reduce IGBT turn-on consumption.
Embodiment according to the present utility model, with reference to Fig. 3, insulated gate bipolar transistor can further comprise insulating layer
440 and P+Collector layer 500；Wherein, insulating layer 440 is arranged on surface of the polysilicon gate far from drift region 100, and insulating layer
440 orthographic projection of the orthographic projection covering polysilicon gate on drift region 100 on drift region 100；And P+Collector layer 500 is set
It sets in side of the drift region 100 far from p-well region 200.In this way, structure and all more perfect IGBT of function are can get, and insulating layer
440 can adequately protect polysilicon gate in the production process or during use, to make the hetero-junctions silicon carbide insulated gate electrode
The device stability of transistor is more preferable.
Embodiment according to the present utility model forms the specific material type of insulated gate bipolar transistor not by special
Limitation, IGBT base materials commonly used in the art, those skilled in the art can be according to the specific of the insulated gate bipolar transistor
Requirement on electric performance is correspondingly selected.In some embodiments of the utility model, drift region 100, p-well region 200, N are formed+
Emitter 300 and P+The material of collector layer 500 can be Si, in this way, the long-time service of the insulated gate bipolar transistor of silicon substrate
Stability more preferably, voltage it is relatively low and adaptable.In other embodiments of the utility model, drift region 100, p-well are formed
Area 200, N+Emitter 300 and P+The material of collector layer 500 can be SiC, in this way, the insulated gate bipolar transistor of silicon carbide
Proof voltage can more preferable, electric current bigger and voltage higher.
Embodiment according to the present utility model, with reference to Fig. 3, the sub- grid 431 of N-type is arrived close to the surface A of the sub- grid of p-type 432
The distance of the bottom wall B of groove 410 be less than p-well region 200 close to drift region 100 surface C to groove 410 bottom wall B distance, such as
This, it can be ensured that the sub- grid 432 of p-type is less than p-well region 200, more to make to be made of the sub- grid of the sub- grid of N-type 431 and p-type 432
Polysilicon gate can preferably control conductivity modulation effect.
The specific doping concentration of embodiment according to the present utility model, the sub- grid 431 of N-type and the sub- grid of p-type 432 is not by spy
Other limitation, as long as the doping concentration of the concentration can make polysilicon gate form PN junction, those skilled in the art can basis
The actual effect that PN junction shortens service time is correspondingly adjusted.In some embodiments of the utility model, the sub- grid of N-type
Doping concentration can be more than 1*1018/cm3, the doping concentration of the sub- grid of p-type is smaller than 5*1017/cm3, in this way, the sub- grid of N-type can be made
Depletion region between pole 431 and the sub- grid of p-type 432 is more extended to the sub- grid 432 of p-type, and ensures that the depletion region is less than p traps
Area 200, and then ensure that IGBT's opens reliability.
Embodiment according to the present utility model, with reference to Fig. 3, drift region 100 (not marked in figure) may include two first drifts
Move area 110 and the second drift region 120, wherein the first drift region 110 is contacted with groove 410, and the second drift region 120 is arranged two
Between a first drift region 110, also, formed the second drift region 120 material be the material of the first drift region 110 is passed through it is low
Mobility processing obtains.It should be noted that " low mobility processing " is specifically the electricity instigated in semi-conducting material herein
The processing mode that the mobility in son and hole reduces, and " contact " specifically refers to not have between the first drift region 110 and groove 410
It other structures and is connected directly.
The inventor of the utility model has found by further investigation, and drift region 100 can be also divided into the first drift region 110
With the second drift region 120, in this way, when IGBT is opened, the first drift region 110 as common drift region can be electronics, hole
Drift provide resistance smaller channel, the conduction voltage drop without influencing whether IGBT；When IGBT is turned off, as low mobility
Second drift region 120 of (i.e. hole, electron lifetime are short) drift region can accelerate electrons and holes recombination velocity, so as to shorten IGBT
Turn-off time, and then reduce IGBT shutdown power consumption.
The specific method of embodiment according to the present utility model, low mobility processing is not particularly limited, this field skill
Art personnel can correspondingly be selected according to the specific base material type of insulated gate bipolar transistor.In some of the utility model
In embodiment, for Si bases or SiC material, electron radiation method or ion bombardment may be selected in the method for low mobility processing, such as
This, the migration of the electrons and holes in the second drift region 120 can be fast and efficiently reduced using above-mentioned low mobility processing method
Rate.
Embodiment according to the present utility model, each groove 410, the first drift region 110 in insulated gate bipolar transistor
Be not particularly limited with the specific width of the second drift region 120, if the first drift region 110 can be contacted with groove 410 and
Second drift region 120 is not contacted with groove 410, and those skilled in the art can be according to the reality of the insulated gate bipolar transistor
The border turn-off time is correspondingly adjusted.In some embodiments of the utility model, the width of groove 410 can be 1.5 microns,
And first the width of drift region 110 can be 5 microns, the width of the second drift region 120 can be 2 microns, in this way, for 10 micron meters
Very little insulated gate bipolar transistor can obtain good dynamic property and static properties simultaneously.
Embodiment according to the present utility model, with reference to Fig. 4, drift region 100 (not marked in figure) may also include multiple second
Drift region 120 and multiple third drift regions 130, wherein multiple second drift regions 120 are with multiple third drift regions 130 at two
It distributes alternately between first drift region 100, also, the material phase of the material of third drift region 130 and the first drift region 110
Together, in this way, the low mobility drift region being spaced apart can equally accelerate the recombination velocity of electrons and holes when shutdown, also, the
Third drift region 130 between two drift regions 120 can further ensure the overall stability of conduction voltage drop when conducting.It needs
Bright, " multiple " herein specifically refer to two or more.
Embodiment according to the present utility model, the second drift region 120 and third drift region in insulated gate bipolar transistor
130 specific width are particularly limited than not, and those skilled in the art can be according to the reality of the insulated gate bipolar transistor
Turn-off time is correspondingly adjusted.In some embodiments of the utility model, the width for groove is 1.5 microns, the
The width of the case where width of one drift region 110 is 5 microns, the second drift region 120 and third drift region 130 all can be 0.3 micro-
Rice, in this way, better dynamic property and static properties can be obtained simultaneously for the insulated gate bipolar transistor of 0 micron-scale.
The specific depth of embodiment according to the present utility model, each groove 410 is not particularly limited, specifically for example
6.5 microns etc., those skilled in the art can correspondingly be designed according to the specific thickness of the p-well region 200, no longer superfluous herein
It states.Embodiment according to the present utility model, the specific spacing between two grooves 410 are not also particularly limited, specifically for example
5.5 microns etc., those skilled in the art can carry out correspondingly according to the specific requirement on electric performance of the insulated gate bipolar transistor
Design, details are not described herein.
The specific thickness of embodiment according to the present utility model, trench oxide layer 420 is not particularly limited, specifically for example
0.15 micron etc., those skilled in the art can carry out correspondingly according to the specific requirement on electric performance of the insulated gate bipolar transistor
Design, details are not described herein.Embodiment according to the present utility model, the specific material of trench oxide layer 420 is not also by special
Limitation, specifically such as silica, those skilled in the art can carry out correspondingly oxidation according to the specific type of base material and be formed,
Details are not described herein.
The specific thickness of embodiment according to the present utility model, p-well region 200 is not particularly limited, and specifically such as 2.8 is micro-
Rice etc., those skilled in the art can correspondingly be designed according to the specific thickness of the p-well region, and details are not described herein.According to this
The embodiment of utility model, N+The specific thickness of emitter 300 is not also particularly limited, specifically such as 0.5 micron, ability
Field technique personnel can correspondingly be designed according to the specific thickness of the p-well region, and details are not described herein.It is according to the present utility model
The specific thickness of embodiment, drift region 100 is not also particularly limited, and specifically such as 70 microns, those skilled in the art can
It is correspondingly designed according to the specific requirement on electric performance of the insulated gate bipolar transistor, details are not described herein.According to this
The embodiment of utility model, P+The specific thickness of collector layer 500 is not also particularly limited, specifically such as 0.5 micron, this
Field technology personnel can correspondingly be designed according to the specific requirement on electric performance of the insulated gate bipolar transistor, herein not
It repeats again.
Embodiment according to the present utility model, drift region 100, p-well region 200, N+Emitter 300 and P+Collector layer 500
Specific doping concentration is not particularly limited, and specifically such as doping concentration of drift region 100 can be 1.5*1014/cm3, p-well region
200 doping concentration can be 4*1016/cm3、N+The doping concentration of emitter 300 can be 5*1019/cm3Or P+The doping concentration of collection
Can be 1.5*1014/cm3, electrode layer 500 doping concentration can be 8*1017/cm3, etc., those skilled in the art can be according to this
The actual electrical property of the insulated gate bipolar transistor is correspondingly adjusted, and details are not described herein.
In conclusion embodiment according to the present utility model, the utility model proposes a kind of insulated gate bipolar crystal
Pipe, grid is the PN junction being made of the sub- grid of N-type and the sub- grid of p-type, in this way, can reduce the parasitism between grid and collector
Capacitance Cgc to shorten the service time of IGBT under the premise of not increasing conduction voltage drop, and then reduces IGBT and opens damage
Consumption.
In the description of the present invention, it should be understood that term "center", " longitudinal direction ", " transverse direction ", " length ", " width
Degree ", " thickness ", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outside",
The orientation or positional relationship of the instructions such as " clockwise ", " counterclockwise ", " axial direction ", " radial direction ", " circumferential direction " is based on ... shown in the drawings
Orientation or positional relationship is merely for convenience of describing the present invention and simplifying the description, and does not indicate or imply the indicated dress
It sets or element must have a particular orientation, with specific azimuth configuration and operation, therefore should not be understood as to the utility model
Limitation.
In addition, term " first ", " second ", " third " are used for description purposes only, it is not understood to indicate or imply phase
To importance or implicitly indicate the quantity of indicated technical characteristic." first ", " second ", " third " are defined as a result,
Feature can explicitly or implicitly include at least one of the features.In the description of the present invention, the meaning of " plurality " is
At least two, such as two, three etc., unless otherwise specifically defined.
In the description of this specification, reference term " one embodiment ", " some embodiments ", " example ", " specifically show
The description of example " or " some examples " etc. means specific features, structure, material or spy described in conjunction with this embodiment or example
Point is contained at least one embodiment or example of the utility model.In the present specification, to the schematic table of above-mentioned term
It states and is necessarily directed to identical embodiment or example.Moreover, particular features, structures, materials, or characteristics described can be with
It can be combined in any suitable manner in any one or more of the embodiments or examples.In addition, without conflicting with each other, this field
Technical staff can by the feature of different embodiments or examples described in this specification and different embodiments or examples into
Row combines and combination.
Although the embodiments of the present invention have been shown and described above, it is to be understood that above-described embodiment is
Illustratively, it should not be understood as limiting the present invention, those skilled in the art are in the scope of the utility model
Inside it can make changes, modifications, alterations, and variations to the above described embodiments.
Claims (8)
1. a kind of insulated gate bipolar transistor, which is characterized in that including：
Drift region；
The side in the drift region is arranged in p-well region, the p-well region；
N+Emitter, the N+Emitter is arranged in side of the p-well region far from the drift region；
Two grooves, each groove are opened in the N+In emitter, the p-well region and the drift region, and through described
N+Emitter and the p-well region；
Trench oxide layer, the trench oxide layer are arranged in described two grooves, and cover the surface of each groove；
Two polysilicon gates, each polysilicon gate are filled in one of the trench oxide layer far from the drift region
Side, also, each polysilicon gate includes the sub- grid of N-type being cascading and the sub- grid of p-type.
2. insulated gate bipolar transistor according to claim 1, which is characterized in that further comprise：
Insulating layer, the insulating layer is arranged on surface of the polysilicon gate far from the drift region, and the insulating layer exists
Orthographic projection on the drift region covers orthographic projection of the polysilicon gate on the drift region；
P+Collector layer, the P+Collector layer is arranged in side of the drift region far from the p-well region.
3. insulated gate bipolar transistor according to claim 1, which is characterized in that the sub- grid of N-type is close to the P
The distance of the surface of type grid to the bottom wall of the groove be less than the p-well region close to the drift region surface to the ditch
The distance of the bottom wall of slot.
4. insulated gate bipolar transistor according to claim 1, which is characterized in that the doping of the sub- grid of N-type is dense
Degree is more than 1*1018/cm3, the doping concentration of the sub- grid of p-type is less than 5*1017/cm3。
5. insulated gate bipolar transistor according to any one of claims 1 to 4, which is characterized in that the drift region
Including：
Two the first drift regions, first drift region and the trench contact；
Second drift region, second drift region are arranged between described two first drift regions, and form second drift
The material in area is to be handled by low mobility the material of first drift region to obtain.
6. insulated gate bipolar transistor according to claim 5, which is characterized in that the width of the groove is 1.5 micro-
Rice, and the width of first drift region is 5 microns, the width of second drift region is 2 microns.
7. insulated gate bipolar transistor according to claim 6, which is characterized in that the drift region includes multiple described
Second drift region and multiple third drift regions, the multiple second drift region and the multiple third drift region are described two the
It distributes alternately between one drift region, and the material identical of the material of the third drift region and first drift region.
8. insulated gate bipolar transistor according to claim 7, which is characterized in that the width of the groove is 1.5 micro-
The width of rice, first drift region is 5 microns, and the width of second drift region and the third drift region is all 0.3
Micron.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820585100.9U CN208077982U (en) | 2018-04-23 | 2018-04-23 | insulated gate bipolar transistor |
| PCT/CN2018/112046 WO2019205539A1 (en) | 2018-04-23 | 2018-10-26 | Insulated gate bipolar transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820585100.9U CN208077982U (en) | 2018-04-23 | 2018-04-23 | insulated gate bipolar transistor |
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| Publication Number | Publication Date |
|---|---|
| CN208077982U true CN208077982U (en) | 2018-11-09 |
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| CN201820585100.9U Expired - Fee Related CN208077982U (en) | 2018-04-23 | 2018-04-23 | insulated gate bipolar transistor |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108365007A (en) * | 2018-04-23 | 2018-08-03 | 广东美的制冷设备有限公司 | Insulated gate bipolar transistor |
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2018
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108365007A (en) * | 2018-04-23 | 2018-08-03 | 广东美的制冷设备有限公司 | Insulated gate bipolar transistor |
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